1 /* $OpenBSD: mpi.c,v 1.88 2007/09/11 13:39:33 gilles Exp $ */ 2 3 /* 4 * Copyright (c) 2005, 2006 David Gwynne <dlg@openbsd.org> 5 * Copyright (c) 2005 Marco Peereboom <marco@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/param.h> 21 #include <sys/systm.h> 22 #include <sys/buf.h> 23 #include <sys/device.h> 24 #include <sys/proc.h> 25 #include <sys/malloc.h> 26 #include <sys/kernel.h> 27 28 #include <machine/bus.h> 29 30 #include <scsi/scsi_all.h> 31 #include <scsi/scsiconf.h> 32 33 #include <dev/ic/mpireg.h> 34 #include <dev/ic/mpivar.h> 35 36 #ifdef MPI_DEBUG 37 uint32_t mpi_debug = 0 38 /* | MPI_D_CMD */ 39 /* | MPI_D_INTR */ 40 /* | MPI_D_MISC */ 41 /* | MPI_D_DMA */ 42 /* | MPI_D_IOCTL */ 43 /* | MPI_D_RW */ 44 /* | MPI_D_MEM */ 45 /* | MPI_D_CCB */ 46 /* | MPI_D_PPR */ 47 /* | MPI_D_RAID */ 48 /* | MPI_D_EVT */ 49 ; 50 #endif 51 52 struct cfdriver mpi_cd = { 53 NULL, "mpi", DV_DULL 54 }; 55 56 int mpi_scsi_cmd(struct scsi_xfer *); 57 void mpi_scsi_cmd_done(struct mpi_ccb *); 58 void mpi_minphys(struct buf *bp); 59 int mpi_scsi_ioctl(struct scsi_link *, u_long, caddr_t, 60 int, struct proc *); 61 62 struct scsi_adapter mpi_switch = { 63 mpi_scsi_cmd, mpi_minphys, NULL, NULL, mpi_scsi_ioctl 64 }; 65 66 struct scsi_device mpi_dev = { 67 NULL, NULL, NULL, NULL 68 }; 69 70 struct mpi_dmamem *mpi_dmamem_alloc(struct mpi_softc *, size_t); 71 void mpi_dmamem_free(struct mpi_softc *, 72 struct mpi_dmamem *); 73 int mpi_alloc_ccbs(struct mpi_softc *); 74 struct mpi_ccb *mpi_get_ccb(struct mpi_softc *); 75 void mpi_put_ccb(struct mpi_softc *, struct mpi_ccb *); 76 int mpi_alloc_replies(struct mpi_softc *); 77 void mpi_push_replies(struct mpi_softc *); 78 79 void mpi_start(struct mpi_softc *, struct mpi_ccb *); 80 int mpi_complete(struct mpi_softc *, struct mpi_ccb *, int); 81 int mpi_poll(struct mpi_softc *, struct mpi_ccb *, int); 82 int mpi_reply(struct mpi_softc *, u_int32_t); 83 84 void mpi_squash_ppr(struct mpi_softc *); 85 void mpi_run_ppr(struct mpi_softc *); 86 int mpi_ppr(struct mpi_softc *, struct scsi_link *, 87 struct mpi_cfg_raid_physdisk *, int, int, int); 88 int mpi_inq(struct mpi_softc *, u_int16_t, int); 89 90 void mpi_timeout_xs(void *); 91 int mpi_load_xs(struct mpi_ccb *); 92 93 u_int32_t mpi_read(struct mpi_softc *, bus_size_t); 94 void mpi_write(struct mpi_softc *, bus_size_t, u_int32_t); 95 int mpi_wait_eq(struct mpi_softc *, bus_size_t, u_int32_t, 96 u_int32_t); 97 int mpi_wait_ne(struct mpi_softc *, bus_size_t, u_int32_t, 98 u_int32_t); 99 100 int mpi_init(struct mpi_softc *); 101 int mpi_reset_soft(struct mpi_softc *); 102 int mpi_reset_hard(struct mpi_softc *); 103 104 int mpi_handshake_send(struct mpi_softc *, void *, size_t); 105 int mpi_handshake_recv_dword(struct mpi_softc *, 106 u_int32_t *); 107 int mpi_handshake_recv(struct mpi_softc *, void *, size_t); 108 109 void mpi_empty_done(struct mpi_ccb *); 110 111 int mpi_iocinit(struct mpi_softc *); 112 int mpi_iocfacts(struct mpi_softc *); 113 int mpi_portfacts(struct mpi_softc *); 114 int mpi_portenable(struct mpi_softc *); 115 void mpi_get_raid(struct mpi_softc *); 116 int mpi_fwupload(struct mpi_softc *); 117 118 int mpi_eventnotify(struct mpi_softc *); 119 void mpi_eventnotify_done(struct mpi_ccb *); 120 void mpi_eventack(struct mpi_softc *, 121 struct mpi_msg_event_reply *); 122 void mpi_eventack_done(struct mpi_ccb *); 123 void mpi_evt_sas(void *, void *); 124 125 int mpi_cfg_header(struct mpi_softc *, u_int8_t, u_int8_t, 126 u_int32_t, struct mpi_cfg_hdr *); 127 int mpi_cfg_page(struct mpi_softc *, u_int32_t, 128 struct mpi_cfg_hdr *, int, void *, size_t); 129 130 #define DEVNAME(s) ((s)->sc_dev.dv_xname) 131 132 #define dwordsof(s) (sizeof(s) / sizeof(u_int32_t)) 133 #define sizeofa(s) (sizeof(s) / sizeof((s)[0])) 134 135 #define mpi_read_db(s) mpi_read((s), MPI_DOORBELL) 136 #define mpi_write_db(s, v) mpi_write((s), MPI_DOORBELL, (v)) 137 #define mpi_read_intr(s) mpi_read((s), MPI_INTR_STATUS) 138 #define mpi_write_intr(s, v) mpi_write((s), MPI_INTR_STATUS, (v)) 139 #define mpi_pop_reply(s) mpi_read((s), MPI_REPLY_QUEUE) 140 #define mpi_push_reply(s, v) mpi_write((s), MPI_REPLY_QUEUE, (v)) 141 142 #define mpi_wait_db_int(s) mpi_wait_ne((s), MPI_INTR_STATUS, \ 143 MPI_INTR_STATUS_DOORBELL, 0) 144 #define mpi_wait_db_ack(s) mpi_wait_eq((s), MPI_INTR_STATUS, \ 145 MPI_INTR_STATUS_IOCDOORBELL, 0) 146 147 int 148 mpi_attach(struct mpi_softc *sc) 149 { 150 struct scsibus_attach_args saa; 151 struct mpi_ccb *ccb; 152 153 printf("\n"); 154 155 /* disable interrupts */ 156 mpi_write(sc, MPI_INTR_MASK, 157 MPI_INTR_MASK_REPLY | MPI_INTR_MASK_DOORBELL); 158 159 if (mpi_init(sc) != 0) { 160 printf("%s: unable to initialise\n", DEVNAME(sc)); 161 return (1); 162 } 163 164 if (mpi_iocfacts(sc) != 0) { 165 printf("%s: unable to get iocfacts\n", DEVNAME(sc)); 166 return (1); 167 } 168 169 if (mpi_alloc_ccbs(sc) != 0) { 170 /* error already printed */ 171 return (1); 172 } 173 174 if (mpi_alloc_replies(sc) != 0) { 175 printf("%s: unable to allocate reply space\n", DEVNAME(sc)); 176 goto free_ccbs; 177 } 178 179 if (mpi_iocinit(sc) != 0) { 180 printf("%s: unable to send iocinit\n", DEVNAME(sc)); 181 goto free_ccbs; 182 } 183 184 /* spin until we're operational */ 185 if (mpi_wait_eq(sc, MPI_DOORBELL, MPI_DOORBELL_STATE, 186 MPI_DOORBELL_STATE_OPER) != 0) { 187 printf("%s: state: 0x%08x\n", DEVNAME(sc), 188 mpi_read_db(sc) & MPI_DOORBELL_STATE); 189 printf("%s: operational state timeout\n", DEVNAME(sc)); 190 goto free_ccbs; 191 } 192 193 mpi_push_replies(sc); 194 195 if (mpi_portfacts(sc) != 0) { 196 printf("%s: unable to get portfacts\n", DEVNAME(sc)); 197 goto free_replies; 198 } 199 200 #ifdef notyet 201 if (mpi_eventnotify(sc) != 0) { 202 printf("%s: unable to get portfacts\n", DEVNAME(sc)); 203 goto free_replies; 204 } 205 #endif 206 207 if (mpi_portenable(sc) != 0) { 208 printf("%s: unable to enable port\n", DEVNAME(sc)); 209 goto free_replies; 210 } 211 212 if (mpi_fwupload(sc) != 0) { 213 printf("%s: unable to upload firmware\n", DEVNAME(sc)); 214 goto free_replies; 215 } 216 217 if (sc->sc_porttype == MPI_PORTFACTS_PORTTYPE_SCSI) 218 mpi_squash_ppr(sc); 219 220 /* we should be good to go now, attach scsibus */ 221 sc->sc_link.device = &mpi_dev; 222 sc->sc_link.adapter = &mpi_switch; 223 sc->sc_link.adapter_softc = sc; 224 sc->sc_link.adapter_target = sc->sc_target; 225 sc->sc_link.adapter_buswidth = sc->sc_buswidth; 226 sc->sc_link.openings = sc->sc_maxcmds / sc->sc_buswidth; 227 228 bzero(&saa, sizeof(saa)); 229 saa.saa_sc_link = &sc->sc_link; 230 231 /* config_found() returns the scsibus attached to us */ 232 sc->sc_scsibus = (struct scsibus_softc *) config_found(&sc->sc_dev, 233 &saa, scsiprint); 234 235 /* get raid pages */ 236 mpi_get_raid(sc); 237 238 /* do domain validation */ 239 if (sc->sc_porttype == MPI_PORTFACTS_PORTTYPE_SCSI) 240 mpi_run_ppr(sc); 241 242 /* enable interrupts */ 243 mpi_write(sc, MPI_INTR_MASK, MPI_INTR_MASK_DOORBELL); 244 245 return (0); 246 247 free_replies: 248 bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_replies), 249 0, PAGE_SIZE, BUS_DMASYNC_POSTREAD); 250 mpi_dmamem_free(sc, sc->sc_replies); 251 free_ccbs: 252 while ((ccb = mpi_get_ccb(sc)) != NULL) 253 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 254 mpi_dmamem_free(sc, sc->sc_requests); 255 free(sc->sc_ccbs, M_DEVBUF); 256 257 return(1); 258 } 259 260 void 261 mpi_squash_ppr(struct mpi_softc *sc) 262 { 263 struct mpi_cfg_hdr hdr; 264 struct mpi_cfg_spi_dev_pg1 page; 265 int i; 266 267 DNPRINTF(MPI_D_PPR, "%s: mpi_squash_ppr\n", DEVNAME(sc)); 268 269 for (i = 0; i < sc->sc_buswidth; i++) { 270 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_DEV, 271 1, i, &hdr) != 0) 272 return; 273 274 if (mpi_cfg_page(sc, i, &hdr, 1, &page, sizeof(page)) != 0) 275 return; 276 277 DNPRINTF(MPI_D_PPR, "%s: target: %d req_params1: 0x%02x " 278 "req_offset: 0x%02x req_period: 0x%02x " 279 "req_params2: 0x%02x conf: 0x%08x\n", DEVNAME(sc), i, 280 page.req_params1, page.req_offset, page.req_period, 281 page.req_params2, letoh32(page.configuration)); 282 283 page.req_params1 = 0x0; 284 page.req_offset = 0x0; 285 page.req_period = 0x0; 286 page.req_params2 = 0x0; 287 page.configuration = htole32(0x0); 288 289 if (mpi_cfg_page(sc, i, &hdr, 0, &page, sizeof(page)) != 0) 290 return; 291 } 292 } 293 294 void 295 mpi_run_ppr(struct mpi_softc *sc) 296 { 297 struct mpi_cfg_hdr hdr; 298 struct mpi_cfg_spi_port_pg0 port_pg; 299 struct mpi_cfg_ioc_pg3 *physdisk_pg; 300 struct mpi_cfg_raid_physdisk *physdisk_list, *physdisk; 301 size_t pagelen; 302 struct scsi_link *link; 303 int i, tries; 304 305 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_PORT, 0, 0x0, 306 &hdr) != 0) { 307 DNPRINTF(MPI_D_PPR, "%s: mpi_run_ppr unable to fetch header\n", 308 DEVNAME(sc)); 309 return; 310 } 311 312 if (mpi_cfg_page(sc, 0x0, &hdr, 1, &port_pg, sizeof(port_pg)) != 0) { 313 DNPRINTF(MPI_D_PPR, "%s: mpi_run_ppr unable to fetch page\n", 314 DEVNAME(sc)); 315 return; 316 } 317 318 for (i = 0; i < sc->sc_buswidth; i++) { 319 link = sc->sc_scsibus->sc_link[i][0]; 320 if (link == NULL) 321 continue; 322 323 /* do not ppr volumes */ 324 if (link->flags & SDEV_VIRTUAL) 325 continue; 326 327 tries = 0; 328 while (mpi_ppr(sc, link, NULL, port_pg.min_period, 329 port_pg.max_offset, tries) == EAGAIN) 330 tries++; 331 } 332 333 if ((sc->sc_flags & MPI_F_RAID) == 0) 334 return; 335 336 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_IOC, 3, 0x0, 337 &hdr) != 0) { 338 DNPRINTF(MPI_D_RAID|MPI_D_PPR, "%s: mpi_run_ppr unable to " 339 "fetch ioc pg 3 header\n", DEVNAME(sc)); 340 return; 341 } 342 343 pagelen = hdr.page_length * 4; /* dwords to bytes */ 344 physdisk_pg = malloc(pagelen, M_TEMP, M_WAITOK|M_CANFAIL); 345 if (physdisk_pg == NULL) { 346 DNPRINTF(MPI_D_RAID|MPI_D_PPR, "%s: mpi_run_ppr unable to " 347 "allocate ioc pg 3\n", DEVNAME(sc)); 348 return; 349 } 350 physdisk_list = (struct mpi_cfg_raid_physdisk *)(physdisk_pg + 1); 351 352 if (mpi_cfg_page(sc, 0, &hdr, 1, physdisk_pg, pagelen) != 0) { 353 DNPRINTF(MPI_D_PPR|MPI_D_PPR, "%s: mpi_run_ppr unable to " 354 "fetch ioc page 3\n", DEVNAME(sc)); 355 goto out; 356 } 357 358 DNPRINTF(MPI_D_PPR|MPI_D_PPR, "%s: no_phys_disks: %d\n", DEVNAME(sc), 359 physdisk_pg->no_phys_disks); 360 361 for (i = 0; i < physdisk_pg->no_phys_disks; i++) { 362 physdisk = &physdisk_list[i]; 363 364 DNPRINTF(MPI_D_PPR|MPI_D_PPR, "%s: id: %d bus: %d ioc: %d " 365 "num: %d\n", DEVNAME(sc), physdisk->phys_disk_id, 366 physdisk->phys_disk_bus, physdisk->phys_disk_ioc, 367 physdisk->phys_disk_num); 368 369 if (physdisk->phys_disk_ioc != sc->sc_ioc_number) 370 continue; 371 372 tries = 0; 373 while (mpi_ppr(sc, NULL, physdisk, port_pg.min_period, 374 port_pg.max_offset, tries) == EAGAIN) 375 tries++; 376 } 377 378 out: 379 free(physdisk_pg, M_TEMP); 380 } 381 382 int 383 mpi_ppr(struct mpi_softc *sc, struct scsi_link *link, 384 struct mpi_cfg_raid_physdisk *physdisk, int period, int offset, int try) 385 { 386 struct mpi_cfg_hdr hdr0, hdr1; 387 struct mpi_cfg_spi_dev_pg0 pg0; 388 struct mpi_cfg_spi_dev_pg1 pg1; 389 u_int32_t address; 390 int id; 391 int raid = 0; 392 393 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr period: %d offset: %d try: %d " 394 "link quirks: 0x%x\n", DEVNAME(sc), period, offset, try, 395 link->quirks); 396 397 if (try >= 3) 398 return (EIO); 399 400 if (physdisk == NULL) { 401 if ((link->inqdata.device & SID_TYPE) == T_PROCESSOR) 402 return (EIO); 403 404 address = link->target; 405 id = link->target; 406 } else { 407 raid = 1; 408 address = (physdisk->phys_disk_bus << 8) | 409 (physdisk->phys_disk_id); 410 id = physdisk->phys_disk_num; 411 } 412 413 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_DEV, 0, 414 address, &hdr0) != 0) { 415 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to fetch header 0\n", 416 DEVNAME(sc)); 417 return (EIO); 418 } 419 420 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_DEV, 1, 421 address, &hdr1) != 0) { 422 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to fetch header 1\n", 423 DEVNAME(sc)); 424 return (EIO); 425 } 426 427 #ifdef MPI_DEBUG 428 if (mpi_cfg_page(sc, address, &hdr0, 1, &pg0, sizeof(pg0)) != 0) { 429 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to fetch page 0\n", 430 DEVNAME(sc)); 431 return (EIO); 432 } 433 434 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr dev pg 0 neg_params1: 0x%02x " 435 "neg_offset: %d neg_period: 0x%02x neg_params2: 0x%02x " 436 "info: 0x%08x\n", DEVNAME(sc), pg0.neg_params1, pg0.neg_offset, 437 pg0.neg_period, pg0.neg_params2, letoh32(pg0.information)); 438 #endif 439 440 if (mpi_cfg_page(sc, address, &hdr1, 1, &pg1, sizeof(pg1)) != 0) { 441 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to fetch page 1\n", 442 DEVNAME(sc)); 443 return (EIO); 444 } 445 446 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr dev pg 1 req_params1: 0x%02x " 447 "req_offset: 0x%02x req_period: 0x%02x req_params2: 0x%02x " 448 "conf: 0x%08x\n", DEVNAME(sc), pg1.req_params1, pg1.req_offset, 449 pg1.req_period, pg1.req_params2, letoh32(pg1.configuration)); 450 451 pg1.req_params1 = 0; 452 pg1.req_offset = offset; 453 pg1.req_period = period; 454 pg1.req_params2 &= ~MPI_CFG_SPI_DEV_1_REQPARAMS_WIDTH; 455 456 if (raid || !(link->quirks & SDEV_NOSYNC)) { 457 pg1.req_params2 |= MPI_CFG_SPI_DEV_1_REQPARAMS_WIDTH_WIDE; 458 459 switch (try) { 460 case 0: /* U320 */ 461 break; 462 case 1: /* U160 */ 463 pg1.req_period = 0x09; 464 break; 465 case 2: /* U80 */ 466 pg1.req_period = 0x0a; 467 break; 468 } 469 470 if (pg1.req_period < 0x09) { 471 /* Ultra320: enable QAS & PACKETIZED */ 472 pg1.req_params1 |= MPI_CFG_SPI_DEV_1_REQPARAMS_QAS | 473 MPI_CFG_SPI_DEV_1_REQPARAMS_PACKETIZED; 474 } 475 if (pg1.req_period < 0xa) { 476 /* >= Ultra160: enable dual xfers */ 477 pg1.req_params1 |= 478 MPI_CFG_SPI_DEV_1_REQPARAMS_DUALXFERS; 479 } 480 } 481 482 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr dev pg 1 req_params1: 0x%02x " 483 "req_offset: 0x%02x req_period: 0x%02x req_params2: 0x%02x " 484 "conf: 0x%08x\n", DEVNAME(sc), pg1.req_params1, pg1.req_offset, 485 pg1.req_period, pg1.req_params2, letoh32(pg1.configuration)); 486 487 if (mpi_cfg_page(sc, address, &hdr1, 0, &pg1, sizeof(pg1)) != 0) { 488 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to write page 1\n", 489 DEVNAME(sc)); 490 return (EIO); 491 } 492 493 if (mpi_cfg_page(sc, address, &hdr1, 1, &pg1, sizeof(pg1)) != 0) { 494 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to read page 1\n", 495 DEVNAME(sc)); 496 return (EIO); 497 } 498 499 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr dev pg 1 req_params1: 0x%02x " 500 "req_offset: 0x%02x req_period: 0x%02x req_params2: 0x%02x " 501 "conf: 0x%08x\n", DEVNAME(sc), pg1.req_params1, pg1.req_offset, 502 pg1.req_period, pg1.req_params2, letoh32(pg1.configuration)); 503 504 if (mpi_inq(sc, id, raid) != 0) { 505 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to do inquiry against " 506 "target %d\n", DEVNAME(sc), link->target); 507 return (EIO); 508 } 509 510 if (mpi_cfg_page(sc, address, &hdr0, 1, &pg0, sizeof(pg0)) != 0) { 511 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr unable to read page 0 after " 512 "inquiry\n", DEVNAME(sc)); 513 return (EIO); 514 } 515 516 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr dev pg 0 neg_params1: 0x%02x " 517 "neg_offset: %d neg_period: 0x%02x neg_params2: 0x%02x " 518 "info: 0x%08x\n", DEVNAME(sc), pg0.neg_params1, pg0.neg_offset, 519 pg0.neg_period, pg0.neg_params2, letoh32(pg0.information)); 520 521 if (!(letoh32(pg0.information) & 0x07) && (try == 0)) { 522 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr U320 ppr rejected\n", 523 DEVNAME(sc)); 524 return (EAGAIN); 525 } 526 527 if ((((letoh32(pg0.information) >> 8) & 0xff) > 0x09) && (try == 1)) { 528 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr U160 ppr rejected\n", 529 DEVNAME(sc)); 530 return (EAGAIN); 531 } 532 533 if (letoh32(pg0.information) & 0x0e) { 534 DNPRINTF(MPI_D_PPR, "%s: mpi_ppr ppr rejected: %0x\n", 535 DEVNAME(sc), letoh32(pg0.information)); 536 return (EAGAIN); 537 } 538 539 switch(pg0.neg_period) { 540 case 0x08: 541 period = 160; 542 break; 543 case 0x09: 544 period = 80; 545 break; 546 case 0x0a: 547 period = 40; 548 break; 549 case 0x0b: 550 period = 20; 551 break; 552 case 0x0c: 553 period = 10; 554 break; 555 default: 556 period = 0; 557 break; 558 } 559 560 printf("%s: %s %d %s at %dMHz width %dbit offset %d " 561 "QAS %d DT %d IU %d\n", DEVNAME(sc), raid ? "phys disk" : "target", 562 id, period ? "Sync" : "Async", period, 563 (pg0.neg_params2 & MPI_CFG_SPI_DEV_0_NEGPARAMS_WIDTH_WIDE) ? 16 : 8, 564 pg0.neg_offset, 565 (pg0.neg_params1 & MPI_CFG_SPI_DEV_0_NEGPARAMS_QAS) ? 1 : 0, 566 (pg0.neg_params1 & MPI_CFG_SPI_DEV_0_NEGPARAMS_DUALXFERS) ? 1 : 0, 567 (pg0.neg_params1 & MPI_CFG_SPI_DEV_0_NEGPARAMS_PACKETIZED) ? 1 : 0); 568 569 return (0); 570 } 571 572 int 573 mpi_inq(struct mpi_softc *sc, u_int16_t target, int physdisk) 574 { 575 struct mpi_ccb *ccb; 576 struct scsi_inquiry inq; 577 struct { 578 struct mpi_msg_scsi_io io; 579 struct mpi_sge sge; 580 struct scsi_inquiry_data inqbuf; 581 struct scsi_sense_data sense; 582 } __packed *bundle; 583 struct mpi_msg_scsi_io *io; 584 struct mpi_sge *sge; 585 u_int64_t addr; 586 587 DNPRINTF(MPI_D_PPR, "%s: mpi_inq\n", DEVNAME(sc)); 588 589 bzero(&inq, sizeof(inq)); 590 inq.opcode = INQUIRY; 591 _lto2b(sizeof(struct scsi_inquiry_data), inq.length); 592 593 ccb = mpi_get_ccb(sc); 594 if (ccb == NULL) 595 return (1); 596 597 ccb->ccb_done = mpi_empty_done; 598 599 bundle = ccb->ccb_cmd; 600 io = &bundle->io; 601 sge = &bundle->sge; 602 603 io->function = physdisk ? MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH : 604 MPI_FUNCTION_SCSI_IO_REQUEST; 605 /* 606 * bus is always 0 607 * io->bus = htole16(sc->sc_bus); 608 */ 609 io->target_id = target; 610 611 io->cdb_length = sizeof(inq); 612 io->sense_buf_len = sizeof(struct scsi_sense_data); 613 io->msg_flags = MPI_SCSIIO_SENSE_BUF_ADDR_WIDTH_64; 614 615 io->msg_context = htole32(ccb->ccb_id); 616 617 /* 618 * always lun 0 619 * io->lun[0] = htobe16(link->lun); 620 */ 621 622 io->direction = MPI_SCSIIO_DIR_READ; 623 io->tagging = MPI_SCSIIO_ATTR_NO_DISCONNECT; 624 625 bcopy(&inq, io->cdb, sizeof(inq)); 626 627 io->data_length = htole32(sizeof(struct scsi_inquiry_data)); 628 629 io->sense_buf_low_addr = htole32(ccb->ccb_cmd_dva + 630 ((u_int8_t *)&bundle->sense - (u_int8_t *)bundle)); 631 632 sge->sg_hdr = htole32(MPI_SGE_FL_TYPE_SIMPLE | MPI_SGE_FL_SIZE_64 | 633 MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | MPI_SGE_FL_EOL | 634 (u_int32_t)sizeof(inq)); 635 636 addr = ccb->ccb_cmd_dva + 637 ((u_int8_t *)&bundle->inqbuf - (u_int8_t *)bundle); 638 sge->sg_hi_addr = htole32((u_int32_t)(addr >> 32)); 639 sge->sg_lo_addr = htole32((u_int32_t)addr); 640 641 if (mpi_poll(sc, ccb, 5000) != 0) 642 return (1); 643 644 if (ccb->ccb_rcb != NULL) 645 mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva); 646 647 mpi_put_ccb(sc, ccb); 648 649 return (0); 650 } 651 652 void 653 mpi_detach(struct mpi_softc *sc) 654 { 655 656 } 657 658 int 659 mpi_intr(void *arg) 660 { 661 struct mpi_softc *sc = arg; 662 u_int32_t reg; 663 int rv = 0; 664 665 while ((reg = mpi_pop_reply(sc)) != 0xffffffff) { 666 mpi_reply(sc, reg); 667 rv = 1; 668 } 669 670 return (rv); 671 } 672 673 int 674 mpi_reply(struct mpi_softc *sc, u_int32_t reg) 675 { 676 struct mpi_ccb *ccb; 677 struct mpi_rcb *rcb = NULL; 678 struct mpi_msg_reply *reply = NULL; 679 u_int32_t reply_dva; 680 int id; 681 int i; 682 683 DNPRINTF(MPI_D_INTR, "%s: mpi_reply reg: 0x%08x\n", DEVNAME(sc), reg); 684 685 if (reg & MPI_REPLY_QUEUE_ADDRESS) { 686 bus_dmamap_sync(sc->sc_dmat, 687 MPI_DMA_MAP(sc->sc_replies), 0, PAGE_SIZE, 688 BUS_DMASYNC_POSTREAD); 689 690 reply_dva = (reg & MPI_REPLY_QUEUE_ADDRESS_MASK) << 1; 691 692 i = (reply_dva - (u_int32_t)MPI_DMA_DVA(sc->sc_replies)) / 693 MPI_REPLY_SIZE; 694 rcb = &sc->sc_rcbs[i]; 695 reply = rcb->rcb_reply; 696 697 id = letoh32(reply->msg_context); 698 699 bus_dmamap_sync(sc->sc_dmat, 700 MPI_DMA_MAP(sc->sc_replies), 0, PAGE_SIZE, 701 BUS_DMASYNC_PREREAD); 702 } else { 703 switch (reg & MPI_REPLY_QUEUE_TYPE_MASK) { 704 case MPI_REPLY_QUEUE_TYPE_INIT: 705 id = reg & MPI_REPLY_QUEUE_CONTEXT; 706 break; 707 708 default: 709 panic("%s: unsupported context reply\n", 710 DEVNAME(sc)); 711 } 712 } 713 714 DNPRINTF(MPI_D_INTR, "%s: mpi_reply id: %d reply: %p\n", 715 DEVNAME(sc), id, reply); 716 717 ccb = &sc->sc_ccbs[id]; 718 719 bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_requests), 720 ccb->ccb_offset, MPI_REQUEST_SIZE, 721 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 722 ccb->ccb_state = MPI_CCB_READY; 723 ccb->ccb_rcb = rcb; 724 725 ccb->ccb_done(ccb); 726 727 return (id); 728 } 729 730 struct mpi_dmamem * 731 mpi_dmamem_alloc(struct mpi_softc *sc, size_t size) 732 { 733 struct mpi_dmamem *mdm; 734 int nsegs; 735 736 mdm = malloc(sizeof(struct mpi_dmamem), M_DEVBUF, M_NOWAIT | M_ZERO); 737 if (mdm == NULL) 738 return (NULL); 739 740 mdm->mdm_size = size; 741 742 if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, 743 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &mdm->mdm_map) != 0) 744 goto mdmfree; 745 746 if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &mdm->mdm_seg, 747 1, &nsegs, BUS_DMA_NOWAIT) != 0) 748 goto destroy; 749 750 if (bus_dmamem_map(sc->sc_dmat, &mdm->mdm_seg, nsegs, size, 751 &mdm->mdm_kva, BUS_DMA_NOWAIT) != 0) 752 goto free; 753 754 if (bus_dmamap_load(sc->sc_dmat, mdm->mdm_map, mdm->mdm_kva, size, 755 NULL, BUS_DMA_NOWAIT) != 0) 756 goto unmap; 757 758 bzero(mdm->mdm_kva, size); 759 760 DNPRINTF(MPI_D_MEM, "%s: mpi_dmamem_alloc size: %d mdm: %#x " 761 "map: %#x nsegs: %d segs: %#x kva: %x\n", 762 DEVNAME(sc), size, mdm->mdm_map, nsegs, mdm->mdm_seg, mdm->mdm_kva); 763 764 return (mdm); 765 766 unmap: 767 bus_dmamem_unmap(sc->sc_dmat, mdm->mdm_kva, size); 768 free: 769 bus_dmamem_free(sc->sc_dmat, &mdm->mdm_seg, 1); 770 destroy: 771 bus_dmamap_destroy(sc->sc_dmat, mdm->mdm_map); 772 mdmfree: 773 free(mdm, M_DEVBUF); 774 775 return (NULL); 776 } 777 778 void 779 mpi_dmamem_free(struct mpi_softc *sc, struct mpi_dmamem *mdm) 780 { 781 DNPRINTF(MPI_D_MEM, "%s: mpi_dmamem_free %#x\n", DEVNAME(sc), mdm); 782 783 bus_dmamap_unload(sc->sc_dmat, mdm->mdm_map); 784 bus_dmamem_unmap(sc->sc_dmat, mdm->mdm_kva, mdm->mdm_size); 785 bus_dmamem_free(sc->sc_dmat, &mdm->mdm_seg, 1); 786 bus_dmamap_destroy(sc->sc_dmat, mdm->mdm_map); 787 free(mdm, M_DEVBUF); 788 } 789 790 int 791 mpi_alloc_ccbs(struct mpi_softc *sc) 792 { 793 struct mpi_ccb *ccb; 794 u_int8_t *cmd; 795 int i; 796 797 TAILQ_INIT(&sc->sc_ccb_free); 798 799 sc->sc_ccbs = malloc(sizeof(struct mpi_ccb) * sc->sc_maxcmds, 800 M_DEVBUF, M_WAITOK | M_CANFAIL | M_ZERO); 801 if (sc->sc_ccbs == NULL) { 802 printf("%s: unable to allocate ccbs\n", DEVNAME(sc)); 803 return (1); 804 } 805 806 sc->sc_requests = mpi_dmamem_alloc(sc, 807 MPI_REQUEST_SIZE * sc->sc_maxcmds); 808 if (sc->sc_requests == NULL) { 809 printf("%s: unable to allocate ccb dmamem\n", DEVNAME(sc)); 810 goto free_ccbs; 811 } 812 cmd = MPI_DMA_KVA(sc->sc_requests); 813 bzero(cmd, MPI_REQUEST_SIZE * sc->sc_maxcmds); 814 815 for (i = 0; i < sc->sc_maxcmds; i++) { 816 ccb = &sc->sc_ccbs[i]; 817 818 if (bus_dmamap_create(sc->sc_dmat, MAXPHYS, 819 sc->sc_max_sgl_len, MAXPHYS, 0, 0, 820 &ccb->ccb_dmamap) != 0) { 821 printf("%s: unable to create dma map\n", DEVNAME(sc)); 822 goto free_maps; 823 } 824 825 ccb->ccb_sc = sc; 826 ccb->ccb_id = i; 827 ccb->ccb_offset = MPI_REQUEST_SIZE * i; 828 829 ccb->ccb_cmd = &cmd[ccb->ccb_offset]; 830 ccb->ccb_cmd_dva = (u_int32_t)MPI_DMA_DVA(sc->sc_requests) + 831 ccb->ccb_offset; 832 833 DNPRINTF(MPI_D_CCB, "%s: mpi_alloc_ccbs(%d) ccb: %#x map: %#x " 834 "sc: %#x id: %#x offs: %#x cmd: %#x dva: %#x\n", 835 DEVNAME(sc), i, ccb, ccb->ccb_dmamap, ccb->ccb_sc, 836 ccb->ccb_id, ccb->ccb_offset, ccb->ccb_cmd, 837 ccb->ccb_cmd_dva); 838 839 mpi_put_ccb(sc, ccb); 840 } 841 842 return (0); 843 844 free_maps: 845 while ((ccb = mpi_get_ccb(sc)) != NULL) 846 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 847 848 mpi_dmamem_free(sc, sc->sc_requests); 849 free_ccbs: 850 free(sc->sc_ccbs, M_DEVBUF); 851 852 return (1); 853 } 854 855 struct mpi_ccb * 856 mpi_get_ccb(struct mpi_softc *sc) 857 { 858 struct mpi_ccb *ccb; 859 860 ccb = TAILQ_FIRST(&sc->sc_ccb_free); 861 if (ccb == NULL) { 862 DNPRINTF(MPI_D_CCB, "%s: mpi_get_ccb == NULL\n", DEVNAME(sc)); 863 return (NULL); 864 } 865 866 TAILQ_REMOVE(&sc->sc_ccb_free, ccb, ccb_link); 867 868 ccb->ccb_state = MPI_CCB_READY; 869 870 DNPRINTF(MPI_D_CCB, "%s: mpi_get_ccb %#x\n", DEVNAME(sc), ccb); 871 872 return (ccb); 873 } 874 875 void 876 mpi_put_ccb(struct mpi_softc *sc, struct mpi_ccb *ccb) 877 { 878 DNPRINTF(MPI_D_CCB, "%s: mpi_put_ccb %#x\n", DEVNAME(sc), ccb); 879 880 ccb->ccb_state = MPI_CCB_FREE; 881 ccb->ccb_xs = NULL; 882 ccb->ccb_done = NULL; 883 bzero(ccb->ccb_cmd, MPI_REQUEST_SIZE); 884 TAILQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_link); 885 } 886 887 int 888 mpi_alloc_replies(struct mpi_softc *sc) 889 { 890 DNPRINTF(MPI_D_MISC, "%s: mpi_alloc_replies\n", DEVNAME(sc)); 891 892 sc->sc_rcbs = malloc(MPI_REPLY_COUNT * sizeof(struct mpi_rcb), 893 M_DEVBUF, M_WAITOK|M_CANFAIL); 894 if (sc->sc_rcbs == NULL) 895 return (1); 896 897 sc->sc_replies = mpi_dmamem_alloc(sc, PAGE_SIZE); 898 if (sc->sc_replies == NULL) { 899 free(sc->sc_rcbs, M_DEVBUF); 900 return (1); 901 } 902 903 return (0); 904 } 905 906 void 907 mpi_push_replies(struct mpi_softc *sc) 908 { 909 struct mpi_rcb *rcb; 910 char *kva = MPI_DMA_KVA(sc->sc_replies); 911 int i; 912 913 bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_replies), 914 0, PAGE_SIZE, BUS_DMASYNC_PREREAD); 915 916 for (i = 0; i < MPI_REPLY_COUNT; i++) { 917 rcb = &sc->sc_rcbs[i]; 918 919 rcb->rcb_reply = kva + MPI_REPLY_SIZE * i; 920 rcb->rcb_reply_dva = (u_int32_t)MPI_DMA_DVA(sc->sc_replies) + 921 MPI_REPLY_SIZE * i; 922 mpi_push_reply(sc, rcb->rcb_reply_dva); 923 } 924 } 925 926 void 927 mpi_start(struct mpi_softc *sc, struct mpi_ccb *ccb) 928 { 929 DNPRINTF(MPI_D_RW, "%s: mpi_start %#x\n", DEVNAME(sc), 930 ccb->ccb_cmd_dva); 931 932 bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_requests), 933 ccb->ccb_offset, MPI_REQUEST_SIZE, 934 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 935 936 ccb->ccb_state = MPI_CCB_QUEUED; 937 mpi_write(sc, MPI_REQ_QUEUE, ccb->ccb_cmd_dva); 938 } 939 940 int 941 mpi_complete(struct mpi_softc *sc, struct mpi_ccb *ccb, int timeout) 942 { 943 u_int32_t reg; 944 int id = -1; 945 946 DNPRINTF(MPI_D_INTR, "%s: mpi_complete timeout %d\n", DEVNAME(sc), 947 timeout); 948 949 do { 950 reg = mpi_pop_reply(sc); 951 if (reg == 0xffffffff) { 952 if (timeout-- == 0) 953 return (1); 954 955 delay(1000); 956 continue; 957 } 958 959 id = mpi_reply(sc, reg); 960 961 } while (ccb->ccb_id != id); 962 963 return (0); 964 } 965 966 int 967 mpi_poll(struct mpi_softc *sc, struct mpi_ccb *ccb, int timeout) 968 { 969 int error; 970 int s; 971 972 DNPRINTF(MPI_D_CMD, "%s: mpi_poll\n", DEVNAME(sc)); 973 974 s = splbio(); 975 mpi_start(sc, ccb); 976 error = mpi_complete(sc, ccb, timeout); 977 splx(s); 978 979 return (error); 980 } 981 982 int 983 mpi_scsi_cmd(struct scsi_xfer *xs) 984 { 985 struct scsi_link *link = xs->sc_link; 986 struct mpi_softc *sc = link->adapter_softc; 987 struct mpi_ccb *ccb; 988 struct mpi_ccb_bundle *mcb; 989 struct mpi_msg_scsi_io *io; 990 int s; 991 992 DNPRINTF(MPI_D_CMD, "%s: mpi_scsi_cmd\n", DEVNAME(sc)); 993 994 if (xs->cmdlen > MPI_CDB_LEN) { 995 DNPRINTF(MPI_D_CMD, "%s: CBD too big %d\n", 996 DEVNAME(sc), xs->cmdlen); 997 bzero(&xs->sense, sizeof(xs->sense)); 998 xs->sense.error_code = SSD_ERRCODE_VALID | 0x70; 999 xs->sense.flags = SKEY_ILLEGAL_REQUEST; 1000 xs->sense.add_sense_code = 0x20; 1001 xs->error = XS_SENSE; 1002 s = splbio(); 1003 scsi_done(xs); 1004 splx(s); 1005 return (COMPLETE); 1006 } 1007 1008 s = splbio(); 1009 ccb = mpi_get_ccb(sc); 1010 splx(s); 1011 if (ccb == NULL) { 1012 xs->error = XS_DRIVER_STUFFUP; 1013 s = splbio(); 1014 scsi_done(xs); 1015 splx(s); 1016 return (COMPLETE); 1017 } 1018 DNPRINTF(MPI_D_CMD, "%s: ccb_id: %d xs->flags: 0x%x\n", 1019 DEVNAME(sc), ccb->ccb_id, xs->flags); 1020 1021 ccb->ccb_xs = xs; 1022 ccb->ccb_done = mpi_scsi_cmd_done; 1023 1024 mcb = ccb->ccb_cmd; 1025 io = &mcb->mcb_io; 1026 1027 io->function = MPI_FUNCTION_SCSI_IO_REQUEST; 1028 /* 1029 * bus is always 0 1030 * io->bus = htole16(sc->sc_bus); 1031 */ 1032 io->target_id = link->target; 1033 1034 io->cdb_length = xs->cmdlen; 1035 io->sense_buf_len = sizeof(xs->sense); 1036 io->msg_flags = MPI_SCSIIO_SENSE_BUF_ADDR_WIDTH_64; 1037 1038 io->msg_context = htole32(ccb->ccb_id); 1039 1040 io->lun[0] = htobe16(link->lun); 1041 1042 switch (xs->flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) { 1043 case SCSI_DATA_IN: 1044 io->direction = MPI_SCSIIO_DIR_READ; 1045 break; 1046 case SCSI_DATA_OUT: 1047 io->direction = MPI_SCSIIO_DIR_WRITE; 1048 break; 1049 default: 1050 io->direction = MPI_SCSIIO_DIR_NONE; 1051 break; 1052 } 1053 1054 if (link->quirks & SDEV_NOTAGS) 1055 io->tagging = MPI_SCSIIO_ATTR_UNTAGGED; 1056 else 1057 io->tagging = MPI_SCSIIO_ATTR_SIMPLE_Q; 1058 1059 bcopy(xs->cmd, io->cdb, xs->cmdlen); 1060 1061 io->data_length = htole32(xs->datalen); 1062 1063 io->sense_buf_low_addr = htole32(ccb->ccb_cmd_dva + 1064 ((u_int8_t *)&mcb->mcb_sense - (u_int8_t *)mcb)); 1065 1066 if (mpi_load_xs(ccb) != 0) { 1067 xs->error = XS_DRIVER_STUFFUP; 1068 s = splbio(); 1069 mpi_put_ccb(sc, ccb); 1070 scsi_done(xs); 1071 splx(s); 1072 return (COMPLETE); 1073 } 1074 1075 timeout_set(&xs->stimeout, mpi_timeout_xs, ccb); 1076 1077 if (xs->flags & SCSI_POLL) { 1078 if (mpi_poll(sc, ccb, xs->timeout) != 0) 1079 xs->error = XS_DRIVER_STUFFUP; 1080 return (COMPLETE); 1081 } 1082 1083 s = splbio(); 1084 mpi_start(sc, ccb); 1085 splx(s); 1086 return (SUCCESSFULLY_QUEUED); 1087 } 1088 1089 void 1090 mpi_scsi_cmd_done(struct mpi_ccb *ccb) 1091 { 1092 struct mpi_softc *sc = ccb->ccb_sc; 1093 struct scsi_xfer *xs = ccb->ccb_xs; 1094 struct mpi_ccb_bundle *mcb = ccb->ccb_cmd; 1095 bus_dmamap_t dmap = ccb->ccb_dmamap; 1096 struct mpi_msg_scsi_io_error *sie; 1097 1098 if (xs->datalen != 0) { 1099 bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize, 1100 (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_POSTREAD : 1101 BUS_DMASYNC_POSTWRITE); 1102 1103 bus_dmamap_unload(sc->sc_dmat, dmap); 1104 } 1105 1106 /* timeout_del */ 1107 xs->error = XS_NOERROR; 1108 xs->resid = 0; 1109 xs->flags |= ITSDONE; 1110 1111 if (ccb->ccb_rcb == NULL) { 1112 /* no scsi error, we're ok so drop out early */ 1113 xs->status = SCSI_OK; 1114 mpi_put_ccb(sc, ccb); 1115 scsi_done(xs); 1116 return; 1117 } 1118 1119 sie = ccb->ccb_rcb->rcb_reply; 1120 1121 DNPRINTF(MPI_D_CMD, "%s: mpi_scsi_cmd_done xs cmd: 0x%02x len: %d " 1122 "flags 0x%x\n", DEVNAME(sc), xs->cmd->opcode, xs->datalen, 1123 xs->flags); 1124 DNPRINTF(MPI_D_CMD, "%s: target_id: %d bus: %d msg_length: %d " 1125 "function: 0x%02x\n", DEVNAME(sc), sie->target_id, sie->bus, 1126 sie->msg_length, sie->function); 1127 DNPRINTF(MPI_D_CMD, "%s: cdb_length: %d sense_buf_length: %d " 1128 "msg_flags: 0x%02x\n", DEVNAME(sc), sie->cdb_length, 1129 sie->sense_buf_len, sie->msg_flags); 1130 DNPRINTF(MPI_D_CMD, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 1131 letoh32(sie->msg_context)); 1132 DNPRINTF(MPI_D_CMD, "%s: scsi_status: 0x%02x scsi_state: 0x%02x " 1133 "ioc_status: 0x%04x\n", DEVNAME(sc), sie->scsi_status, 1134 sie->scsi_state, letoh16(sie->ioc_status)); 1135 DNPRINTF(MPI_D_CMD, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 1136 letoh32(sie->ioc_loginfo)); 1137 DNPRINTF(MPI_D_CMD, "%s: transfer_count: %d\n", DEVNAME(sc), 1138 letoh32(sie->transfer_count)); 1139 DNPRINTF(MPI_D_CMD, "%s: sense_count: %d\n", DEVNAME(sc), 1140 letoh32(sie->sense_count)); 1141 DNPRINTF(MPI_D_CMD, "%s: response_info: 0x%08x\n", DEVNAME(sc), 1142 letoh32(sie->response_info)); 1143 DNPRINTF(MPI_D_CMD, "%s: tag: 0x%04x\n", DEVNAME(sc), 1144 letoh16(sie->tag)); 1145 1146 xs->status = sie->scsi_status; 1147 switch (letoh16(sie->ioc_status)) { 1148 case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: 1149 xs->resid = xs->datalen - letoh32(sie->transfer_count); 1150 if (sie->scsi_state & MPI_SCSIIO_ERR_STATE_NO_SCSI_STATUS) { 1151 xs->error = XS_DRIVER_STUFFUP; 1152 break; 1153 } 1154 /* FALLTHROUGH */ 1155 case MPI_IOCSTATUS_SUCCESS: 1156 case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: 1157 switch (xs->status) { 1158 case SCSI_OK: 1159 xs->resid = 0; 1160 break; 1161 1162 case SCSI_CHECK: 1163 xs->error = XS_SENSE; 1164 break; 1165 1166 case SCSI_BUSY: 1167 case SCSI_QUEUE_FULL: 1168 xs->error = XS_BUSY; 1169 break; 1170 1171 default: 1172 xs->error = XS_DRIVER_STUFFUP; 1173 break; 1174 } 1175 break; 1176 1177 case MPI_IOCSTATUS_BUSY: 1178 case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: 1179 xs->error = XS_BUSY; 1180 break; 1181 1182 case MPI_IOCSTATUS_SCSI_INVALID_BUS: 1183 case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: 1184 case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 1185 xs->error = XS_SELTIMEOUT; 1186 break; 1187 1188 default: 1189 xs->error = XS_DRIVER_STUFFUP; 1190 break; 1191 } 1192 1193 if (sie->scsi_state & MPI_SCSIIO_ERR_STATE_AUTOSENSE_VALID) 1194 bcopy(&mcb->mcb_sense, &xs->sense, sizeof(xs->sense)); 1195 1196 DNPRINTF(MPI_D_CMD, "%s: xs err: 0x%02x status: %d\n", DEVNAME(sc), 1197 xs->error, xs->status); 1198 1199 mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva); 1200 mpi_put_ccb(sc, ccb); 1201 scsi_done(xs); 1202 } 1203 1204 void 1205 mpi_timeout_xs(void *arg) 1206 { 1207 /* XXX */ 1208 } 1209 1210 int 1211 mpi_load_xs(struct mpi_ccb *ccb) 1212 { 1213 struct mpi_softc *sc = ccb->ccb_sc; 1214 struct scsi_xfer *xs = ccb->ccb_xs; 1215 struct mpi_ccb_bundle *mcb = ccb->ccb_cmd; 1216 struct mpi_msg_scsi_io *io = &mcb->mcb_io; 1217 struct mpi_sge *sge, *nsge = &mcb->mcb_sgl[0]; 1218 struct mpi_sge *ce = NULL, *nce; 1219 u_int64_t ce_dva; 1220 bus_dmamap_t dmap = ccb->ccb_dmamap; 1221 u_int32_t addr, flags; 1222 int i, error; 1223 1224 if (xs->datalen == 0) { 1225 nsge->sg_hdr = htole32(MPI_SGE_FL_TYPE_SIMPLE | 1226 MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | MPI_SGE_FL_EOL); 1227 return (0); 1228 } 1229 1230 error = bus_dmamap_load(sc->sc_dmat, dmap, 1231 xs->data, xs->datalen, NULL, 1232 (xs->flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 1233 if (error) { 1234 printf("%s: error %d loading dmamap\n", DEVNAME(sc), error); 1235 return (1); 1236 } 1237 1238 flags = MPI_SGE_FL_TYPE_SIMPLE | MPI_SGE_FL_SIZE_64; 1239 if (xs->flags & SCSI_DATA_OUT) 1240 flags |= MPI_SGE_FL_DIR_OUT; 1241 1242 if (dmap->dm_nsegs > sc->sc_first_sgl_len) { 1243 ce = &mcb->mcb_sgl[sc->sc_first_sgl_len - 1]; 1244 io->chain_offset = ((u_int8_t *)ce - (u_int8_t *)io) / 4; 1245 } 1246 1247 for (i = 0; i < dmap->dm_nsegs; i++) { 1248 1249 if (nsge == ce) { 1250 nsge++; 1251 sge->sg_hdr |= htole32(MPI_SGE_FL_LAST); 1252 1253 DNPRINTF(MPI_D_DMA, "%s: - 0x%08x 0x%08x 0x%08x\n", 1254 DEVNAME(sc), sge->sg_hdr, 1255 sge->sg_hi_addr, sge->sg_lo_addr); 1256 1257 if ((dmap->dm_nsegs - i) > sc->sc_chain_len) { 1258 nce = &nsge[sc->sc_chain_len - 1]; 1259 addr = ((u_int8_t *)nce - (u_int8_t *)nsge) / 4; 1260 addr = addr << 16 | 1261 sizeof(struct mpi_sge) * sc->sc_chain_len; 1262 } else { 1263 nce = NULL; 1264 addr = sizeof(struct mpi_sge) * 1265 (dmap->dm_nsegs - i); 1266 } 1267 1268 ce->sg_hdr = htole32(MPI_SGE_FL_TYPE_CHAIN | 1269 MPI_SGE_FL_SIZE_64 | addr); 1270 1271 ce_dva = ccb->ccb_cmd_dva + 1272 ((u_int8_t *)nsge - (u_int8_t *)mcb); 1273 1274 addr = (u_int32_t)(ce_dva >> 32); 1275 ce->sg_hi_addr = htole32(addr); 1276 addr = (u_int32_t)ce_dva; 1277 ce->sg_lo_addr = htole32(addr); 1278 1279 DNPRINTF(MPI_D_DMA, "%s: ce: 0x%08x 0x%08x 0x%08x\n", 1280 DEVNAME(sc), ce->sg_hdr, ce->sg_hi_addr, 1281 ce->sg_lo_addr); 1282 1283 ce = nce; 1284 } 1285 1286 DNPRINTF(MPI_D_DMA, "%s: %d: %d 0x%016llx\n", DEVNAME(sc), 1287 i, dmap->dm_segs[i].ds_len, 1288 (u_int64_t)dmap->dm_segs[i].ds_addr); 1289 1290 sge = nsge; 1291 1292 sge->sg_hdr = htole32(flags | dmap->dm_segs[i].ds_len); 1293 addr = (u_int32_t)((u_int64_t)dmap->dm_segs[i].ds_addr >> 32); 1294 sge->sg_hi_addr = htole32(addr); 1295 addr = (u_int32_t)dmap->dm_segs[i].ds_addr; 1296 sge->sg_lo_addr = htole32(addr); 1297 1298 DNPRINTF(MPI_D_DMA, "%s: %d: 0x%08x 0x%08x 0x%08x\n", 1299 DEVNAME(sc), i, sge->sg_hdr, sge->sg_hi_addr, 1300 sge->sg_lo_addr); 1301 1302 nsge = sge + 1; 1303 } 1304 1305 /* terminate list */ 1306 sge->sg_hdr |= htole32(MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | 1307 MPI_SGE_FL_EOL); 1308 1309 bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize, 1310 (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD : 1311 BUS_DMASYNC_PREWRITE); 1312 1313 return (0); 1314 } 1315 1316 void 1317 mpi_minphys(struct buf *bp) 1318 { 1319 /* XXX */ 1320 if (bp->b_bcount > MAXPHYS) 1321 bp->b_bcount = MAXPHYS; 1322 minphys(bp); 1323 } 1324 1325 int 1326 mpi_scsi_ioctl(struct scsi_link *a, u_long b, caddr_t c, int d, struct proc *e) 1327 { 1328 return (ENOTTY); 1329 } 1330 1331 u_int32_t 1332 mpi_read(struct mpi_softc *sc, bus_size_t r) 1333 { 1334 u_int32_t rv; 1335 1336 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 1337 BUS_SPACE_BARRIER_READ); 1338 rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r); 1339 1340 DNPRINTF(MPI_D_RW, "%s: mpi_read %#x %#x\n", DEVNAME(sc), r, rv); 1341 1342 return (rv); 1343 } 1344 1345 void 1346 mpi_write(struct mpi_softc *sc, bus_size_t r, u_int32_t v) 1347 { 1348 DNPRINTF(MPI_D_RW, "%s: mpi_write %#x %#x\n", DEVNAME(sc), r, v); 1349 1350 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v); 1351 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 1352 BUS_SPACE_BARRIER_WRITE); 1353 } 1354 1355 int 1356 mpi_wait_eq(struct mpi_softc *sc, bus_size_t r, u_int32_t mask, 1357 u_int32_t target) 1358 { 1359 int i; 1360 1361 DNPRINTF(MPI_D_RW, "%s: mpi_wait_eq %#x %#x %#x\n", DEVNAME(sc), r, 1362 mask, target); 1363 1364 for (i = 0; i < 10000; i++) { 1365 if ((mpi_read(sc, r) & mask) == target) 1366 return (0); 1367 delay(1000); 1368 } 1369 1370 return (1); 1371 } 1372 1373 int 1374 mpi_wait_ne(struct mpi_softc *sc, bus_size_t r, u_int32_t mask, 1375 u_int32_t target) 1376 { 1377 int i; 1378 1379 DNPRINTF(MPI_D_RW, "%s: mpi_wait_ne %#x %#x %#x\n", DEVNAME(sc), r, 1380 mask, target); 1381 1382 for (i = 0; i < 10000; i++) { 1383 if ((mpi_read(sc, r) & mask) != target) 1384 return (0); 1385 delay(1000); 1386 } 1387 1388 return (1); 1389 } 1390 1391 int 1392 mpi_init(struct mpi_softc *sc) 1393 { 1394 u_int32_t db; 1395 int i; 1396 1397 /* spin until the IOC leaves the RESET state */ 1398 if (mpi_wait_ne(sc, MPI_DOORBELL, MPI_DOORBELL_STATE, 1399 MPI_DOORBELL_STATE_RESET) != 0) { 1400 DNPRINTF(MPI_D_MISC, "%s: mpi_init timeout waiting to leave " 1401 "reset state\n", DEVNAME(sc)); 1402 return (1); 1403 } 1404 1405 /* check current ownership */ 1406 db = mpi_read_db(sc); 1407 if ((db & MPI_DOORBELL_WHOINIT) == MPI_DOORBELL_WHOINIT_PCIPEER) { 1408 DNPRINTF(MPI_D_MISC, "%s: mpi_init initialised by pci peer\n", 1409 DEVNAME(sc)); 1410 return (0); 1411 } 1412 1413 for (i = 0; i < 5; i++) { 1414 switch (db & MPI_DOORBELL_STATE) { 1415 case MPI_DOORBELL_STATE_READY: 1416 DNPRINTF(MPI_D_MISC, "%s: mpi_init ioc is ready\n", 1417 DEVNAME(sc)); 1418 return (0); 1419 1420 case MPI_DOORBELL_STATE_OPER: 1421 case MPI_DOORBELL_STATE_FAULT: 1422 DNPRINTF(MPI_D_MISC, "%s: mpi_init ioc is being " 1423 "reset\n" , DEVNAME(sc)); 1424 if (mpi_reset_soft(sc) != 0) 1425 mpi_reset_hard(sc); 1426 break; 1427 1428 case MPI_DOORBELL_STATE_RESET: 1429 DNPRINTF(MPI_D_MISC, "%s: mpi_init waiting to come " 1430 "out of reset\n", DEVNAME(sc)); 1431 if (mpi_wait_ne(sc, MPI_DOORBELL, MPI_DOORBELL_STATE, 1432 MPI_DOORBELL_STATE_RESET) != 0) 1433 return (1); 1434 break; 1435 } 1436 db = mpi_read_db(sc); 1437 } 1438 1439 return (1); 1440 } 1441 1442 int 1443 mpi_reset_soft(struct mpi_softc *sc) 1444 { 1445 DNPRINTF(MPI_D_MISC, "%s: mpi_reset_soft\n", DEVNAME(sc)); 1446 1447 if (mpi_read_db(sc) & MPI_DOORBELL_INUSE) 1448 return (1); 1449 1450 mpi_write_db(sc, 1451 MPI_DOORBELL_FUNCTION(MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET)); 1452 if (mpi_wait_eq(sc, MPI_INTR_STATUS, 1453 MPI_INTR_STATUS_IOCDOORBELL, 0) != 0) 1454 return (1); 1455 1456 if (mpi_wait_eq(sc, MPI_DOORBELL, MPI_DOORBELL_STATE, 1457 MPI_DOORBELL_STATE_READY) != 0) 1458 return (1); 1459 1460 return (0); 1461 } 1462 1463 int 1464 mpi_reset_hard(struct mpi_softc *sc) 1465 { 1466 DNPRINTF(MPI_D_MISC, "%s: mpi_reset_hard\n", DEVNAME(sc)); 1467 1468 /* enable diagnostic register */ 1469 mpi_write(sc, MPI_WRITESEQ, 0xff); 1470 mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_1); 1471 mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_2); 1472 mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_3); 1473 mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_4); 1474 mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_5); 1475 1476 /* reset ioc */ 1477 mpi_write(sc, MPI_HOSTDIAG, MPI_HOSTDIAG_RESET_ADAPTER); 1478 1479 delay(10000); 1480 1481 /* disable diagnostic register */ 1482 mpi_write(sc, MPI_WRITESEQ, 0xff); 1483 1484 /* restore pci bits? */ 1485 1486 /* firmware bits? */ 1487 return (0); 1488 } 1489 1490 int 1491 mpi_handshake_send(struct mpi_softc *sc, void *buf, size_t dwords) 1492 { 1493 u_int32_t *query = buf; 1494 int i; 1495 1496 /* make sure the doorbell is not in use. */ 1497 if (mpi_read_db(sc) & MPI_DOORBELL_INUSE) 1498 return (1); 1499 1500 /* clear pending doorbell interrupts */ 1501 if (mpi_read_intr(sc) & MPI_INTR_STATUS_DOORBELL) 1502 mpi_write_intr(sc, 0); 1503 1504 /* 1505 * first write the doorbell with the handshake function and the 1506 * dword count. 1507 */ 1508 mpi_write_db(sc, MPI_DOORBELL_FUNCTION(MPI_FUNCTION_HANDSHAKE) | 1509 MPI_DOORBELL_DWORDS(dwords)); 1510 1511 /* 1512 * the doorbell used bit will be set because a doorbell function has 1513 * started. Wait for the interrupt and then ack it. 1514 */ 1515 if (mpi_wait_db_int(sc) != 0) 1516 return (1); 1517 mpi_write_intr(sc, 0); 1518 1519 /* poll for the acknowledgement. */ 1520 if (mpi_wait_db_ack(sc) != 0) 1521 return (1); 1522 1523 /* write the query through the doorbell. */ 1524 for (i = 0; i < dwords; i++) { 1525 mpi_write_db(sc, htole32(query[i])); 1526 if (mpi_wait_db_ack(sc) != 0) 1527 return (1); 1528 } 1529 1530 return (0); 1531 } 1532 1533 int 1534 mpi_handshake_recv_dword(struct mpi_softc *sc, u_int32_t *dword) 1535 { 1536 u_int16_t *words = (u_int16_t *)dword; 1537 int i; 1538 1539 for (i = 0; i < 2; i++) { 1540 if (mpi_wait_db_int(sc) != 0) 1541 return (1); 1542 words[i] = letoh16(mpi_read_db(sc) & MPI_DOORBELL_DATA_MASK); 1543 mpi_write_intr(sc, 0); 1544 } 1545 1546 return (0); 1547 } 1548 1549 int 1550 mpi_handshake_recv(struct mpi_softc *sc, void *buf, size_t dwords) 1551 { 1552 struct mpi_msg_reply *reply = buf; 1553 u_int32_t *dbuf = buf, dummy; 1554 int i; 1555 1556 /* get the first dword so we can read the length out of the header. */ 1557 if (mpi_handshake_recv_dword(sc, &dbuf[0]) != 0) 1558 return (1); 1559 1560 DNPRINTF(MPI_D_CMD, "%s: mpi_handshake_recv dwords: %d reply: %d\n", 1561 DEVNAME(sc), dwords, reply->msg_length); 1562 1563 /* 1564 * the total length, in dwords, is in the message length field of the 1565 * reply header. 1566 */ 1567 for (i = 1; i < MIN(dwords, reply->msg_length); i++) { 1568 if (mpi_handshake_recv_dword(sc, &dbuf[i]) != 0) 1569 return (1); 1570 } 1571 1572 /* if there's extra stuff to come off the ioc, discard it */ 1573 while (i++ < reply->msg_length) { 1574 if (mpi_handshake_recv_dword(sc, &dummy) != 0) 1575 return (1); 1576 DNPRINTF(MPI_D_CMD, "%s: mpi_handshake_recv dummy read: " 1577 "0x%08x\n", DEVNAME(sc), dummy); 1578 } 1579 1580 /* wait for the doorbell used bit to be reset and clear the intr */ 1581 if (mpi_wait_db_int(sc) != 0) 1582 return (1); 1583 mpi_write_intr(sc, 0); 1584 1585 return (0); 1586 } 1587 1588 void 1589 mpi_empty_done(struct mpi_ccb *ccb) 1590 { 1591 /* nothing to do */ 1592 } 1593 1594 int 1595 mpi_iocfacts(struct mpi_softc *sc) 1596 { 1597 struct mpi_msg_iocfacts_request ifq; 1598 struct mpi_msg_iocfacts_reply ifp; 1599 1600 DNPRINTF(MPI_D_MISC, "%s: mpi_iocfacts\n", DEVNAME(sc)); 1601 1602 bzero(&ifq, sizeof(ifq)); 1603 bzero(&ifp, sizeof(ifp)); 1604 1605 ifq.function = MPI_FUNCTION_IOC_FACTS; 1606 ifq.chain_offset = 0; 1607 ifq.msg_flags = 0; 1608 ifq.msg_context = htole32(0xdeadbeef); 1609 1610 if (mpi_handshake_send(sc, &ifq, dwordsof(ifq)) != 0) { 1611 DNPRINTF(MPI_D_MISC, "%s: mpi_iocfacts send failed\n", 1612 DEVNAME(sc)); 1613 return (1); 1614 } 1615 1616 if (mpi_handshake_recv(sc, &ifp, dwordsof(ifp)) != 0) { 1617 DNPRINTF(MPI_D_MISC, "%s: mpi_iocfacts recv failed\n", 1618 DEVNAME(sc)); 1619 return (1); 1620 } 1621 1622 DNPRINTF(MPI_D_MISC, "%s: func: 0x%02x len: %d msgver: %d.%d\n", 1623 DEVNAME(sc), ifp.function, ifp.msg_length, 1624 ifp.msg_version_maj, ifp.msg_version_min); 1625 DNPRINTF(MPI_D_MISC, "%s: msgflags: 0x%02x iocnumber: 0x%02x " 1626 "hdrver: %d.%d\n", DEVNAME(sc), ifp.msg_flags, 1627 ifp.ioc_number, ifp.header_version_maj, 1628 ifp.header_version_min); 1629 DNPRINTF(MPI_D_MISC, "%s: message context: 0x%08x\n", DEVNAME(sc), 1630 letoh32(ifp.msg_context)); 1631 DNPRINTF(MPI_D_MISC, "%s: iocstatus: 0x%04x ioexcept: 0x%04x\n", 1632 DEVNAME(sc), letoh16(ifp.ioc_status), 1633 letoh16(ifp.ioc_exceptions)); 1634 DNPRINTF(MPI_D_MISC, "%s: iocloginfo: 0x%08x\n", DEVNAME(sc), 1635 letoh32(ifp.ioc_loginfo)); 1636 DNPRINTF(MPI_D_MISC, "%s: flags: 0x%02x blocksize: %d whoinit: 0x%02x " 1637 "maxchdepth: %d\n", DEVNAME(sc), ifp.flags, 1638 ifp.block_size, ifp.whoinit, ifp.max_chain_depth); 1639 DNPRINTF(MPI_D_MISC, "%s: reqfrsize: %d replyqdepth: %d\n", 1640 DEVNAME(sc), letoh16(ifp.request_frame_size), 1641 letoh16(ifp.reply_queue_depth)); 1642 DNPRINTF(MPI_D_MISC, "%s: productid: 0x%04x\n", DEVNAME(sc), 1643 letoh16(ifp.product_id)); 1644 DNPRINTF(MPI_D_MISC, "%s: hostmfahiaddr: 0x%08x\n", DEVNAME(sc), 1645 letoh32(ifp.current_host_mfa_hi_addr)); 1646 DNPRINTF(MPI_D_MISC, "%s: event_state: 0x%02x number_of_ports: %d " 1647 "global_credits: %d\n", 1648 DEVNAME(sc), ifp.event_state, ifp.number_of_ports, 1649 letoh16(ifp.global_credits)); 1650 DNPRINTF(MPI_D_MISC, "%s: sensebufhiaddr: 0x%08x\n", DEVNAME(sc), 1651 letoh32(ifp.current_sense_buffer_hi_addr)); 1652 DNPRINTF(MPI_D_MISC, "%s: maxbus: %d maxdev: %d replyfrsize: %d\n", 1653 DEVNAME(sc), ifp.max_buses, ifp.max_devices, 1654 letoh16(ifp.current_reply_frame_size)); 1655 DNPRINTF(MPI_D_MISC, "%s: fw_image_size: %d\n", DEVNAME(sc), 1656 letoh32(ifp.fw_image_size)); 1657 DNPRINTF(MPI_D_MISC, "%s: ioc_capabilities: 0x%08x\n", DEVNAME(sc), 1658 letoh32(ifp.ioc_capabilities)); 1659 DNPRINTF(MPI_D_MISC, "%s: fw_version: %d.%d fw_version_unit: 0x%02x " 1660 "fw_version_dev: 0x%02x\n", DEVNAME(sc), 1661 ifp.fw_version_maj, ifp.fw_version_min, 1662 ifp.fw_version_unit, ifp.fw_version_dev); 1663 DNPRINTF(MPI_D_MISC, "%s: hi_priority_queue_depth: 0x%04x\n", 1664 DEVNAME(sc), letoh16(ifp.hi_priority_queue_depth)); 1665 DNPRINTF(MPI_D_MISC, "%s: host_page_buffer_sge: hdr: 0x%08x " 1666 "addr 0x%08x %08x\n", DEVNAME(sc), 1667 letoh32(ifp.host_page_buffer_sge.sg_hdr), 1668 letoh32(ifp.host_page_buffer_sge.sg_hi_addr), 1669 letoh32(ifp.host_page_buffer_sge.sg_lo_addr)); 1670 1671 sc->sc_maxcmds = letoh16(ifp.global_credits); 1672 sc->sc_maxchdepth = ifp.max_chain_depth; 1673 sc->sc_ioc_number = ifp.ioc_number; 1674 if (sc->sc_flags & MPI_F_SPI) 1675 sc->sc_buswidth = 16; 1676 else 1677 sc->sc_buswidth = 1678 (ifp.max_devices == 0) ? 256 : ifp.max_devices; 1679 if (ifp.flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) 1680 sc->sc_fw_len = letoh32(ifp.fw_image_size); 1681 1682 /* 1683 * you can fit sg elements on the end of the io cmd if they fit in the 1684 * request frame size. 1685 */ 1686 sc->sc_first_sgl_len = ((letoh16(ifp.request_frame_size) * 4) - 1687 sizeof(struct mpi_msg_scsi_io)) / sizeof(struct mpi_sge); 1688 DNPRINTF(MPI_D_MISC, "%s: first sgl len: %d\n", DEVNAME(sc), 1689 sc->sc_first_sgl_len); 1690 1691 sc->sc_chain_len = (letoh16(ifp.request_frame_size) * 4) / 1692 sizeof(struct mpi_sge); 1693 DNPRINTF(MPI_D_MISC, "%s: chain len: %d\n", DEVNAME(sc), 1694 sc->sc_chain_len); 1695 1696 /* the sgl tailing the io cmd loses an entry to the chain element. */ 1697 sc->sc_max_sgl_len = MPI_MAX_SGL - 1; 1698 /* the sgl chains lose an entry for each chain element */ 1699 sc->sc_max_sgl_len -= (MPI_MAX_SGL - sc->sc_first_sgl_len) / 1700 sc->sc_chain_len; 1701 DNPRINTF(MPI_D_MISC, "%s: max sgl len: %d\n", DEVNAME(sc), 1702 sc->sc_max_sgl_len); 1703 1704 /* XXX we're ignoring the max chain depth */ 1705 1706 return (0); 1707 } 1708 1709 int 1710 mpi_iocinit(struct mpi_softc *sc) 1711 { 1712 struct mpi_msg_iocinit_request iiq; 1713 struct mpi_msg_iocinit_reply iip; 1714 u_int32_t hi_addr; 1715 1716 DNPRINTF(MPI_D_MISC, "%s: mpi_iocinit\n", DEVNAME(sc)); 1717 1718 bzero(&iiq, sizeof(iiq)); 1719 bzero(&iip, sizeof(iip)); 1720 1721 iiq.function = MPI_FUNCTION_IOC_INIT; 1722 iiq.whoinit = MPI_WHOINIT_HOST_DRIVER; 1723 1724 iiq.max_devices = (sc->sc_buswidth == 256) ? 0 : sc->sc_buswidth; 1725 iiq.max_buses = 1; 1726 1727 iiq.msg_context = htole32(0xd00fd00f); 1728 1729 iiq.reply_frame_size = htole16(MPI_REPLY_SIZE); 1730 1731 hi_addr = (u_int32_t)((u_int64_t)MPI_DMA_DVA(sc->sc_requests) >> 32); 1732 iiq.host_mfa_hi_addr = htole32(hi_addr); 1733 iiq.sense_buffer_hi_addr = htole32(hi_addr); 1734 1735 hi_addr = (u_int32_t)((u_int64_t)MPI_DMA_DVA(sc->sc_replies) >> 32); 1736 iiq.reply_fifo_host_signalling_addr = htole32(hi_addr); 1737 1738 iiq.msg_version_maj = 0x01; 1739 iiq.msg_version_min = 0x02; 1740 1741 iiq.hdr_version_unit = 0x0d; 1742 iiq.hdr_version_dev = 0x00; 1743 1744 if (mpi_handshake_send(sc, &iiq, dwordsof(iiq)) != 0) { 1745 DNPRINTF(MPI_D_MISC, "%s: mpi_iocinit send failed\n", 1746 DEVNAME(sc)); 1747 return (1); 1748 } 1749 1750 if (mpi_handshake_recv(sc, &iip, dwordsof(iip)) != 0) { 1751 DNPRINTF(MPI_D_MISC, "%s: mpi_iocinit recv failed\n", 1752 DEVNAME(sc)); 1753 return (1); 1754 } 1755 1756 DNPRINTF(MPI_D_MISC, "%s: function: 0x%02x msg_length: %d " 1757 "whoinit: 0x%02x\n", DEVNAME(sc), iip.function, 1758 iip.msg_length, iip.whoinit); 1759 DNPRINTF(MPI_D_MISC, "%s: msg_flags: 0x%02x max_buses: %d " 1760 "max_devices: %d flags: 0x%02x\n", DEVNAME(sc), iip.msg_flags, 1761 iip.max_buses, iip.max_devices, iip.flags); 1762 DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 1763 letoh32(iip.msg_context)); 1764 DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc), 1765 letoh16(iip.ioc_status)); 1766 DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 1767 letoh32(iip.ioc_loginfo)); 1768 1769 return (0); 1770 } 1771 1772 int 1773 mpi_portfacts(struct mpi_softc *sc) 1774 { 1775 struct mpi_ccb *ccb; 1776 struct mpi_msg_portfacts_request *pfq; 1777 volatile struct mpi_msg_portfacts_reply *pfp; 1778 int s, rv = 1; 1779 1780 DNPRINTF(MPI_D_MISC, "%s: mpi_portfacts\n", DEVNAME(sc)); 1781 1782 s = splbio(); 1783 ccb = mpi_get_ccb(sc); 1784 splx(s); 1785 if (ccb == NULL) { 1786 DNPRINTF(MPI_D_MISC, "%s: mpi_portfacts ccb_get\n", 1787 DEVNAME(sc)); 1788 return (rv); 1789 } 1790 1791 ccb->ccb_done = mpi_empty_done; 1792 pfq = ccb->ccb_cmd; 1793 1794 pfq->function = MPI_FUNCTION_PORT_FACTS; 1795 pfq->chain_offset = 0; 1796 pfq->msg_flags = 0; 1797 pfq->port_number = 0; 1798 pfq->msg_context = htole32(ccb->ccb_id); 1799 1800 if (mpi_poll(sc, ccb, 50000) != 0) { 1801 DNPRINTF(MPI_D_MISC, "%s: mpi_portfacts poll\n", DEVNAME(sc)); 1802 goto err; 1803 } 1804 1805 if (ccb->ccb_rcb == NULL) { 1806 DNPRINTF(MPI_D_MISC, "%s: empty portfacts reply\n", 1807 DEVNAME(sc)); 1808 goto err; 1809 } 1810 pfp = ccb->ccb_rcb->rcb_reply; 1811 1812 DNPRINTF(MPI_D_MISC, "%s: function: 0x%02x msg_length: %d\n", 1813 DEVNAME(sc), pfp->function, pfp->msg_length); 1814 DNPRINTF(MPI_D_MISC, "%s: msg_flags: 0x%02x port_number: %d\n", 1815 DEVNAME(sc), pfp->msg_flags, pfp->port_number); 1816 DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 1817 letoh32(pfp->msg_context)); 1818 DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc), 1819 letoh16(pfp->ioc_status)); 1820 DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 1821 letoh32(pfp->ioc_loginfo)); 1822 DNPRINTF(MPI_D_MISC, "%s: max_devices: %d port_type: 0x%02x\n", 1823 DEVNAME(sc), letoh16(pfp->max_devices), pfp->port_type); 1824 DNPRINTF(MPI_D_MISC, "%s: protocol_flags: 0x%04x port_scsi_id: %d\n", 1825 DEVNAME(sc), letoh16(pfp->protocol_flags), 1826 letoh16(pfp->port_scsi_id)); 1827 DNPRINTF(MPI_D_MISC, "%s: max_persistent_ids: %d " 1828 "max_posted_cmd_buffers: %d\n", DEVNAME(sc), 1829 letoh16(pfp->max_persistent_ids), 1830 letoh16(pfp->max_posted_cmd_buffers)); 1831 DNPRINTF(MPI_D_MISC, "%s: max_lan_buckets: %d\n", DEVNAME(sc), 1832 letoh16(pfp->max_lan_buckets)); 1833 1834 sc->sc_porttype = pfp->port_type; 1835 sc->sc_target = letoh16(pfp->port_scsi_id); 1836 1837 mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva); 1838 rv = 0; 1839 err: 1840 mpi_put_ccb(sc, ccb); 1841 1842 return (rv); 1843 } 1844 1845 int 1846 mpi_eventnotify(struct mpi_softc *sc) 1847 { 1848 struct mpi_ccb *ccb; 1849 struct mpi_msg_event_request *enq; 1850 int s; 1851 1852 s = splbio(); 1853 ccb = mpi_get_ccb(sc); 1854 splx(s); 1855 if (ccb == NULL) { 1856 DNPRINTF(MPI_D_MISC, "%s: mpi_eventnotify ccb_get\n", 1857 DEVNAME(sc)); 1858 return (1); 1859 } 1860 1861 ccb->ccb_done = mpi_eventnotify_done; 1862 enq = ccb->ccb_cmd; 1863 1864 enq->function = MPI_FUNCTION_EVENT_NOTIFICATION; 1865 enq->chain_offset = 0; 1866 enq->event_switch = MPI_EVENT_SWITCH_ON; 1867 enq->msg_context = htole32(ccb->ccb_id); 1868 1869 mpi_start(sc, ccb); 1870 return (0); 1871 } 1872 1873 void 1874 mpi_eventnotify_done(struct mpi_ccb *ccb) 1875 { 1876 struct mpi_softc *sc = ccb->ccb_sc; 1877 struct mpi_msg_event_reply *enp = ccb->ccb_rcb->rcb_reply; 1878 int deferred = 0; 1879 1880 DNPRINTF(MPI_D_EVT, "%s: mpi_eventnotify_done\n", DEVNAME(sc)); 1881 1882 DNPRINTF(MPI_D_EVT, "%s: function: 0x%02x msg_length: %d " 1883 "data_length: %d\n", DEVNAME(sc), enp->function, enp->msg_length, 1884 letoh16(enp->data_length)); 1885 DNPRINTF(MPI_D_EVT, "%s: ack_required: %d msg_flags 0x%02x\n", 1886 DEVNAME(sc), enp->ack_required, enp->msg_flags); 1887 DNPRINTF(MPI_D_EVT, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 1888 letoh32(enp->msg_context)); 1889 DNPRINTF(MPI_D_EVT, "%s: ioc_status: 0x%04x\n", DEVNAME(sc), 1890 letoh16(enp->ioc_status)); 1891 DNPRINTF(MPI_D_EVT, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 1892 letoh32(enp->ioc_loginfo)); 1893 DNPRINTF(MPI_D_EVT, "%s: event: 0x%08x\n", DEVNAME(sc), 1894 letoh32(enp->event)); 1895 DNPRINTF(MPI_D_EVT, "%s: event_context: 0x%08x\n", DEVNAME(sc), 1896 letoh32(enp->event_context)); 1897 1898 switch (letoh32(enp->event)) { 1899 /* ignore these */ 1900 case MPI_EVENT_EVENT_CHANGE: 1901 case MPI_EVENT_SAS_PHY_LINK_STATUS: 1902 break; 1903 1904 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE: 1905 if (sc->sc_scsibus == NULL) 1906 break; 1907 1908 if (scsi_task(mpi_evt_sas, sc, ccb->ccb_rcb, 0) != 0) { 1909 printf("%s: unable to run SAS device status change\n", 1910 DEVNAME(sc)); 1911 break; 1912 } 1913 deferred = 1; 1914 break; 1915 1916 default: 1917 printf("%s: unhandled event 0x%02x\n", DEVNAME(sc), 1918 letoh32(enp->event)); 1919 break; 1920 } 1921 1922 if (!deferred) { 1923 if (enp->ack_required) 1924 mpi_eventack(sc, enp); 1925 mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva); 1926 } 1927 1928 if ((enp->msg_flags & MPI_EVENT_FLAGS_REPLY_KEPT) == 0) { 1929 /* XXX this shouldnt happen till shutdown */ 1930 mpi_put_ccb(sc, ccb); 1931 } 1932 } 1933 1934 void 1935 mpi_evt_sas(void *xsc, void *arg) 1936 { 1937 struct mpi_softc *sc = xsc; 1938 struct mpi_rcb *rcb = arg; 1939 struct mpi_msg_event_reply *enp = rcb->rcb_reply; 1940 struct mpi_evt_sas_change *ch; 1941 u_int8_t *data; 1942 int s; 1943 1944 data = rcb->rcb_reply; 1945 data += sizeof(struct mpi_msg_event_reply); 1946 ch = (struct mpi_evt_sas_change *)data; 1947 1948 if (ch->bus != 0) 1949 return; 1950 1951 switch (ch->reason) { 1952 case MPI_EVT_SASCH_REASON_ADDED: 1953 case MPI_EVT_SASCH_REASON_NO_PERSIST_ADDED: 1954 scsi_probe_target(sc->sc_scsibus, ch->target); 1955 break; 1956 1957 case MPI_EVT_SASCH_REASON_NOT_RESPONDING: 1958 scsi_detach_target(sc->sc_scsibus, ch->target, DETACH_FORCE); 1959 break; 1960 1961 case MPI_EVT_SASCH_REASON_SMART_DATA: 1962 case MPI_EVT_SASCH_REASON_UNSUPPORTED: 1963 case MPI_EVT_SASCH_REASON_INTERNAL_RESET: 1964 break; 1965 default: 1966 printf("%s: unknown reason for SAS device status change: " 1967 "0x%02x\n", DEVNAME(sc), ch->reason); 1968 break; 1969 } 1970 1971 s = splbio(); 1972 mpi_push_reply(sc, rcb->rcb_reply_dva); 1973 if (enp->ack_required) 1974 mpi_eventack(sc, enp); 1975 splx(s); 1976 } 1977 1978 void 1979 mpi_eventack(struct mpi_softc *sc, struct mpi_msg_event_reply *enp) 1980 { 1981 struct mpi_ccb *ccb; 1982 struct mpi_msg_eventack_request *eaq; 1983 1984 ccb = mpi_get_ccb(sc); 1985 if (ccb == NULL) { 1986 DNPRINTF(MPI_D_EVT, "%s: mpi_eventack ccb_get\n", DEVNAME(sc)); 1987 return; 1988 } 1989 1990 ccb->ccb_done = mpi_eventack_done; 1991 eaq = ccb->ccb_cmd; 1992 1993 eaq->function = MPI_FUNCTION_EVENT_ACK; 1994 eaq->msg_context = htole32(ccb->ccb_id); 1995 1996 eaq->event = enp->event; 1997 eaq->event_context = enp->event_context; 1998 1999 mpi_start(sc, ccb); 2000 return; 2001 } 2002 2003 void 2004 mpi_eventack_done(struct mpi_ccb *ccb) 2005 { 2006 struct mpi_softc *sc = ccb->ccb_sc; 2007 2008 DNPRINTF(MPI_D_EVT, "%s: event ack done\n", DEVNAME(sc)); 2009 2010 mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva); 2011 mpi_put_ccb(sc, ccb); 2012 } 2013 2014 int 2015 mpi_portenable(struct mpi_softc *sc) 2016 { 2017 struct mpi_ccb *ccb; 2018 struct mpi_msg_portenable_request *peq; 2019 struct mpi_msg_portenable_repy *pep; 2020 int s; 2021 2022 DNPRINTF(MPI_D_MISC, "%s: mpi_portenable\n", DEVNAME(sc)); 2023 2024 s = splbio(); 2025 ccb = mpi_get_ccb(sc); 2026 splx(s); 2027 if (ccb == NULL) { 2028 DNPRINTF(MPI_D_MISC, "%s: mpi_portenable ccb_get\n", 2029 DEVNAME(sc)); 2030 return (1); 2031 } 2032 2033 ccb->ccb_done = mpi_empty_done; 2034 peq = ccb->ccb_cmd; 2035 2036 peq->function = MPI_FUNCTION_PORT_ENABLE; 2037 peq->port_number = 0; 2038 peq->msg_context = htole32(ccb->ccb_id); 2039 2040 if (mpi_poll(sc, ccb, 50000) != 0) { 2041 DNPRINTF(MPI_D_MISC, "%s: mpi_portenable poll\n", DEVNAME(sc)); 2042 return (1); 2043 } 2044 2045 if (ccb->ccb_rcb == NULL) { 2046 DNPRINTF(MPI_D_MISC, "%s: empty portenable reply\n", 2047 DEVNAME(sc)); 2048 return (1); 2049 } 2050 pep = ccb->ccb_rcb->rcb_reply; 2051 2052 mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva); 2053 mpi_put_ccb(sc, ccb); 2054 2055 return (0); 2056 } 2057 2058 int 2059 mpi_fwupload(struct mpi_softc *sc) 2060 { 2061 struct mpi_ccb *ccb; 2062 struct { 2063 struct mpi_msg_fwupload_request req; 2064 struct mpi_sge sge; 2065 } __packed *bundle; 2066 struct mpi_msg_fwupload_reply *upp; 2067 u_int64_t addr; 2068 int s; 2069 int rv = 0; 2070 2071 if (sc->sc_fw_len == 0) 2072 return (0); 2073 2074 DNPRINTF(MPI_D_MISC, "%s: mpi_fwupload\n", DEVNAME(sc)); 2075 2076 sc->sc_fw = mpi_dmamem_alloc(sc, sc->sc_fw_len); 2077 if (sc->sc_fw == NULL) { 2078 DNPRINTF(MPI_D_MISC, "%s: mpi_fwupload unable to allocate %d\n", 2079 DEVNAME(sc), sc->sc_fw_len); 2080 return (1); 2081 } 2082 2083 s = splbio(); 2084 ccb = mpi_get_ccb(sc); 2085 splx(s); 2086 if (ccb == NULL) { 2087 DNPRINTF(MPI_D_MISC, "%s: mpi_fwupload ccb_get\n", 2088 DEVNAME(sc)); 2089 goto err; 2090 } 2091 2092 ccb->ccb_done = mpi_empty_done; 2093 bundle = ccb->ccb_cmd; 2094 2095 bundle->req.function = MPI_FUNCTION_FW_UPLOAD; 2096 bundle->req.msg_context = htole32(ccb->ccb_id); 2097 2098 bundle->req.image_type = MPI_FWUPLOAD_IMAGETYPE_IOC_FW; 2099 2100 bundle->req.tce.details_length = 12; 2101 bundle->req.tce.image_size = htole32(sc->sc_fw_len); 2102 2103 bundle->sge.sg_hdr = htole32(MPI_SGE_FL_TYPE_SIMPLE | 2104 MPI_SGE_FL_SIZE_64 | MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | 2105 MPI_SGE_FL_EOL | (u_int32_t)sc->sc_fw_len); 2106 addr = MPI_DMA_DVA(sc->sc_fw); 2107 bundle->sge.sg_hi_addr = htole32((u_int32_t)(addr >> 32)); 2108 bundle->sge.sg_lo_addr = htole32((u_int32_t)addr); 2109 2110 if (mpi_poll(sc, ccb, 50000) != 0) { 2111 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_header poll\n", DEVNAME(sc)); 2112 goto err; 2113 } 2114 2115 if (ccb->ccb_rcb == NULL) 2116 panic("%s: unable to do fw upload\n", DEVNAME(sc)); 2117 upp = ccb->ccb_rcb->rcb_reply; 2118 2119 if (letoh16(upp->ioc_status) != MPI_IOCSTATUS_SUCCESS) 2120 rv = 1; 2121 2122 mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva); 2123 mpi_put_ccb(sc, ccb); 2124 2125 return (rv); 2126 2127 err: 2128 mpi_dmamem_free(sc, sc->sc_fw); 2129 return (1); 2130 } 2131 2132 void 2133 mpi_get_raid(struct mpi_softc *sc) 2134 { 2135 struct mpi_cfg_hdr hdr; 2136 struct mpi_cfg_ioc_pg2 *vol_page; 2137 struct mpi_cfg_raid_vol *vol_list, *vol; 2138 size_t pagelen; 2139 u_int32_t capabilities; 2140 struct scsi_link *link; 2141 int i; 2142 2143 DNPRINTF(MPI_D_RAID, "%s: mpi_get_raid\n", DEVNAME(sc)); 2144 2145 if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_IOC, 2, 0, &hdr) != 0) { 2146 DNPRINTF(MPI_D_RAID, "%s: mpi_get_raid unable to fetch header" 2147 "for IOC page 2\n", DEVNAME(sc)); 2148 return; 2149 } 2150 2151 pagelen = hdr.page_length * 4; /* dwords to bytes */ 2152 vol_page = malloc(pagelen, M_TEMP, M_WAITOK|M_CANFAIL); 2153 if (vol_page == NULL) { 2154 DNPRINTF(MPI_D_RAID, "%s: mpi_get_raid unable to allocate " 2155 "space for ioc config page 2\n", DEVNAME(sc)); 2156 return; 2157 } 2158 vol_list = (struct mpi_cfg_raid_vol *)(vol_page + 1); 2159 2160 if (mpi_cfg_page(sc, 0, &hdr, 1, vol_page, pagelen) != 0) { 2161 DNPRINTF(MPI_D_RAID, "%s: mpi_get_raid unable to fetch IOC " 2162 "page 2\n", DEVNAME(sc)); 2163 goto out; 2164 } 2165 2166 capabilities = letoh32(vol_page->capabilities); 2167 2168 DNPRINTF(MPI_D_RAID, "%s: capabilities: 0x08%x\n", DEVNAME(sc), 2169 letoh32(vol_page->capabilities)); 2170 DNPRINTF(MPI_D_RAID, "%s: active_vols: %d max_vols: %d " 2171 "active_physdisks: %d max_physdisks: %d\n", DEVNAME(sc), 2172 vol_page->active_vols, vol_page->max_vols, 2173 vol_page->active_physdisks, vol_page->max_physdisks); 2174 2175 /* don't walk list if there are no RAID capability */ 2176 if (capabilities == 0xdeadbeef) { 2177 printf("%s: deadbeef in raid configuration\n", DEVNAME(sc)); 2178 goto out; 2179 } 2180 2181 if ((capabilities & MPI_CFG_IOC_2_CAPABILITIES_RAID) == 0 || 2182 (vol_page->active_vols == 0)) 2183 goto out; 2184 2185 sc->sc_flags |= MPI_F_RAID; 2186 2187 for (i = 0; i < vol_page->active_vols; i++) { 2188 vol = &vol_list[i]; 2189 2190 DNPRINTF(MPI_D_RAID, "%s: id: %d bus: %d ioc: %d pg: %d\n", 2191 DEVNAME(sc), vol->vol_id, vol->vol_bus, vol->vol_ioc, 2192 vol->vol_page); 2193 DNPRINTF(MPI_D_RAID, "%s: type: 0x%02x flags: 0x%02x\n", 2194 DEVNAME(sc), vol->vol_type, vol->flags); 2195 2196 if (vol->vol_ioc != sc->sc_ioc_number || vol->vol_bus != 0) 2197 continue; 2198 2199 link = sc->sc_scsibus->sc_link[vol->vol_id][0]; 2200 if (link == NULL) 2201 continue; 2202 2203 link->flags |= SDEV_VIRTUAL; 2204 } 2205 2206 out: 2207 free(vol_page, M_TEMP); 2208 } 2209 2210 int 2211 mpi_cfg_header(struct mpi_softc *sc, u_int8_t type, u_int8_t number, 2212 u_int32_t address, struct mpi_cfg_hdr *hdr) 2213 { 2214 struct mpi_ccb *ccb; 2215 struct mpi_msg_config_request *cq; 2216 struct mpi_msg_config_reply *cp; 2217 int rv = 0; 2218 int s; 2219 2220 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_header type: %#x number: %x " 2221 "address: %d\n", DEVNAME(sc), type, number, address); 2222 2223 s = splbio(); 2224 ccb = mpi_get_ccb(sc); 2225 splx(s); 2226 if (ccb == NULL) { 2227 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_header ccb_get\n", 2228 DEVNAME(sc)); 2229 return (1); 2230 } 2231 2232 ccb->ccb_done = mpi_empty_done; 2233 cq = ccb->ccb_cmd; 2234 2235 cq->function = MPI_FUNCTION_CONFIG; 2236 cq->msg_context = htole32(ccb->ccb_id); 2237 2238 cq->action = MPI_CONFIG_REQ_ACTION_PAGE_HEADER; 2239 2240 cq->config_header.page_number = number; 2241 cq->config_header.page_type = type; 2242 cq->page_address = htole32(address); 2243 cq->page_buffer.sg_hdr = htole32(MPI_SGE_FL_TYPE_SIMPLE | 2244 MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | MPI_SGE_FL_EOL); 2245 2246 if (mpi_poll(sc, ccb, 50000) != 0) { 2247 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_header poll\n", DEVNAME(sc)); 2248 return (1); 2249 } 2250 2251 if (ccb->ccb_rcb == NULL) 2252 panic("%s: unable to fetch config header\n", DEVNAME(sc)); 2253 cp = ccb->ccb_rcb->rcb_reply; 2254 2255 DNPRINTF(MPI_D_MISC, "%s: action: 0x%02x msg_length: %d function: " 2256 "0x%02x\n", DEVNAME(sc), cp->action, cp->msg_length, cp->function); 2257 DNPRINTF(MPI_D_MISC, "%s: ext_page_length: %d ext_page_type: 0x%02x " 2258 "msg_flags: 0x%02x\n", DEVNAME(sc), 2259 letoh16(cp->ext_page_length), cp->ext_page_type, 2260 cp->msg_flags); 2261 DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 2262 letoh32(cp->msg_context)); 2263 DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc), 2264 letoh16(cp->ioc_status)); 2265 DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 2266 letoh32(cp->ioc_loginfo)); 2267 DNPRINTF(MPI_D_MISC, "%s: page_version: 0x%02x page_length: %d " 2268 "page_number: 0x%02x page_type: 0x%02x\n", DEVNAME(sc), 2269 cp->config_header.page_version, 2270 cp->config_header.page_length, 2271 cp->config_header.page_number, 2272 cp->config_header.page_type); 2273 2274 if (letoh16(cp->ioc_status) != MPI_IOCSTATUS_SUCCESS) 2275 rv = 1; 2276 else 2277 *hdr = cp->config_header; 2278 2279 mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva); 2280 mpi_put_ccb(sc, ccb); 2281 2282 return (rv); 2283 } 2284 2285 int 2286 mpi_cfg_page(struct mpi_softc *sc, u_int32_t address, struct mpi_cfg_hdr *hdr, 2287 int read, void *page, size_t len) 2288 { 2289 struct mpi_ccb *ccb; 2290 struct mpi_msg_config_request *cq; 2291 struct mpi_msg_config_reply *cp; 2292 u_int64_t dva; 2293 char *kva; 2294 int rv = 0; 2295 int s; 2296 2297 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_page address: %d read: %d type: %x\n", 2298 DEVNAME(sc), address, read, hdr->page_type); 2299 2300 if (len > MPI_REQUEST_SIZE - sizeof(struct mpi_msg_config_request) || 2301 len < hdr->page_length * 4) 2302 return (1); 2303 2304 s = splbio(); 2305 ccb = mpi_get_ccb(sc); 2306 splx(s); 2307 if (ccb == NULL) { 2308 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_page ccb_get\n", DEVNAME(sc)); 2309 return (1); 2310 } 2311 2312 ccb->ccb_done = mpi_empty_done; 2313 cq = ccb->ccb_cmd; 2314 2315 cq->function = MPI_FUNCTION_CONFIG; 2316 cq->msg_context = htole32(ccb->ccb_id); 2317 2318 cq->action = (read ? MPI_CONFIG_REQ_ACTION_PAGE_READ_CURRENT : 2319 MPI_CONFIG_REQ_ACTION_PAGE_WRITE_CURRENT); 2320 2321 cq->config_header = *hdr; 2322 cq->config_header.page_type &= MPI_CONFIG_REQ_PAGE_TYPE_MASK; 2323 cq->page_address = htole32(address); 2324 cq->page_buffer.sg_hdr = htole32(MPI_SGE_FL_TYPE_SIMPLE | 2325 MPI_SGE_FL_LAST | MPI_SGE_FL_EOB | MPI_SGE_FL_EOL | 2326 (hdr->page_length * 4) | 2327 (read ? MPI_SGE_FL_DIR_IN : MPI_SGE_FL_DIR_OUT)); 2328 2329 /* bounce the page via the request space to avoid more bus_dma games */ 2330 dva = ccb->ccb_cmd_dva + sizeof(struct mpi_msg_config_request); 2331 2332 cq->page_buffer.sg_hi_addr = htole32((u_int32_t)(dva >> 32)); 2333 cq->page_buffer.sg_lo_addr = htole32((u_int32_t)dva); 2334 2335 kva = ccb->ccb_cmd; 2336 kva += sizeof(struct mpi_msg_config_request); 2337 if (!read) 2338 bcopy(page, kva, len); 2339 2340 if (mpi_poll(sc, ccb, 50000) != 0) { 2341 DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_page poll\n", DEVNAME(sc)); 2342 return (1); 2343 } 2344 2345 if (ccb->ccb_rcb == NULL) { 2346 mpi_put_ccb(sc, ccb); 2347 return (1); 2348 } 2349 cp = ccb->ccb_rcb->rcb_reply; 2350 2351 DNPRINTF(MPI_D_MISC, "%s: action: 0x%02x msg_length: %d function: " 2352 "0x%02x\n", DEVNAME(sc), cp->action, cp->msg_length, cp->function); 2353 DNPRINTF(MPI_D_MISC, "%s: ext_page_length: %d ext_page_type: 0x%02x " 2354 "msg_flags: 0x%02x\n", DEVNAME(sc), 2355 letoh16(cp->ext_page_length), cp->ext_page_type, 2356 cp->msg_flags); 2357 DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc), 2358 letoh32(cp->msg_context)); 2359 DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc), 2360 letoh16(cp->ioc_status)); 2361 DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc), 2362 letoh32(cp->ioc_loginfo)); 2363 DNPRINTF(MPI_D_MISC, "%s: page_version: 0x%02x page_length: %d " 2364 "page_number: 0x%02x page_type: 0x%02x\n", DEVNAME(sc), 2365 cp->config_header.page_version, 2366 cp->config_header.page_length, 2367 cp->config_header.page_number, 2368 cp->config_header.page_type); 2369 2370 if (letoh16(cp->ioc_status) != MPI_IOCSTATUS_SUCCESS) 2371 rv = 1; 2372 else if (read) 2373 bcopy(kva, page, len); 2374 2375 mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva); 2376 mpi_put_ccb(sc, ccb); 2377 2378 return (rv); 2379 } 2380