1 /* $OpenBSD: iha.c,v 1.40 2010/10/03 21:14:40 krw Exp $ */ 2 /*------------------------------------------------------------------------- 3 * 4 * Device driver for the INI-9XXXU/UW or INIC-940/950 PCI SCSI Controller. 5 * 6 * Written for 386bsd and FreeBSD by 7 * Winston Hung <winstonh@initio.com> 8 * 9 * Copyright (c) 1997-1999 Initio Corp 10 * Copyright (c) 2000-2002 Ken Westerback 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer, 17 * without modification, immediately at the beginning of the file. 18 * 2. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 30 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 *------------------------------------------------------------------------- 34 */ 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/buf.h> 39 #include <sys/device.h> 40 41 #include <machine/bus.h> 42 #include <machine/intr.h> 43 44 #include <scsi/scsi_all.h> 45 #include <scsi/scsiconf.h> 46 #include <scsi/scsi_message.h> 47 48 #include <dev/ic/iha.h> 49 50 /* #define IHA_DEBUG_STATE */ 51 52 struct cfdriver iha_cd = { 53 NULL, "iha", DV_DULL 54 }; 55 56 struct scsi_adapter iha_switch = { 57 iha_scsi_cmd, /* scsi_cmd() */ 58 iha_minphys, /* scsi_minphys() */ 59 NULL, /* probe_dev(void) */ 60 NULL /* free_dev() */ 61 }; 62 63 /* 64 * SCSI Rate Table, indexed by FLAG_SCSI_RATE field of 65 * TCS_Flags. 66 */ 67 static const u_int8_t iha_rate_tbl[] = { 68 /* fast 20 */ 69 /* nanosecond divide by 4 */ 70 12, /* 50ns, 20M */ 71 18, /* 75ns, 13.3M */ 72 25, /* 100ns, 10M */ 73 31, /* 125ns, 8M */ 74 37, /* 150ns, 6.6M */ 75 43, /* 175ns, 5.7M */ 76 50, /* 200ns, 5M */ 77 62 /* 250ns, 4M */ 78 }; 79 80 int iha_setup_sg_list(struct iha_softc *, struct iha_scb *); 81 u_int8_t iha_data_over_run(struct iha_scb *); 82 int iha_push_sense_request(struct iha_softc *, struct iha_scb *); 83 void iha_timeout(void *); 84 int iha_alloc_scbs(struct iha_softc *); 85 void iha_read_eeprom(bus_space_tag_t, bus_space_handle_t, 86 struct iha_nvram *); 87 void iha_se2_instr(bus_space_tag_t, bus_space_handle_t, u_int8_t); 88 u_int16_t iha_se2_rd(bus_space_tag_t, bus_space_handle_t, u_int8_t); 89 void iha_reset_scsi_bus(struct iha_softc *); 90 void iha_reset_chip(struct iha_softc *, 91 bus_space_tag_t, bus_space_handle_t); 92 void iha_reset_dma(bus_space_tag_t, bus_space_handle_t); 93 void iha_reset_tcs(struct tcs *, u_int8_t); 94 void iha_print_info(struct iha_softc *, int); 95 void iha_done_scb(struct iha_softc *, struct iha_scb *); 96 void iha_exec_scb(struct iha_softc *, struct iha_scb *); 97 void iha_main(struct iha_softc *, bus_space_tag_t, bus_space_handle_t); 98 void iha_scsi(struct iha_softc *, bus_space_tag_t, bus_space_handle_t); 99 int iha_wait(struct iha_softc *, bus_space_tag_t, bus_space_handle_t, 100 u_int8_t); 101 void iha_mark_busy_scb(struct iha_scb *); 102 void *iha_scb_alloc(void *); 103 void iha_scb_free(void *, void *); 104 void iha_append_done_scb(struct iha_softc *, struct iha_scb *, 105 u_int8_t); 106 struct iha_scb *iha_pop_done_scb(struct iha_softc *); 107 void iha_append_pend_scb(struct iha_softc *, struct iha_scb *); 108 void iha_push_pend_scb(struct iha_softc *, struct iha_scb *); 109 struct iha_scb *iha_find_pend_scb(struct iha_softc *); 110 void iha_sync_done(struct iha_softc *, 111 bus_space_tag_t, bus_space_handle_t); 112 void iha_wide_done(struct iha_softc *, 113 bus_space_tag_t, bus_space_handle_t); 114 void iha_bad_seq(struct iha_softc *); 115 int iha_next_state(struct iha_softc *, 116 bus_space_tag_t, bus_space_handle_t); 117 int iha_state_1(struct iha_softc *, 118 bus_space_tag_t, bus_space_handle_t); 119 int iha_state_2(struct iha_softc *, 120 bus_space_tag_t, bus_space_handle_t); 121 int iha_state_3(struct iha_softc *, 122 bus_space_tag_t, bus_space_handle_t); 123 int iha_state_4(struct iha_softc *, 124 bus_space_tag_t, bus_space_handle_t); 125 int iha_state_5(struct iha_softc *, 126 bus_space_tag_t, bus_space_handle_t); 127 int iha_state_6(struct iha_softc *, 128 bus_space_tag_t, bus_space_handle_t); 129 int iha_state_8(struct iha_softc *, 130 bus_space_tag_t, bus_space_handle_t); 131 void iha_set_ssig(bus_space_tag_t, 132 bus_space_handle_t, u_int8_t, u_int8_t); 133 int iha_xpad_in(struct iha_softc *, 134 bus_space_tag_t, bus_space_handle_t); 135 int iha_xpad_out(struct iha_softc *, 136 bus_space_tag_t, bus_space_handle_t); 137 int iha_xfer_data(struct iha_scb *, 138 bus_space_tag_t, bus_space_handle_t, 139 int direction); 140 int iha_status_msg(struct iha_softc *, 141 bus_space_tag_t, bus_space_handle_t); 142 int iha_msgin(struct iha_softc *, bus_space_tag_t, bus_space_handle_t); 143 int iha_msgin_sdtr(struct iha_softc *); 144 int iha_msgin_extended(struct iha_softc *, 145 bus_space_tag_t, bus_space_handle_t); 146 int iha_msgin_ignore_wid_resid(struct iha_softc *, 147 bus_space_tag_t, bus_space_handle_t); 148 int iha_msgout(struct iha_softc *, 149 bus_space_tag_t, bus_space_handle_t, u_int8_t); 150 int iha_msgout_extended(struct iha_softc *, 151 bus_space_tag_t, bus_space_handle_t); 152 void iha_msgout_abort(struct iha_softc *, 153 bus_space_tag_t, bus_space_handle_t, u_int8_t); 154 int iha_msgout_reject(struct iha_softc *, 155 bus_space_tag_t, bus_space_handle_t); 156 int iha_msgout_sdtr(struct iha_softc *, 157 bus_space_tag_t, bus_space_handle_t); 158 int iha_msgout_wdtr(struct iha_softc *, 159 bus_space_tag_t, bus_space_handle_t); 160 void iha_select(struct iha_softc *, 161 bus_space_tag_t, bus_space_handle_t, 162 struct iha_scb *, u_int8_t); 163 void iha_busfree(struct iha_softc *, 164 bus_space_tag_t, bus_space_handle_t); 165 int iha_resel(struct iha_softc *, bus_space_tag_t, bus_space_handle_t); 166 void iha_abort_xs(struct iha_softc *, struct scsi_xfer *, u_int8_t); 167 168 /* 169 * iha_intr - the interrupt service routine for the iha driver 170 */ 171 int 172 iha_intr(arg) 173 void *arg; 174 { 175 bus_space_handle_t ioh; 176 struct iha_softc *sc; 177 bus_space_tag_t iot; 178 int s; 179 180 sc = (struct iha_softc *)arg; 181 iot = sc->sc_iot; 182 ioh = sc->sc_ioh; 183 184 if ((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 185 return (0); 186 187 s = splbio(); /* XXX - Or are interrupts off when ISR's are called? */ 188 189 if (sc->HCS_Semaph != SEMAPH_IN_MAIN) { 190 /* XXX - need these inside a splbio()/splx()? */ 191 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 192 sc->HCS_Semaph = SEMAPH_IN_MAIN; 193 194 iha_main(sc, iot, ioh); 195 196 sc->HCS_Semaph = ~SEMAPH_IN_MAIN; 197 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 198 } 199 200 splx(s); 201 202 return (1); 203 } 204 205 /* 206 * iha_setup_sg_list - initialize scatter gather list of pScb from 207 * pScb->SCB_DataDma. 208 */ 209 int 210 iha_setup_sg_list(sc, pScb) 211 struct iha_softc *sc; 212 struct iha_scb *pScb; 213 { 214 bus_dma_segment_t *segs = pScb->SCB_DataDma->dm_segs; 215 int i, error, nseg = pScb->SCB_DataDma->dm_nsegs; 216 217 if (nseg > 1) { 218 error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_SGDma, 219 pScb->SCB_SGList, sizeof(pScb->SCB_SGList), NULL, 220 (pScb->SCB_Flags & SCSI_NOSLEEP) ? 221 BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 222 if (error) { 223 sc_print_addr(pScb->SCB_Xs->sc_link); 224 printf("error %d loading SG list dma map\n", error); 225 return (error); 226 } 227 228 /* 229 * Only set FLAG_SG when SCB_SGDma is loaded so iha_scsi_done 230 * will not unload an unloaded map. 231 */ 232 pScb->SCB_Flags |= FLAG_SG; 233 bzero(pScb->SCB_SGList, sizeof(pScb->SCB_SGList)); 234 235 pScb->SCB_SGIdx = 0; 236 pScb->SCB_SGCount = nseg; 237 238 for (i=0; i < nseg; i++) { 239 pScb->SCB_SGList[i].SG_Len = segs[i].ds_len; 240 pScb->SCB_SGList[i].SG_Addr = segs[i].ds_addr; 241 } 242 243 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma, 244 0, sizeof(pScb->SCB_SGList), BUS_DMASYNC_PREWRITE); 245 } 246 247 return (0); 248 } 249 250 /* 251 * iha_scsi_cmd - start execution of a SCSI command. This is called 252 * from the generic SCSI driver via the field 253 * sc_adapter.scsi_cmd of iha_softc. 254 */ 255 void 256 iha_scsi_cmd(xs) 257 struct scsi_xfer *xs; 258 { 259 struct iha_scb *pScb; 260 struct scsi_link *sc_link = xs->sc_link; 261 struct iha_softc *sc = sc_link->adapter_softc; 262 int error; 263 264 if ((xs->cmdlen > 12) || (sc_link->target >= IHA_MAX_TARGETS)) { 265 xs->error = XS_DRIVER_STUFFUP; 266 scsi_done(xs); 267 return; 268 } 269 270 pScb = xs->io; 271 272 pScb->SCB_Target = sc_link->target; 273 pScb->SCB_Lun = sc_link->lun; 274 pScb->SCB_Tcs = &sc->HCS_Tcs[pScb->SCB_Target]; 275 pScb->SCB_Flags = xs->flags; 276 pScb->SCB_Ident = MSG_IDENTIFYFLAG | 277 (pScb->SCB_Lun & MSG_IDENTIFY_LUNMASK); 278 279 if ((xs->cmd->opcode != REQUEST_SENSE) 280 && ((pScb->SCB_Flags & SCSI_POLL) == 0)) 281 pScb->SCB_Ident |= MSG_IDENTIFY_DISCFLAG; 282 283 pScb->SCB_Xs = xs; 284 pScb->SCB_CDBLen = xs->cmdlen; 285 bcopy(xs->cmd, &pScb->SCB_CDB, xs->cmdlen); 286 287 pScb->SCB_BufCharsLeft = pScb->SCB_BufChars = xs->datalen; 288 289 if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) { 290 error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_DataDma, 291 xs->data, pScb->SCB_BufChars, NULL, 292 (pScb->SCB_Flags & SCSI_NOSLEEP) ? 293 BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 294 295 if (error) { 296 sc_print_addr(xs->sc_link); 297 if (error == EFBIG) 298 printf("buffer needs >%d dma segments\n", 299 IHA_MAX_SG_ENTRIES); 300 else 301 printf("error %d loading buffer dma map\n", 302 error); 303 304 xs->error = XS_DRIVER_STUFFUP; 305 scsi_done(xs); 306 return; 307 } 308 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma, 309 0, pScb->SCB_BufChars, 310 (pScb->SCB_Flags & SCSI_DATA_IN) ? 311 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 312 313 error = iha_setup_sg_list(sc, pScb); 314 if (error) { 315 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma); 316 xs->error = XS_DRIVER_STUFFUP; 317 scsi_done(xs); 318 return; 319 } 320 321 } 322 323 /* 324 * Always initialize the stimeout structure as it may 325 * contain garbage that confuses timeout_del() later on. 326 * But, timeout_add() ONLY if we are not polling. 327 */ 328 timeout_set(&xs->stimeout, iha_timeout, pScb); 329 if ((pScb->SCB_Flags & SCSI_POLL) == 0) 330 timeout_add_msec(&xs->stimeout, xs->timeout); 331 332 iha_exec_scb(sc, pScb); 333 } 334 335 /* 336 * iha_init_tulip - initialize the inic-940/950 card and the rest of the 337 * iha_softc structure supplied 338 */ 339 int 340 iha_init_tulip(sc) 341 struct iha_softc *sc; 342 { 343 struct iha_scb *pScb; 344 struct iha_nvram_scsi *pScsi; 345 bus_space_handle_t ioh; 346 struct iha_nvram iha_nvram; 347 bus_space_tag_t iot; 348 int i, error; 349 350 iot = sc->sc_iot; 351 ioh = sc->sc_ioh; 352 353 iha_read_eeprom(iot, ioh, &iha_nvram); 354 355 pScsi = &iha_nvram.NVM_Scsi[0]; 356 357 TAILQ_INIT(&sc->HCS_FreeScb); 358 TAILQ_INIT(&sc->HCS_PendScb); 359 TAILQ_INIT(&sc->HCS_DoneScb); 360 361 mtx_init(&sc->sc_scb_mtx, IPL_BIO); 362 scsi_iopool_init(&sc->sc_iopool, sc, iha_scb_alloc, iha_scb_free); 363 364 /* 365 * fill in the prototype scsi_link. 366 */ 367 sc->sc_link.adapter_softc = sc; 368 sc->sc_link.adapter = &iha_switch; 369 sc->sc_link.openings = 4; /* # xs's allowed per device */ 370 sc->sc_link.adapter_target = pScsi->NVM_SCSI_Id; 371 sc->sc_link.adapter_buswidth = pScsi->NVM_SCSI_Targets; 372 sc->sc_link.pool = &sc->sc_iopool; 373 374 /* 375 * fill in the rest of the iha_softc fields 376 */ 377 sc->HCS_Semaph = ~SEMAPH_IN_MAIN; 378 sc->HCS_JSStatus0 = 0; 379 sc->HCS_ActScb = NULL; 380 381 error = iha_alloc_scbs(sc); 382 if (error != 0) 383 return (error); 384 385 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) { 386 pScb->SCB_TagId = i; 387 388 error = bus_dmamap_create(sc->sc_dmat, 389 (IHA_MAX_SG_ENTRIES-1) * PAGE_SIZE, IHA_MAX_SG_ENTRIES, 390 (IHA_MAX_SG_ENTRIES-1) * PAGE_SIZE, 0, 391 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &pScb->SCB_DataDma); 392 393 if (error != 0) { 394 printf("%s: couldn't create SCB data DMA map, error = %d\n", 395 sc->sc_dev.dv_xname, error); 396 return (error); 397 } 398 399 error = bus_dmamap_create(sc->sc_dmat, 400 sizeof(pScb->SCB_SGList), 1, 401 sizeof(pScb->SCB_SGList), 0, 402 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 403 &pScb->SCB_SGDma); 404 if (error != 0) { 405 printf("%s: couldn't create SCB SG DMA map, error = %d\n", 406 sc->sc_dev.dv_xname, error); 407 return (error); 408 } 409 410 TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList); 411 } 412 413 /* Mask all the interrupts */ 414 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 415 416 /* Stop any I/O and reset the scsi module */ 417 iha_reset_dma(iot, ioh); 418 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSMOD); 419 420 /* Program HBA's SCSI ID */ 421 bus_space_write_1(iot, ioh, TUL_SID, sc->sc_link.adapter_target << 4); 422 423 /* 424 * Configure the channel as requested by the NVRAM settings read 425 * into iha_nvram by iha_read_eeprom() above. 426 */ 427 428 if ((pScsi->NVM_SCSI_Cfg & CFG_EN_PAR) != 0) 429 sc->HCS_SConf1 = (SCONFIG0DEFAULT | SPCHK); 430 else 431 sc->HCS_SConf1 = (SCONFIG0DEFAULT); 432 bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->HCS_SConf1); 433 434 /* selection time out in units of 1.6385 millisecond = 250 ms */ 435 bus_space_write_1(iot, ioh, TUL_STIMO, 153); 436 437 /* Enable desired SCSI termination configuration read from eeprom */ 438 bus_space_write_1(iot, ioh, TUL_DCTRL0, 439 (pScsi->NVM_SCSI_Cfg & (CFG_ACT_TERM1 | CFG_ACT_TERM2))); 440 441 bus_space_write_1(iot, ioh, TUL_GCTRL1, 442 ((pScsi->NVM_SCSI_Cfg & CFG_AUTO_TERM) >> 4) 443 | (bus_space_read_1(iot, ioh, TUL_GCTRL1) & (~ATDEN))); 444 445 for (i = 0; i < IHA_MAX_TARGETS; i++) { 446 sc->HCS_Tcs[i].TCS_Flags = pScsi->NVM_SCSI_TargetFlags[i]; 447 iha_reset_tcs(&sc->HCS_Tcs[i], sc->HCS_SConf1); 448 } 449 450 iha_reset_chip(sc, iot, ioh); 451 bus_space_write_1(iot, ioh, TUL_SIEN, ALL_INTERRUPTS); 452 453 return (0); 454 } 455 456 /* 457 * iha_minphys - reduce bp->b_bcount to something less than 458 * or equal to the largest I/O possible through 459 * the adapter. Called from higher layers 460 * via sc->sc_adapter.scsi_minphys. 461 */ 462 void 463 iha_minphys(struct buf *bp, struct scsi_link *sl) 464 { 465 if (bp->b_bcount > ((IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE)) 466 bp->b_bcount = ((IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE); 467 468 minphys(bp); 469 } 470 471 /* 472 * iha_reset_dma - abort any active DMA xfer, reset tulip FIFO. 473 */ 474 void 475 iha_reset_dma(iot, ioh) 476 bus_space_tag_t iot; 477 bus_space_handle_t ioh; 478 { 479 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 480 /* if DMA xfer is pending, abort DMA xfer */ 481 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 482 /* wait Abort DMA xfer done */ 483 while ((bus_space_read_1(iot, ioh, TUL_ISTUS0) & DABT) == 0) 484 ; 485 } 486 487 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 488 } 489 490 /* 491 * iha_scb_alloc - return the first free SCB, or NULL if there are none. 492 */ 493 void * 494 iha_scb_alloc(xsc) 495 void *xsc; 496 { 497 struct iha_softc *sc = xsc; 498 struct iha_scb *pScb; 499 500 mtx_enter(&sc->sc_scb_mtx); 501 pScb = TAILQ_FIRST(&sc->HCS_FreeScb); 502 if (pScb != NULL) { 503 pScb->SCB_Status = STATUS_RENT; 504 TAILQ_REMOVE(&sc->HCS_FreeScb, pScb, SCB_ScbList); 505 } 506 mtx_leave(&sc->sc_scb_mtx); 507 508 return (pScb); 509 } 510 511 /* 512 * iha_scb_free - append the supplied SCB to the tail of the 513 * HCS_FreeScb queue after clearing and resetting 514 * everything possible. 515 */ 516 void 517 iha_scb_free(void *xsc, void *xscb) 518 { 519 struct iha_softc *sc = xsc; 520 struct iha_scb *pScb = xscb; 521 int s; 522 523 s = splbio(); 524 if (pScb == sc->HCS_ActScb) 525 sc->HCS_ActScb = NULL; 526 splx(s); 527 528 pScb->SCB_Status = STATUS_QUEUED; 529 pScb->SCB_HaStat = HOST_OK; 530 pScb->SCB_TaStat = SCSI_OK; 531 532 pScb->SCB_NxtStat = 0; 533 pScb->SCB_Flags = 0; 534 pScb->SCB_Target = 0; 535 pScb->SCB_Lun = 0; 536 pScb->SCB_CDBLen = 0; 537 pScb->SCB_Ident = 0; 538 pScb->SCB_TagMsg = 0; 539 540 pScb->SCB_BufChars = 0; 541 pScb->SCB_BufCharsLeft = 0; 542 543 pScb->SCB_Xs = NULL; 544 pScb->SCB_Tcs = NULL; 545 546 bzero(pScb->SCB_CDB, sizeof(pScb->SCB_CDB)); 547 548 /* 549 * SCB_TagId is set at initialization and never changes 550 */ 551 552 mtx_enter(&sc->sc_scb_mtx); 553 TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList); 554 mtx_leave(&sc->sc_scb_mtx); 555 } 556 557 void 558 iha_append_pend_scb(sc, pScb) 559 struct iha_softc *sc; 560 struct iha_scb *pScb; 561 { 562 /* ASSUMPTION: only called within a splbio()/splx() pair */ 563 564 if (pScb == sc->HCS_ActScb) 565 sc->HCS_ActScb = NULL; 566 567 pScb->SCB_Status = STATUS_QUEUED; 568 569 TAILQ_INSERT_TAIL(&sc->HCS_PendScb, pScb, SCB_ScbList); 570 } 571 572 void 573 iha_push_pend_scb(sc, pScb) 574 struct iha_softc *sc; 575 struct iha_scb *pScb; 576 { 577 int s; 578 579 s = splbio(); 580 581 if (pScb == sc->HCS_ActScb) 582 sc->HCS_ActScb = NULL; 583 584 pScb->SCB_Status = STATUS_QUEUED; 585 586 TAILQ_INSERT_HEAD(&sc->HCS_PendScb, pScb, SCB_ScbList); 587 588 splx(s); 589 } 590 591 /* 592 * iha_find_pend_scb - scan the pending queue for a SCB that can be 593 * processed immediately. Return NULL if none found 594 * and a pointer to the SCB if one is found. If there 595 * is an active SCB, return NULL! 596 */ 597 struct iha_scb * 598 iha_find_pend_scb(sc) 599 struct iha_softc *sc; 600 { 601 struct iha_scb *pScb; 602 struct tcs *pTcs; 603 int s; 604 605 s = splbio(); 606 607 if (sc->HCS_ActScb != NULL) 608 pScb = NULL; 609 610 else 611 TAILQ_FOREACH(pScb, &sc->HCS_PendScb, SCB_ScbList) { 612 if ((pScb->SCB_Flags & SCSI_RESET) != 0) 613 /* ALWAYS willing to reset a device */ 614 break; 615 616 pTcs = pScb->SCB_Tcs; 617 618 if ((pScb->SCB_TagMsg) != 0) { 619 /* 620 * A Tagged I/O. OK to start If no 621 * non-tagged I/O is active on the same 622 * target 623 */ 624 if (pTcs->TCS_NonTagScb == NULL) 625 break; 626 627 } else if (pScb->SCB_CDB[0] == REQUEST_SENSE) { 628 /* 629 * OK to do a non-tagged request sense 630 * even if a non-tagged I/O has been 631 * started, because we don't allow any 632 * disconnect during a request sense op 633 */ 634 break; 635 636 } else if (pTcs->TCS_TagCnt == 0) { 637 /* 638 * No tagged I/O active on this target, 639 * ok to start a non-tagged one if one 640 * is not already active 641 */ 642 if (pTcs->TCS_NonTagScb == NULL) 643 break; 644 } 645 } 646 647 splx(s); 648 649 return (pScb); 650 } 651 652 void 653 iha_mark_busy_scb(pScb) 654 struct iha_scb *pScb; 655 { 656 int s; 657 658 s = splbio(); 659 660 pScb->SCB_Status = STATUS_BUSY; 661 662 if (pScb->SCB_TagMsg == 0) 663 pScb->SCB_Tcs->TCS_NonTagScb = pScb; 664 else 665 pScb->SCB_Tcs->TCS_TagCnt++; 666 667 splx(s); 668 } 669 670 void 671 iha_append_done_scb(sc, pScb, hastat) 672 struct iha_softc *sc; 673 struct iha_scb *pScb; 674 u_int8_t hastat; 675 { 676 struct tcs *pTcs; 677 int s; 678 679 s = splbio(); 680 681 if (pScb->SCB_Xs != NULL) 682 timeout_del(&pScb->SCB_Xs->stimeout); 683 684 if (pScb == sc->HCS_ActScb) 685 sc->HCS_ActScb = NULL; 686 687 pTcs = pScb->SCB_Tcs; 688 689 if (pScb->SCB_TagMsg != 0) { 690 if (pTcs->TCS_TagCnt) 691 pTcs->TCS_TagCnt--; 692 } else if (pTcs->TCS_NonTagScb == pScb) 693 pTcs->TCS_NonTagScb = NULL; 694 695 pScb->SCB_Status = STATUS_QUEUED; 696 pScb->SCB_HaStat = hastat; 697 698 TAILQ_INSERT_TAIL(&sc->HCS_DoneScb, pScb, SCB_ScbList); 699 700 splx(s); 701 } 702 703 struct iha_scb * 704 iha_pop_done_scb(sc) 705 struct iha_softc *sc; 706 { 707 struct iha_scb *pScb; 708 int s; 709 710 s = splbio(); 711 712 pScb = TAILQ_FIRST(&sc->HCS_DoneScb); 713 714 if (pScb != NULL) { 715 pScb->SCB_Status = STATUS_RENT; 716 TAILQ_REMOVE(&sc->HCS_DoneScb, pScb, SCB_ScbList); 717 } 718 719 splx(s); 720 721 return (pScb); 722 } 723 724 /* 725 * iha_abort_xs - find the SCB associated with the supplied xs and 726 * stop all processing on it, moving it to the done 727 * queue with the supplied host status value. 728 */ 729 void 730 iha_abort_xs(sc, xs, hastat) 731 struct iha_softc *sc; 732 struct scsi_xfer *xs; 733 u_int8_t hastat; 734 { 735 struct iha_scb *pScb, *next; 736 int i, s; 737 738 s = splbio(); 739 740 /* Check the pending queue for the SCB pointing to xs */ 741 742 for (pScb = TAILQ_FIRST(&sc->HCS_PendScb); pScb != NULL; pScb = next) { 743 next = TAILQ_NEXT(pScb, SCB_ScbList); 744 if (pScb->SCB_Xs == xs) { 745 TAILQ_REMOVE(&sc->HCS_PendScb, pScb, SCB_ScbList); 746 iha_append_done_scb(sc, pScb, hastat); 747 splx(s); 748 return; 749 } 750 } 751 752 /* 753 * If that didn't work, check all BUSY/SELECTING SCB's for one 754 * pointing to xs 755 */ 756 757 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) 758 switch (pScb->SCB_Status) { 759 case STATUS_BUSY: 760 case STATUS_SELECT: 761 if (pScb->SCB_Xs == xs) { 762 iha_append_done_scb(sc, pScb, hastat); 763 splx(s); 764 return; 765 } 766 break; 767 default: 768 break; 769 } 770 771 splx(s); 772 } 773 774 /* 775 * iha_bad_seq - a SCSI bus phase was encountered out of the 776 * correct/expected sequence. Reset the SCSI bus. 777 */ 778 void 779 iha_bad_seq(sc) 780 struct iha_softc *sc; 781 { 782 struct iha_scb *pScb = sc->HCS_ActScb; 783 784 if (pScb != NULL) 785 iha_append_done_scb(sc, pScb, HOST_BAD_PHAS); 786 787 iha_reset_scsi_bus(sc); 788 iha_reset_chip(sc, sc->sc_iot, sc->sc_ioh); 789 } 790 791 /* 792 * iha_push_sense_request - obtain auto sense data by pushing the 793 * SCB needing it back onto the pending 794 * queue with a REQUEST_SENSE CDB. 795 */ 796 int 797 iha_push_sense_request(sc, pScb) 798 struct iha_softc *sc; 799 struct iha_scb *pScb; 800 { 801 struct scsi_sense *sensecmd; 802 int error; 803 804 /* First sync & unload any existing DataDma and SGDma maps */ 805 if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) { 806 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma, 807 0, pScb->SCB_BufChars, 808 ((pScb->SCB_Flags & SCSI_DATA_IN) ? 809 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE)); 810 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma); 811 /* Don't unload this map again until it is reloaded */ 812 pScb->SCB_Flags &= ~(SCSI_DATA_IN | SCSI_DATA_OUT); 813 } 814 if ((pScb->SCB_Flags & FLAG_SG) != 0) { 815 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma, 816 0, sizeof(pScb->SCB_SGList), 817 BUS_DMASYNC_POSTWRITE); 818 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_SGDma); 819 /* Don't unload this map again until it is reloaded */ 820 pScb->SCB_Flags &= ~FLAG_SG; 821 } 822 823 pScb->SCB_BufChars = sizeof(pScb->SCB_ScsiSenseData); 824 pScb->SCB_BufCharsLeft = sizeof(pScb->SCB_ScsiSenseData); 825 bzero(&pScb->SCB_ScsiSenseData, sizeof(pScb->SCB_ScsiSenseData)); 826 827 error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_DataDma, 828 &pScb->SCB_ScsiSenseData, 829 sizeof(pScb->SCB_ScsiSenseData), NULL, 830 (pScb->SCB_Flags & SCSI_NOSLEEP) ? 831 BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 832 if (error) { 833 sc_print_addr(pScb->SCB_Xs->sc_link); 834 printf("error %d loading request sense buffer dma map\n", 835 error); 836 return (error); 837 } 838 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma, 839 0, pScb->SCB_BufChars, BUS_DMASYNC_PREREAD); 840 841 /* Save _POLL and _NOSLEEP flags. */ 842 pScb->SCB_Flags &= SCSI_POLL | SCSI_NOSLEEP; 843 pScb->SCB_Flags |= FLAG_RSENS | SCSI_DATA_IN; 844 845 error = iha_setup_sg_list(sc, pScb); 846 if (error) 847 return (error); 848 849 pScb->SCB_Ident &= ~MSG_IDENTIFY_DISCFLAG; 850 851 pScb->SCB_TagMsg = 0; 852 pScb->SCB_TaStat = SCSI_OK; 853 854 bzero(pScb->SCB_CDB, sizeof(pScb->SCB_CDB)); 855 856 sensecmd = (struct scsi_sense *)pScb->SCB_CDB; 857 pScb->SCB_CDBLen = sizeof(*sensecmd); 858 sensecmd->opcode = REQUEST_SENSE; 859 sensecmd->byte2 = pScb->SCB_Xs->sc_link->lun << 5; 860 sensecmd->length = sizeof(pScb->SCB_ScsiSenseData); 861 862 if ((pScb->SCB_Flags & SCSI_POLL) == 0) 863 timeout_add_msec(&pScb->SCB_Xs->stimeout, 864 pScb->SCB_Xs->timeout); 865 866 iha_push_pend_scb(sc, pScb); 867 868 return (0); 869 } 870 871 /* 872 * iha_main - process the active SCB, taking one off pending and making it 873 * active if necessary, and any done SCB's created as 874 * a result until there are no interrupts pending and no pending 875 * SCB's that can be started. 876 */ 877 void 878 iha_main(sc, iot, ioh) 879 struct iha_softc *sc; 880 bus_space_tag_t iot; 881 bus_space_handle_t ioh; 882 { 883 struct iha_scb *pScb; 884 885 for (;;) { 886 iha_scsi_label: 887 iha_scsi(sc, iot, ioh); 888 889 while ((pScb = iha_pop_done_scb(sc)) != NULL) { 890 891 switch (pScb->SCB_TaStat) { 892 case SCSI_TERMINATED: 893 case SCSI_ACA_ACTIVE: 894 case SCSI_CHECK: 895 pScb->SCB_Tcs->TCS_Flags &= 896 ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 897 898 if ((pScb->SCB_Flags & FLAG_RSENS) != 0) 899 /* Check condition on check condition*/ 900 pScb->SCB_HaStat = HOST_BAD_PHAS; 901 else if (iha_push_sense_request(sc, pScb) != 0) 902 /* Could not push sense request */ 903 pScb->SCB_HaStat = HOST_BAD_PHAS; 904 else 905 /* REQUEST SENSE ready to process */ 906 goto iha_scsi_label; 907 break; 908 909 default: 910 if ((pScb->SCB_Flags & FLAG_RSENS) != 0) 911 /* 912 * Return the original SCSI_CHECK, not 913 * the status of the request sense 914 * command! 915 */ 916 pScb->SCB_TaStat = SCSI_CHECK; 917 break; 918 } 919 920 iha_done_scb(sc, pScb); 921 } 922 923 /* 924 * If there are no interrupts pending, or we can't start 925 * a pending sc, break out of the for(;;). Otherwise 926 * continue the good work with another call to 927 * iha_scsi(). 928 */ 929 if (((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 930 && (iha_find_pend_scb(sc) == NULL)) 931 break; 932 } 933 } 934 935 /* 936 * iha_scsi - service any outstanding interrupts. If there are none, try to 937 * start another SCB currently in the pending queue. 938 */ 939 void 940 iha_scsi(sc, iot, ioh) 941 struct iha_softc *sc; 942 bus_space_tag_t iot; 943 bus_space_handle_t ioh; 944 { 945 struct iha_scb *pScb; 946 struct tcs *pTcs; 947 u_int8_t stat; 948 int i; 949 950 /* service pending interrupts asap */ 951 952 stat = bus_space_read_1(iot, ioh, TUL_STAT0); 953 if ((stat & INTPD) != 0) { 954 sc->HCS_JSStatus0 = stat; 955 sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1); 956 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT); 957 958 sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK; 959 960 if ((sc->HCS_JSInt & SRSTD) != 0) { 961 iha_reset_scsi_bus(sc); 962 return; 963 } 964 965 if ((sc->HCS_JSInt & RSELED) != 0) { 966 iha_resel(sc, iot, ioh); 967 return; 968 } 969 970 if ((sc->HCS_JSInt & (STIMEO | DISCD)) != 0) { 971 iha_busfree(sc, iot, ioh); 972 return; 973 } 974 975 if ((sc->HCS_JSInt & (SCMDN | SBSRV)) != 0) { 976 iha_next_state(sc, iot, ioh); 977 return; 978 } 979 980 if ((sc->HCS_JSInt & SELED) != 0) 981 iha_set_ssig(iot, ioh, 0, 0); 982 } 983 984 /* 985 * There were no interrupts pending which required action elsewhere, so 986 * see if it is possible to start the selection phase on a pending SCB 987 */ 988 if ((pScb = iha_find_pend_scb(sc)) == NULL) 989 return; 990 991 pTcs = pScb->SCB_Tcs; 992 993 /* program HBA's SCSI ID & target SCSI ID */ 994 bus_space_write_1(iot, ioh, TUL_SID, 995 (sc->sc_link.adapter_target << 4) | pScb->SCB_Target); 996 997 if ((pScb->SCB_Flags & SCSI_RESET) == 0) { 998 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 999 1000 if (((pTcs->TCS_Flags & FLAG_NO_NEG_WIDE) == 0) 1001 || 1002 ((pTcs->TCS_Flags & FLAG_NO_NEG_SYNC) == 0)) 1003 iha_select(sc, iot, ioh, pScb, SELATNSTOP); 1004 1005 else if (pScb->SCB_TagMsg != 0) 1006 iha_select(sc, iot, ioh, pScb, SEL_ATN3); 1007 1008 else 1009 iha_select(sc, iot, ioh, pScb, SEL_ATN); 1010 1011 } else { 1012 iha_select(sc, iot, ioh, pScb, SELATNSTOP); 1013 pScb->SCB_NxtStat = 8; 1014 } 1015 1016 if ((pScb->SCB_Flags & SCSI_POLL) != 0) { 1017 for (i = pScb->SCB_Xs->timeout; i > 0; i--) { 1018 if (iha_wait(sc, iot, ioh, NO_OP) == -1) 1019 break; 1020 if (iha_next_state(sc, iot, ioh) == -1) 1021 break; 1022 delay(1000); /* Only happens in boot, so it's ok */ 1023 } 1024 1025 /* 1026 * Since done queue processing not done until AFTER this 1027 * function returns, pScb is on the done queue, not 1028 * the free queue at this point and still has valid data 1029 * 1030 * Conversely, xs->error has not been set yet 1031 */ 1032 if (i == 0) 1033 iha_timeout(pScb); 1034 1035 else if ((pScb->SCB_CDB[0] == INQUIRY) 1036 && (pScb->SCB_Lun == 0) 1037 && (pScb->SCB_HaStat == HOST_OK) 1038 && (pScb->SCB_TaStat == SCSI_OK)) 1039 iha_print_info(sc, pScb->SCB_Target); 1040 } 1041 } 1042 1043 /* 1044 * iha_data_over_run - return HOST_OK for all SCSI opcodes where BufCharsLeft 1045 * is an 'Allocation Length'. All other SCSI opcodes 1046 * get HOST_DO_DU as they SHOULD have xferred all the 1047 * data requested. 1048 * 1049 * The list of opcodes using 'Allocation Length' was 1050 * found by scanning all the SCSI-3 T10 drafts. See 1051 * www.t10.org for the curious with a .pdf reader. 1052 */ 1053 u_int8_t 1054 iha_data_over_run(pScb) 1055 struct iha_scb *pScb; 1056 { 1057 switch (pScb->SCB_CDB[0]) { 1058 case 0x03: /* Request Sense SPC-2 */ 1059 case 0x12: /* Inquiry SPC-2 */ 1060 case 0x1a: /* Mode Sense (6 byte version) SPC-2 */ 1061 case 0x1c: /* Receive Diagnostic Results SPC-2 */ 1062 case 0x23: /* Read Format Capacities MMC-2 */ 1063 case 0x29: /* Read Generation SBC */ 1064 case 0x34: /* Read Position SSC-2 */ 1065 case 0x37: /* Read Defect Data SBC */ 1066 case 0x3c: /* Read Buffer SPC-2 */ 1067 case 0x42: /* Read Sub Channel MMC-2 */ 1068 case 0x43: /* Read TOC/PMA/ATIP MMC */ 1069 1070 /* XXX - 2 with same opcode of 0x44? */ 1071 case 0x44: /* Read Header/Read Density Suprt MMC/SSC*/ 1072 1073 case 0x46: /* Get Configuration MMC-2 */ 1074 case 0x4a: /* Get Event/Status Notification MMC-2 */ 1075 case 0x4d: /* Log Sense SPC-2 */ 1076 case 0x51: /* Read Disc Information MMC */ 1077 case 0x52: /* Read Track Information MMC */ 1078 case 0x59: /* Read Master CUE MMC */ 1079 case 0x5a: /* Mode Sense (10 byte version) SPC-2 */ 1080 case 0x5c: /* Read Buffer Capacity MMC */ 1081 case 0x5e: /* Persistent Reserve In SPC-2 */ 1082 case 0x84: /* Receive Copy Results SPC-2 */ 1083 case 0xa0: /* Report LUNs SPC-2 */ 1084 case 0xa3: /* Various Report requests SBC-2/SCC-2*/ 1085 case 0xa4: /* Report Key MMC-2 */ 1086 case 0xad: /* Read DVD Structure MMC-2 */ 1087 case 0xb4: /* Read Element Status (Attached) SMC */ 1088 case 0xb5: /* Request Volume Element Address SMC */ 1089 case 0xb7: /* Read Defect Data (12 byte ver.) SBC */ 1090 case 0xb8: /* Read Element Status (Independ.) SMC */ 1091 case 0xba: /* Report Redundancy SCC-2 */ 1092 case 0xbd: /* Mechanism Status MMC */ 1093 case 0xbe: /* Report Basic Redundancy SCC-2 */ 1094 1095 return (HOST_OK); 1096 break; 1097 1098 default: 1099 return (HOST_DO_DU); 1100 break; 1101 } 1102 } 1103 1104 /* 1105 * iha_next_state - process the current SCB as requested in its 1106 * SCB_NxtStat member. 1107 */ 1108 int 1109 iha_next_state(sc, iot, ioh) 1110 struct iha_softc *sc; 1111 bus_space_tag_t iot; 1112 bus_space_handle_t ioh; 1113 { 1114 if (sc->HCS_ActScb == NULL) 1115 return (-1); 1116 1117 switch (sc->HCS_ActScb->SCB_NxtStat) { 1118 case 1: 1119 if (iha_state_1(sc, iot, ioh) == 3) 1120 goto state_3; 1121 break; 1122 1123 case 2: 1124 switch (iha_state_2(sc, iot, ioh)) { 1125 case 3: goto state_3; 1126 case 4: goto state_4; 1127 default: break; 1128 } 1129 break; 1130 1131 case 3: 1132 state_3: 1133 if (iha_state_3(sc, iot, ioh) == 4) 1134 goto state_4; 1135 break; 1136 1137 case 4: 1138 state_4: 1139 switch (iha_state_4(sc, iot, ioh)) { 1140 case 0: return (0); 1141 case 6: goto state_6; 1142 default: break; 1143 } 1144 break; 1145 1146 case 5: 1147 switch (iha_state_5(sc, iot, ioh)) { 1148 case 4: goto state_4; 1149 case 6: goto state_6; 1150 default: break; 1151 } 1152 break; 1153 1154 case 6: 1155 state_6: 1156 iha_state_6(sc, iot, ioh); 1157 break; 1158 1159 case 8: 1160 iha_state_8(sc, iot, ioh); 1161 break; 1162 1163 default: 1164 #ifdef IHA_DEBUG_STATE 1165 sc_print_addr(sc->HCS_ActScb->SCB_Xs->sc_link); 1166 printf("[debug] -unknown state: %i-\n", 1167 sc->HCS_ActScb->SCB_NxtStat); 1168 #endif 1169 iha_bad_seq(sc); 1170 break; 1171 } 1172 1173 return (-1); 1174 } 1175 1176 /* 1177 * iha_state_1 - selection is complete after a SELATNSTOP. If the target 1178 * has put the bus into MSG_OUT phase start wide/sync 1179 * negotiation. Otherwise clear the FIFO and go to state 3, 1180 * which will send the SCSI CDB to the target. 1181 */ 1182 int 1183 iha_state_1(sc, iot, ioh) 1184 struct iha_softc *sc; 1185 bus_space_tag_t iot; 1186 bus_space_handle_t ioh; 1187 { 1188 struct iha_scb *pScb = sc->HCS_ActScb; 1189 struct tcs *pTcs; 1190 u_int16_t flags; 1191 1192 iha_mark_busy_scb(pScb); 1193 1194 pTcs = pScb->SCB_Tcs; 1195 1196 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 1197 1198 /* 1199 * If we are in PHASE_MSG_OUT, send 1200 * a) IDENT message (with tags if appropriate) 1201 * b) WDTR if the target is configured to negotiate wide xfers 1202 * ** OR ** 1203 * c) SDTR if the target is configured to negotiate sync xfers 1204 * but not wide ones 1205 * 1206 * If we are NOT, then the target is not asking for anything but 1207 * the data/command, so go straight to state 3. 1208 */ 1209 if (sc->HCS_Phase == PHASE_MSG_OUT) { 1210 bus_space_write_1(iot, ioh, TUL_SCTRL1, (ESBUSIN | EHRSL)); 1211 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident); 1212 1213 if (pScb->SCB_TagMsg != 0) { 1214 bus_space_write_1(iot, ioh, TUL_SFIFO, 1215 pScb->SCB_TagMsg); 1216 bus_space_write_1(iot, ioh, TUL_SFIFO, 1217 pScb->SCB_TagId); 1218 } 1219 1220 flags = pTcs->TCS_Flags; 1221 if ((flags & FLAG_NO_NEG_WIDE) == 0) { 1222 if (iha_msgout_wdtr(sc, iot, ioh) == -1) 1223 return (-1); 1224 } else if ((flags & FLAG_NO_NEG_SYNC) == 0) { 1225 if (iha_msgout_sdtr(sc, iot, ioh) == -1) 1226 return (-1); 1227 } 1228 1229 } else { 1230 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1231 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 1232 } 1233 1234 return (3); 1235 } 1236 1237 /* 1238 * iha_state_2 - selection is complete after a SEL_ATN or SEL_ATN3. If the SCSI 1239 * CDB has already been send, go to state 4 to start the data 1240 * xfer. Otherwise reset the FIFO and go to state 3, sending 1241 * the SCSI CDB. 1242 */ 1243 int 1244 iha_state_2(sc, iot, ioh) 1245 struct iha_softc *sc; 1246 bus_space_tag_t iot; 1247 bus_space_handle_t ioh; 1248 { 1249 struct iha_scb *pScb = sc->HCS_ActScb; 1250 1251 iha_mark_busy_scb(pScb); 1252 1253 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pScb->SCB_Tcs->TCS_SConfig0); 1254 1255 if ((sc->HCS_JSStatus1 & CPDNE) != 0) 1256 return (4); 1257 1258 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1259 1260 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 1261 1262 return (3); 1263 } 1264 1265 /* 1266 * iha_state_3 - send the SCSI CDB to the target, processing any status 1267 * or other messages received until that is done or 1268 * abandoned. 1269 */ 1270 int 1271 iha_state_3(sc, iot, ioh) 1272 struct iha_softc *sc; 1273 bus_space_tag_t iot; 1274 bus_space_handle_t ioh; 1275 { 1276 struct iha_scb *pScb = sc->HCS_ActScb; 1277 u_int16_t flags; 1278 1279 for (;;) 1280 switch (sc->HCS_Phase) { 1281 case PHASE_CMD_OUT: 1282 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 1283 pScb->SCB_CDB, pScb->SCB_CDBLen); 1284 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1) 1285 return (-1); 1286 else if (sc->HCS_Phase == PHASE_CMD_OUT) { 1287 iha_bad_seq(sc); 1288 return (-1); 1289 } else 1290 return (4); 1291 1292 case PHASE_MSG_IN: 1293 pScb->SCB_NxtStat = 3; 1294 if (iha_msgin(sc, iot, ioh) == -1) 1295 return (-1); 1296 break; 1297 1298 case PHASE_STATUS_IN: 1299 if (iha_status_msg(sc, iot, ioh) == -1) 1300 return (-1); 1301 break; 1302 1303 case PHASE_MSG_OUT: 1304 flags = pScb->SCB_Tcs->TCS_Flags; 1305 if ((flags & FLAG_NO_NEG_SYNC) != 0) { 1306 if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1) 1307 return (-1); 1308 } else if (iha_msgout_sdtr(sc, iot, ioh) == -1) 1309 return (-1); 1310 break; 1311 1312 default: 1313 #ifdef IHA_DEBUG_STATE 1314 sc_print_addr(pScb->SCB_Xs->sc_link); 1315 printf("[debug] -s3- bad phase = %d\n", sc->HCS_Phase); 1316 #endif 1317 iha_bad_seq(sc); 1318 return (-1); 1319 } 1320 } 1321 1322 /* 1323 * iha_state_4 - start a data xfer. Handle any bus state 1324 * transitions until PHASE_DATA_IN/_OUT 1325 * or the attempt is abandoned. If there is 1326 * no data to xfer, go to state 6 and finish 1327 * processing the current SCB. 1328 */ 1329 int 1330 iha_state_4(sc, iot, ioh) 1331 struct iha_softc *sc; 1332 bus_space_tag_t iot; 1333 bus_space_handle_t ioh; 1334 { 1335 struct iha_scb *pScb = sc->HCS_ActScb; 1336 1337 if ((pScb->SCB_Flags & FLAG_DIR) == FLAG_DIR) 1338 return (6); /* Both dir flags set => NO xfer was requested */ 1339 1340 for (;;) { 1341 if (pScb->SCB_BufCharsLeft == 0) 1342 return (6); 1343 1344 switch (sc->HCS_Phase) { 1345 case PHASE_STATUS_IN: 1346 if ((pScb->SCB_Flags & FLAG_DIR) != 0) 1347 pScb->SCB_HaStat = iha_data_over_run(pScb); 1348 if ((iha_status_msg(sc, iot, ioh)) == -1) 1349 return (-1); 1350 break; 1351 1352 case PHASE_MSG_IN: 1353 pScb->SCB_NxtStat = 4; 1354 if (iha_msgin(sc, iot, ioh) == -1) 1355 return (-1); 1356 break; 1357 1358 case PHASE_MSG_OUT: 1359 if ((sc->HCS_JSStatus0 & SPERR) != 0) { 1360 pScb->SCB_BufCharsLeft = 0; 1361 pScb->SCB_HaStat = HOST_SPERR; 1362 if (iha_msgout(sc, iot, ioh, 1363 MSG_INITIATOR_DET_ERR) == -1) 1364 return (-1); 1365 else 1366 return (6); 1367 } else { 1368 if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1) 1369 return (-1); 1370 } 1371 break; 1372 1373 case PHASE_DATA_IN: 1374 return (iha_xfer_data(pScb, iot, ioh, SCSI_DATA_IN)); 1375 1376 case PHASE_DATA_OUT: 1377 return (iha_xfer_data(pScb, iot, ioh, SCSI_DATA_OUT)); 1378 1379 default: 1380 iha_bad_seq(sc); 1381 return (-1); 1382 } 1383 } 1384 } 1385 1386 /* 1387 * iha_state_5 - handle the partial or final completion of the current 1388 * data xfer. If DMA is still active stop it. If there is 1389 * more data to xfer, go to state 4 and start the xfer. 1390 * If not go to state 6 and finish the SCB. 1391 */ 1392 int 1393 iha_state_5(sc, iot, ioh) 1394 struct iha_softc *sc; 1395 bus_space_tag_t iot; 1396 bus_space_handle_t ioh; 1397 { 1398 struct iha_scb *pScb = sc->HCS_ActScb; 1399 struct iha_sg_element *pSg; 1400 u_int32_t cnt; 1401 u_int16_t period; 1402 u_int8_t stat; 1403 long xcnt; /* cannot use unsigned!! see code: if (xcnt < 0) */ 1404 1405 cnt = bus_space_read_4(iot, ioh, TUL_STCNT0) & TCNT; 1406 1407 /* 1408 * Stop any pending DMA activity and check for parity error. 1409 */ 1410 1411 if ((bus_space_read_1(iot, ioh, TUL_DCMD) & XDIR) != 0) { 1412 /* Input Operation */ 1413 if ((sc->HCS_JSStatus0 & SPERR) != 0) 1414 pScb->SCB_HaStat = HOST_SPERR; 1415 1416 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1417 bus_space_write_1(iot, ioh, TUL_DCTRL0, 1418 bus_space_read_1(iot, ioh, TUL_DCTRL0) | SXSTP); 1419 while (bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) 1420 ; 1421 } 1422 1423 } else { 1424 /* Output Operation */ 1425 if ((sc->HCS_JSStatus1 & SXCMP) == 0) { 1426 period = pScb->SCB_Tcs->TCS_JS_Period; 1427 if ((period & PERIOD_WIDE_SCSI) != 0) 1428 cnt += (bus_space_read_1(iot, ioh, 1429 TUL_SFIFOCNT) & FIFOC) << 1; 1430 else 1431 cnt += (bus_space_read_1(iot, ioh, 1432 TUL_SFIFOCNT) & FIFOC); 1433 } 1434 1435 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1436 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 1437 do 1438 stat = bus_space_read_1(iot, ioh, TUL_ISTUS0); 1439 while ((stat & DABT) == 0); 1440 } 1441 1442 if ((cnt == 1) && (sc->HCS_Phase == PHASE_DATA_OUT)) { 1443 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1) 1444 return (-1); 1445 cnt = 0; 1446 1447 } else if ((sc->HCS_JSStatus1 & SXCMP) == 0) 1448 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1449 } 1450 1451 if (cnt == 0) { 1452 pScb->SCB_BufCharsLeft = 0; 1453 return (6); 1454 } 1455 1456 /* Update active data pointer and restart the I/O at the new point */ 1457 1458 xcnt = pScb->SCB_BufCharsLeft - cnt; /* xcnt == bytes xferred */ 1459 pScb->SCB_BufCharsLeft = cnt; /* cnt == bytes left */ 1460 1461 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma, 1462 0, sizeof(pScb->SCB_SGList), BUS_DMASYNC_POSTWRITE); 1463 1464 if ((pScb->SCB_Flags & FLAG_SG) != 0) { 1465 pSg = &pScb->SCB_SGList[pScb->SCB_SGIdx]; 1466 for (; pScb->SCB_SGIdx < pScb->SCB_SGCount; pSg++, pScb->SCB_SGIdx++) { 1467 xcnt -= pSg->SG_Len; 1468 if (xcnt < 0) { 1469 xcnt += pSg->SG_Len; 1470 1471 pSg->SG_Addr += xcnt; 1472 pSg->SG_Len -= xcnt; 1473 1474 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma, 1475 0, sizeof(pScb->SCB_SGList), 1476 BUS_DMASYNC_PREWRITE); 1477 1478 return (4); 1479 } 1480 } 1481 return (6); 1482 1483 } 1484 1485 return (4); 1486 } 1487 1488 /* 1489 * iha_state_6 - finish off the active scb (may require several 1490 * iterations if PHASE_MSG_IN) and return -1 to indicate 1491 * the bus is free. 1492 */ 1493 int 1494 iha_state_6(sc, iot, ioh) 1495 struct iha_softc *sc; 1496 bus_space_tag_t iot; 1497 bus_space_handle_t ioh; 1498 { 1499 for (;;) 1500 switch (sc->HCS_Phase) { 1501 case PHASE_STATUS_IN: 1502 if (iha_status_msg(sc, iot, ioh) == -1) 1503 return (-1); 1504 break; 1505 1506 case PHASE_MSG_IN: 1507 sc->HCS_ActScb->SCB_NxtStat = 6; 1508 if ((iha_msgin(sc, iot, ioh)) == -1) 1509 return (-1); 1510 break; 1511 1512 case PHASE_MSG_OUT: 1513 if ((iha_msgout(sc, iot, ioh, MSG_NOOP)) == -1) 1514 return (-1); 1515 break; 1516 1517 case PHASE_DATA_IN: 1518 if (iha_xpad_in(sc, iot, ioh) == -1) 1519 return (-1); 1520 break; 1521 1522 case PHASE_DATA_OUT: 1523 if (iha_xpad_out(sc, iot, ioh) == -1) 1524 return (-1); 1525 break; 1526 1527 default: 1528 iha_bad_seq(sc); 1529 return (-1); 1530 } 1531 } 1532 1533 /* 1534 * iha_state_8 - reset the active device and all busy SCBs using it 1535 */ 1536 int 1537 iha_state_8(sc, iot, ioh) 1538 struct iha_softc *sc; 1539 bus_space_tag_t iot; 1540 bus_space_handle_t ioh; 1541 { 1542 struct iha_scb *pScb; 1543 u_int32_t i; 1544 u_int8_t tar; 1545 1546 if (sc->HCS_Phase == PHASE_MSG_OUT) { 1547 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_BUS_DEV_RESET); 1548 1549 pScb = sc->HCS_ActScb; 1550 1551 /* This SCB finished correctly -- resetting the device */ 1552 iha_append_done_scb(sc, pScb, HOST_OK); 1553 1554 iha_reset_tcs(pScb->SCB_Tcs, sc->HCS_SConf1); 1555 1556 tar = pScb->SCB_Target; 1557 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) 1558 if (pScb->SCB_Target == tar) 1559 switch (pScb->SCB_Status) { 1560 case STATUS_BUSY: 1561 iha_append_done_scb(sc, 1562 pScb, HOST_DEV_RST); 1563 break; 1564 1565 case STATUS_SELECT: 1566 iha_push_pend_scb(sc, pScb); 1567 break; 1568 1569 default: 1570 break; 1571 } 1572 1573 sc->HCS_Flags |= FLAG_EXPECT_DISC; 1574 1575 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1) 1576 return (-1); 1577 } 1578 1579 iha_bad_seq(sc); 1580 return (-1); 1581 } 1582 1583 /* 1584 * iha_xfer_data - initiate the DMA xfer of the data 1585 */ 1586 int 1587 iha_xfer_data(pScb, iot, ioh, direction) 1588 struct iha_scb *pScb; 1589 bus_space_tag_t iot; 1590 bus_space_handle_t ioh; 1591 int direction; 1592 { 1593 u_int32_t xferaddr, xferlen; 1594 u_int8_t xfertype; 1595 1596 if ((pScb->SCB_Flags & FLAG_DIR) != direction) 1597 return (6); /* wrong direction, abandon I/O */ 1598 1599 bus_space_write_4(iot, ioh, TUL_STCNT0, pScb->SCB_BufCharsLeft); 1600 1601 if ((pScb->SCB_Flags & FLAG_SG) == 0) { 1602 xferaddr = pScb->SCB_DataDma->dm_segs[0].ds_addr 1603 + (pScb->SCB_BufChars - pScb->SCB_BufCharsLeft); 1604 xferlen = pScb->SCB_BufCharsLeft; 1605 xfertype = (direction == SCSI_DATA_IN) ? ST_X_IN : ST_X_OUT; 1606 1607 } else { 1608 xferaddr = pScb->SCB_SGDma->dm_segs[0].ds_addr 1609 + (pScb->SCB_SGIdx * sizeof(struct iha_sg_element)); 1610 xferlen = (pScb->SCB_SGCount - pScb->SCB_SGIdx) 1611 * sizeof(struct iha_sg_element); 1612 xfertype = (direction == SCSI_DATA_IN) ? ST_SG_IN : ST_SG_OUT; 1613 } 1614 1615 bus_space_write_4(iot, ioh, TUL_DXC, xferlen); 1616 bus_space_write_4(iot, ioh, TUL_DXPA, xferaddr); 1617 bus_space_write_1(iot, ioh, TUL_DCMD, xfertype); 1618 1619 bus_space_write_1(iot, ioh, TUL_SCMD, 1620 (direction == SCSI_DATA_IN) ? XF_DMA_IN : XF_DMA_OUT); 1621 1622 pScb->SCB_NxtStat = 5; 1623 1624 return (0); 1625 } 1626 1627 int 1628 iha_xpad_in(sc, iot, ioh) 1629 struct iha_softc *sc; 1630 bus_space_tag_t iot; 1631 bus_space_handle_t ioh; 1632 { 1633 struct iha_scb *pScb = sc->HCS_ActScb; 1634 1635 if ((pScb->SCB_Flags & FLAG_DIR) != 0) 1636 pScb->SCB_HaStat = HOST_DO_DU; 1637 1638 for (;;) { 1639 if ((pScb->SCB_Tcs->TCS_JS_Period & PERIOD_WIDE_SCSI) != 0) 1640 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1641 else 1642 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1643 1644 switch (iha_wait(sc, iot, ioh, XF_FIFO_IN)) { 1645 case -1: 1646 return (-1); 1647 1648 case PHASE_DATA_IN: 1649 bus_space_read_1(iot, ioh, TUL_SFIFO); 1650 break; 1651 1652 default: 1653 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1654 return (6); 1655 } 1656 } 1657 } 1658 1659 int 1660 iha_xpad_out(sc, iot, ioh) 1661 struct iha_softc *sc; 1662 bus_space_tag_t iot; 1663 bus_space_handle_t ioh; 1664 { 1665 struct iha_scb *pScb = sc->HCS_ActScb; 1666 1667 if ((pScb->SCB_Flags & FLAG_DIR) != 0) 1668 pScb->SCB_HaStat = HOST_DO_DU; 1669 1670 for (;;) { 1671 if ((pScb->SCB_Tcs->TCS_JS_Period & PERIOD_WIDE_SCSI) != 0) 1672 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1673 else 1674 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1675 1676 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1677 1678 switch (iha_wait(sc, iot, ioh, XF_FIFO_OUT)) { 1679 case -1: 1680 return (-1); 1681 1682 case PHASE_DATA_OUT: 1683 break; 1684 1685 default: 1686 /* Disable wide CPU to allow read 16 bits */ 1687 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1688 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1689 return (6); 1690 } 1691 } 1692 } 1693 1694 int 1695 iha_status_msg(sc, iot, ioh) 1696 struct iha_softc *sc; 1697 bus_space_tag_t iot; 1698 bus_space_handle_t ioh; 1699 { 1700 struct iha_scb *pScb; 1701 u_int8_t msg; 1702 int phase; 1703 1704 if ((phase = iha_wait(sc, iot, ioh, CMD_COMP)) == -1) 1705 return (-1); 1706 1707 pScb = sc->HCS_ActScb; 1708 1709 pScb->SCB_TaStat = bus_space_read_1(iot, ioh, TUL_SFIFO); 1710 1711 if (phase == PHASE_MSG_OUT) { 1712 if ((sc->HCS_JSStatus0 & SPERR) == 0) 1713 bus_space_write_1(iot, ioh, TUL_SFIFO, 1714 MSG_NOOP); 1715 else 1716 bus_space_write_1(iot, ioh, TUL_SFIFO, 1717 MSG_PARITY_ERROR); 1718 1719 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT)); 1720 1721 } else if (phase == PHASE_MSG_IN) { 1722 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1723 1724 if ((sc->HCS_JSStatus0 & SPERR) != 0) 1725 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 1726 case -1: 1727 return (-1); 1728 case PHASE_MSG_OUT: 1729 bus_space_write_1(iot, ioh, TUL_SFIFO, 1730 MSG_PARITY_ERROR); 1731 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT)); 1732 default: 1733 iha_bad_seq(sc); 1734 return (-1); 1735 } 1736 1737 if (msg == MSG_CMDCOMPLETE) { 1738 if ((pScb->SCB_TaStat 1739 & (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) { 1740 iha_bad_seq(sc); 1741 return (-1); 1742 } 1743 sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC; 1744 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1745 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 1746 } 1747 1748 if ((msg == MSG_LINK_CMD_COMPLETE) 1749 || (msg == MSG_LINK_CMD_COMPLETEF)) { 1750 if ((pScb->SCB_TaStat 1751 & (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) 1752 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 1753 } 1754 } 1755 1756 iha_bad_seq(sc); 1757 return (-1); 1758 } 1759 1760 /* 1761 * iha_busfree - SCSI bus free detected as a result of a TIMEOUT or 1762 * DISCONNECT interrupt. Reset the tulip FIFO and 1763 * SCONFIG0 and enable hardware reselect. Move any active 1764 * SCB to HCS_DoneScb list. Return an appropriate host status 1765 * if an I/O was active. 1766 */ 1767 void 1768 iha_busfree(sc, iot, ioh) 1769 struct iha_softc *sc; 1770 bus_space_tag_t iot; 1771 bus_space_handle_t ioh; 1772 { 1773 struct iha_scb *pScb; 1774 1775 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1776 bus_space_write_1(iot, ioh, TUL_SCONFIG0, SCONFIG0DEFAULT); 1777 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1778 1779 pScb = sc->HCS_ActScb; 1780 1781 if (pScb != NULL) { 1782 if (pScb->SCB_Status == STATUS_SELECT) 1783 /* selection timeout */ 1784 iha_append_done_scb(sc, pScb, HOST_SEL_TOUT); 1785 else 1786 /* Unexpected bus free */ 1787 iha_append_done_scb(sc, pScb, HOST_BAD_PHAS); 1788 1789 } 1790 } 1791 1792 void 1793 iha_reset_scsi_bus(sc) 1794 struct iha_softc *sc; 1795 { 1796 struct iha_scb *pScb; 1797 struct tcs *pTcs; 1798 int i, s; 1799 1800 s = splbio(); 1801 1802 iha_reset_dma(sc->sc_iot, sc->sc_ioh); 1803 1804 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) 1805 switch (pScb->SCB_Status) { 1806 case STATUS_BUSY: 1807 iha_append_done_scb(sc, pScb, HOST_SCSI_RST); 1808 break; 1809 1810 case STATUS_SELECT: 1811 iha_push_pend_scb(sc, pScb); 1812 break; 1813 1814 default: 1815 break; 1816 } 1817 1818 for (i = 0, pTcs = sc->HCS_Tcs; i < IHA_MAX_TARGETS; i++, pTcs++) 1819 iha_reset_tcs(pTcs, sc->HCS_SConf1); 1820 1821 splx(s); 1822 } 1823 1824 /* 1825 * iha_resel - handle a detected SCSI bus reselection request. 1826 */ 1827 int 1828 iha_resel(sc, iot, ioh) 1829 struct iha_softc *sc; 1830 bus_space_tag_t iot; 1831 bus_space_handle_t ioh; 1832 { 1833 struct iha_scb *pScb; 1834 struct tcs *pTcs; 1835 u_int8_t tag, target, lun, msg, abortmsg; 1836 1837 if (sc->HCS_ActScb != NULL) { 1838 if ((sc->HCS_ActScb->SCB_Status == STATUS_SELECT)) 1839 iha_push_pend_scb(sc, sc->HCS_ActScb); 1840 sc->HCS_ActScb = NULL; 1841 } 1842 1843 target = bus_space_read_1(iot, ioh, TUL_SBID); 1844 lun = bus_space_read_1(iot, ioh, TUL_SALVC) & MSG_IDENTIFY_LUNMASK; 1845 1846 pTcs = &sc->HCS_Tcs[target]; 1847 1848 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 1849 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 1850 1851 abortmsg = MSG_ABORT; /* until a valid tag has been obtained */ 1852 1853 if (pTcs->TCS_NonTagScb != NULL) 1854 /* There is a non-tagged I/O active on the target */ 1855 pScb = pTcs->TCS_NonTagScb; 1856 1857 else { 1858 /* 1859 * Since there is no active non-tagged operation 1860 * read the tag type, the tag itself, and find 1861 * the appropriate pScb by indexing HCS_Scb with 1862 * the tag. 1863 */ 1864 1865 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 1866 case -1: 1867 return (-1); 1868 case PHASE_MSG_IN: 1869 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1870 if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1) 1871 return (-1); 1872 break; 1873 default: 1874 goto abort; 1875 } 1876 1877 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag Msg */ 1878 1879 if ((msg < MSG_SIMPLE_Q_TAG) || (msg > MSG_ORDERED_Q_TAG)) 1880 goto abort; 1881 1882 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 1883 case -1: 1884 return (-1); 1885 case PHASE_MSG_IN: 1886 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1887 if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1) 1888 return (-1); 1889 break; 1890 default: 1891 goto abort; 1892 } 1893 1894 tag = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag ID */ 1895 pScb = &sc->HCS_Scb[tag]; 1896 1897 abortmsg = MSG_ABORT_TAG; /* Now that we have valdid tag! */ 1898 } 1899 1900 if ((pScb->SCB_Target != target) 1901 || (pScb->SCB_Lun != lun) 1902 || (pScb->SCB_Status != STATUS_BUSY)) { 1903 abort: 1904 iha_msgout_abort(sc, iot, ioh, abortmsg); 1905 return (-1); 1906 } 1907 1908 sc->HCS_ActScb = pScb; 1909 1910 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == -1) 1911 return (-1); 1912 1913 return(iha_next_state(sc, iot, ioh)); 1914 } 1915 1916 int 1917 iha_msgin(sc, iot, ioh) 1918 struct iha_softc *sc; 1919 bus_space_tag_t iot; 1920 bus_space_handle_t ioh; 1921 { 1922 u_int16_t flags; 1923 u_int8_t msg; 1924 int phase; 1925 1926 for (;;) { 1927 if ((bus_space_read_1(iot, ioh, TUL_SFIFOCNT) & FIFOC) > 0) 1928 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1929 1930 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1931 1932 phase = iha_wait(sc, iot, ioh, XF_FIFO_IN); 1933 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1934 1935 switch (msg) { 1936 case MSG_DISCONNECT: 1937 sc->HCS_Flags |= FLAG_EXPECT_DISC; 1938 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) != -1) 1939 iha_bad_seq(sc); 1940 phase = -1; 1941 break; 1942 case MSG_SAVEDATAPOINTER: 1943 case MSG_RESTOREPOINTERS: 1944 case MSG_NOOP: 1945 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1946 break; 1947 case MSG_MESSAGE_REJECT: 1948 /* XXX - need to clear FIFO like other 'Clear ATN'?*/ 1949 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 1950 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags; 1951 if ((flags & FLAG_NO_NEG_SYNC) == 0) 1952 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 1953 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1954 break; 1955 case MSG_EXTENDED: 1956 phase = iha_msgin_extended(sc, iot, ioh); 1957 break; 1958 case MSG_IGN_WIDE_RESIDUE: 1959 phase = iha_msgin_ignore_wid_resid(sc, iot, ioh); 1960 break; 1961 case MSG_CMDCOMPLETE: 1962 sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC; 1963 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1964 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1965 if (phase != -1) { 1966 iha_bad_seq(sc); 1967 return (-1); 1968 } 1969 break; 1970 default: 1971 #ifdef IHA_DEBUG_STATE 1972 printf("[debug] iha_msgin: bad msg type: %d\n", msg); 1973 #endif 1974 phase = iha_msgout_reject(sc, iot, ioh); 1975 break; 1976 } 1977 1978 if (phase != PHASE_MSG_IN) 1979 return (phase); 1980 } 1981 /* NOTREACHED */ 1982 } 1983 1984 int 1985 iha_msgin_ignore_wid_resid(sc, iot, ioh) 1986 struct iha_softc *sc; 1987 bus_space_tag_t iot; 1988 bus_space_handle_t ioh; 1989 { 1990 int phase; 1991 1992 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1993 1994 if (phase == PHASE_MSG_IN) { 1995 phase = iha_wait(sc, iot, ioh, XF_FIFO_IN); 1996 1997 if (phase != -1) { 1998 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1999 bus_space_read_1 (iot, ioh, TUL_SFIFO); 2000 bus_space_read_1 (iot, ioh, TUL_SFIFO); 2001 2002 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 2003 } 2004 } 2005 2006 return (phase); 2007 } 2008 2009 int 2010 iha_msgin_extended(sc, iot, ioh) 2011 struct iha_softc *sc; 2012 bus_space_tag_t iot; 2013 bus_space_handle_t ioh; 2014 { 2015 u_int16_t flags; 2016 int i, phase, msglen, msgcode; 2017 2018 /* XXX - can we just stop reading and reject, or do we have to 2019 * read all input, discarding the excess, and then reject 2020 */ 2021 for (i = 0; i < IHA_MAX_EXTENDED_MSG; i++) { 2022 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 2023 2024 if (phase != PHASE_MSG_IN) 2025 return (phase); 2026 2027 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2028 2029 if (iha_wait(sc, iot, ioh, XF_FIFO_IN) == -1) 2030 return (-1); 2031 2032 sc->HCS_Msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO); 2033 2034 if (sc->HCS_Msg[0] == i) 2035 break; 2036 } 2037 2038 msglen = sc->HCS_Msg[0]; 2039 msgcode = sc->HCS_Msg[1]; 2040 2041 if ((msglen == MSG_EXT_SDTR_LEN) && (msgcode == MSG_EXT_SDTR)) { 2042 if (iha_msgin_sdtr(sc) == 0) { 2043 iha_sync_done(sc, iot, ioh); 2044 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 2045 } 2046 2047 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2048 2049 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 2050 if (phase != PHASE_MSG_OUT) 2051 return (phase); 2052 2053 /* Clear FIFO for important message - final SYNC offer */ 2054 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2055 2056 iha_sync_done(sc, iot, ioh); /* This is our final offer */ 2057 2058 } else if ((msglen == MSG_EXT_WDTR_LEN) && (msgcode == MSG_EXT_WDTR)) { 2059 2060 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags; 2061 2062 if ((flags & FLAG_NO_WIDE) != 0) 2063 /* Offer 8 bit xfers only */ 2064 sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_8_BIT; 2065 2066 else if (sc->HCS_Msg[2] > MSG_EXT_WDTR_BUS_32_BIT) 2067 return (iha_msgout_reject(sc, iot, ioh)); 2068 2069 else if (sc->HCS_Msg[2] == MSG_EXT_WDTR_BUS_32_BIT) 2070 /* Offer 16 instead */ 2071 sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_32_BIT; 2072 2073 else { 2074 iha_wide_done(sc, iot, ioh); 2075 if ((flags & FLAG_NO_NEG_SYNC) == 0) 2076 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2077 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 2078 } 2079 2080 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2081 2082 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 2083 if (phase != PHASE_MSG_OUT) 2084 return (phase); 2085 2086 } else 2087 return (iha_msgout_reject(sc, iot, ioh)); 2088 2089 /* Send message built in sc->HCS_Msg[] */ 2090 return (iha_msgout_extended(sc, iot, ioh)); 2091 } 2092 2093 /* 2094 * iha_msgin_sdtr - check SDTR msg in HCS_Msg. If the offer is 2095 * acceptable leave HCS_Msg as is and return 0. 2096 * If the negotiation must continue, modify HCS_Msg 2097 * as needed and return 1. Else return 0. 2098 */ 2099 int 2100 iha_msgin_sdtr(sc) 2101 struct iha_softc *sc; 2102 { 2103 u_int16_t flags; 2104 u_int8_t default_period; 2105 int newoffer; 2106 2107 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags; 2108 2109 default_period = iha_rate_tbl[flags & FLAG_SCSI_RATE]; 2110 2111 if (sc->HCS_Msg[3] == 0) /* target offered async only. Accept it. */ 2112 return (0); 2113 2114 newoffer = 0; 2115 2116 if ((flags & FLAG_NO_SYNC) != 0) { 2117 sc->HCS_Msg[3] = 0; 2118 newoffer = 1; 2119 } 2120 2121 if (sc->HCS_Msg[3] > IHA_MAX_TARGETS-1) { 2122 sc->HCS_Msg[3] = IHA_MAX_TARGETS-1; 2123 newoffer = 1; 2124 } 2125 2126 if (sc->HCS_Msg[2] < default_period) { 2127 sc->HCS_Msg[2] = default_period; 2128 newoffer = 1; 2129 } 2130 2131 if (sc->HCS_Msg[2] >= 59) { 2132 sc->HCS_Msg[3] = 0; 2133 newoffer = 1; 2134 } 2135 2136 return (newoffer); 2137 } 2138 2139 int 2140 iha_msgout(sc, iot, ioh, msg) 2141 struct iha_softc *sc; 2142 bus_space_tag_t iot; 2143 bus_space_handle_t ioh; 2144 u_int8_t msg; 2145 { 2146 bus_space_write_1(iot, ioh, TUL_SFIFO, msg); 2147 2148 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT)); 2149 } 2150 2151 void 2152 iha_msgout_abort(sc, iot, ioh, aborttype) 2153 struct iha_softc *sc; 2154 bus_space_tag_t iot; 2155 bus_space_handle_t ioh; 2156 u_int8_t aborttype; 2157 { 2158 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2159 2160 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 2161 case -1: 2162 break; 2163 2164 case PHASE_MSG_OUT: 2165 sc->HCS_Flags |= FLAG_EXPECT_DISC; 2166 if (iha_msgout(sc, iot, ioh, aborttype) != -1) 2167 iha_bad_seq(sc); 2168 break; 2169 2170 default: 2171 iha_bad_seq(sc); 2172 break; 2173 } 2174 } 2175 2176 int 2177 iha_msgout_reject(sc, iot, ioh) 2178 struct iha_softc *sc; 2179 bus_space_tag_t iot; 2180 bus_space_handle_t ioh; 2181 { 2182 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2183 2184 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == PHASE_MSG_OUT) 2185 return (iha_msgout(sc, iot, ioh, MSG_MESSAGE_REJECT)); 2186 2187 return (-1); 2188 } 2189 2190 int 2191 iha_msgout_extended(sc, iot, ioh) 2192 struct iha_softc *sc; 2193 bus_space_tag_t iot; 2194 bus_space_handle_t ioh; 2195 { 2196 int phase; 2197 2198 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_EXTENDED); 2199 2200 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2201 sc->HCS_Msg, sc->HCS_Msg[0]+1); 2202 2203 phase = iha_wait(sc, iot, ioh, XF_FIFO_OUT); 2204 2205 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2206 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 2207 2208 return (phase); 2209 } 2210 2211 int 2212 iha_msgout_wdtr(sc, iot, ioh) 2213 struct iha_softc *sc; 2214 bus_space_tag_t iot; 2215 bus_space_handle_t ioh; 2216 { 2217 sc->HCS_ActScb->SCB_Tcs->TCS_Flags |= FLAG_WIDE_DONE; 2218 2219 sc->HCS_Msg[0] = MSG_EXT_WDTR_LEN; 2220 sc->HCS_Msg[1] = MSG_EXT_WDTR; 2221 sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_16_BIT; 2222 2223 return (iha_msgout_extended(sc, iot, ioh)); 2224 } 2225 2226 int 2227 iha_msgout_sdtr(sc, iot, ioh) 2228 struct iha_softc *sc; 2229 bus_space_tag_t iot; 2230 bus_space_handle_t ioh; 2231 { 2232 u_int16_t rateindex; 2233 u_int8_t sync_rate; 2234 2235 rateindex = sc->HCS_ActScb->SCB_Tcs->TCS_Flags & FLAG_SCSI_RATE; 2236 2237 sync_rate = iha_rate_tbl[rateindex]; 2238 2239 sc->HCS_Msg[0] = MSG_EXT_SDTR_LEN; 2240 sc->HCS_Msg[1] = MSG_EXT_SDTR; 2241 sc->HCS_Msg[2] = sync_rate; 2242 sc->HCS_Msg[3] = IHA_MAX_TARGETS-1; /* REQ/ACK */ 2243 2244 return (iha_msgout_extended(sc, iot, ioh)); 2245 } 2246 2247 void 2248 iha_wide_done(sc, iot, ioh) 2249 struct iha_softc *sc; 2250 bus_space_tag_t iot; 2251 bus_space_handle_t ioh; 2252 { 2253 struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs; 2254 2255 pTcs->TCS_JS_Period = 0; 2256 2257 if (sc->HCS_Msg[2] != 0) 2258 pTcs->TCS_JS_Period |= PERIOD_WIDE_SCSI; 2259 2260 pTcs->TCS_SConfig0 &= ~ALTPD; 2261 pTcs->TCS_Flags &= ~FLAG_SYNC_DONE; 2262 pTcs->TCS_Flags |= FLAG_WIDE_DONE; 2263 2264 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 2265 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 2266 } 2267 2268 void 2269 iha_sync_done(sc, iot, ioh) 2270 struct iha_softc *sc; 2271 bus_space_tag_t iot; 2272 bus_space_handle_t ioh; 2273 { 2274 struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs; 2275 int i; 2276 2277 if ((pTcs->TCS_Flags & FLAG_SYNC_DONE) == 0) { 2278 if (sc->HCS_Msg[3] != 0) { 2279 pTcs->TCS_JS_Period |= sc->HCS_Msg[3]; 2280 2281 /* pick the highest possible rate */ 2282 for (i = 0; i < sizeof(iha_rate_tbl); i++) 2283 if (iha_rate_tbl[i] >= sc->HCS_Msg[2]) 2284 break; 2285 2286 pTcs->TCS_JS_Period |= (i << 4); 2287 pTcs->TCS_SConfig0 |= ALTPD; 2288 } 2289 2290 pTcs->TCS_Flags |= FLAG_SYNC_DONE; 2291 2292 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 2293 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 2294 } 2295 } 2296 2297 void 2298 iha_reset_chip(sc, iot, ioh) 2299 struct iha_softc *sc; 2300 bus_space_tag_t iot; 2301 bus_space_handle_t ioh; 2302 { 2303 int i; 2304 2305 /* reset tulip chip */ 2306 2307 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSCSI); 2308 2309 do 2310 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT); 2311 while((sc->HCS_JSInt & SRSTD) == 0); 2312 2313 iha_set_ssig(iot, ioh, 0, 0); 2314 2315 /* 2316 * Stall for 2 seconds, wait for target's firmware ready. 2317 */ 2318 for (i = 0; i < 2000; i++) 2319 DELAY (1000); 2320 2321 bus_space_read_1(iot, ioh, TUL_SISTAT); /* Clear any active interrupt*/ 2322 } 2323 2324 void 2325 iha_select(sc, iot, ioh, pScb, select_type) 2326 struct iha_softc *sc; 2327 bus_space_tag_t iot; 2328 bus_space_handle_t ioh; 2329 struct iha_scb *pScb; 2330 u_int8_t select_type; 2331 { 2332 int s; 2333 2334 switch (select_type) { 2335 case SEL_ATN: 2336 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident); 2337 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2338 pScb->SCB_CDB, pScb->SCB_CDBLen); 2339 2340 pScb->SCB_NxtStat = 2; 2341 break; 2342 2343 case SELATNSTOP: 2344 pScb->SCB_NxtStat = 1; 2345 break; 2346 2347 case SEL_ATN3: 2348 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident); 2349 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_TagMsg); 2350 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_TagId); 2351 2352 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, pScb->SCB_CDB, 2353 pScb->SCB_CDBLen); 2354 2355 pScb->SCB_NxtStat = 2; 2356 break; 2357 2358 default: 2359 #ifdef IHA_DEBUG_STATE 2360 sc_print_addr(pScb->SCB_Xs->sc_link); 2361 printf("[debug] iha_select() - unknown select type = 0x%02x\n", 2362 select_type); 2363 #endif 2364 return; 2365 } 2366 2367 s = splbio(); 2368 TAILQ_REMOVE(&sc->HCS_PendScb, pScb, SCB_ScbList); 2369 splx(s); 2370 2371 pScb->SCB_Status = STATUS_SELECT; 2372 2373 sc->HCS_ActScb = pScb; 2374 2375 bus_space_write_1(iot, ioh, TUL_SCMD, select_type); 2376 } 2377 2378 /* 2379 * iha_wait - wait for an interrupt to service or a SCSI bus phase change 2380 * after writing the supplied command to the tulip chip. If 2381 * the command is NO_OP, skip the command writing. 2382 */ 2383 int 2384 iha_wait(sc, iot, ioh, cmd) 2385 struct iha_softc *sc; 2386 bus_space_tag_t iot; 2387 bus_space_handle_t ioh; 2388 u_int8_t cmd; 2389 { 2390 if (cmd != NO_OP) 2391 bus_space_write_1(iot, ioh, TUL_SCMD, cmd); 2392 2393 /* 2394 * Have to do this here, in addition to in iha_isr, because 2395 * interrupts might be turned off when we get here. 2396 */ 2397 do 2398 sc->HCS_JSStatus0 = bus_space_read_1(iot, ioh, TUL_STAT0); 2399 while ((sc->HCS_JSStatus0 & INTPD) == 0); 2400 2401 sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1); 2402 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT); 2403 2404 sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK; 2405 2406 if ((sc->HCS_JSInt & SRSTD) != 0) { 2407 /* SCSI bus reset interrupt */ 2408 iha_reset_scsi_bus(sc); 2409 return (-1); 2410 } 2411 2412 if ((sc->HCS_JSInt & RSELED) != 0) 2413 /* Reselection interrupt */ 2414 return (iha_resel(sc, iot, ioh)); 2415 2416 if ((sc->HCS_JSInt & STIMEO) != 0) { 2417 /* selected/reselected timeout interrupt */ 2418 iha_busfree(sc, iot, ioh); 2419 return (-1); 2420 } 2421 2422 if ((sc->HCS_JSInt & DISCD) != 0) { 2423 /* BUS disconnection interrupt */ 2424 if ((sc->HCS_Flags & FLAG_EXPECT_DONE_DISC) != 0) { 2425 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2426 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2427 SCONFIG0DEFAULT); 2428 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2429 iha_append_done_scb(sc, sc->HCS_ActScb, HOST_OK); 2430 sc->HCS_Flags &= ~FLAG_EXPECT_DONE_DISC; 2431 2432 } else if ((sc->HCS_Flags & FLAG_EXPECT_DISC) != 0) { 2433 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2434 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2435 SCONFIG0DEFAULT); 2436 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2437 sc->HCS_ActScb = NULL; 2438 sc->HCS_Flags &= ~FLAG_EXPECT_DISC; 2439 2440 } else 2441 iha_busfree(sc, iot, ioh); 2442 2443 return (-1); 2444 } 2445 2446 return (sc->HCS_Phase); 2447 } 2448 2449 /* 2450 * iha_done_scb - We have a scb which has been processed by the 2451 * adaptor, now we look to see how the operation went. 2452 */ 2453 void 2454 iha_done_scb(sc, pScb) 2455 struct iha_softc *sc; 2456 struct iha_scb *pScb; 2457 { 2458 struct scsi_sense_data *s1, *s2; 2459 struct scsi_xfer *xs = pScb->SCB_Xs; 2460 2461 if (xs != NULL) { 2462 timeout_del(&xs->stimeout); 2463 2464 xs->status = pScb->SCB_TaStat; 2465 2466 if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) { 2467 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma, 2468 0, pScb->SCB_BufChars, 2469 ((pScb->SCB_Flags & SCSI_DATA_IN) ? 2470 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE)); 2471 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma); 2472 } 2473 if ((pScb->SCB_Flags & FLAG_SG) != 0) { 2474 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma, 2475 0, sizeof(pScb->SCB_SGList), 2476 BUS_DMASYNC_POSTWRITE); 2477 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_SGDma); 2478 } 2479 2480 switch (pScb->SCB_HaStat) { 2481 case HOST_OK: 2482 switch (pScb->SCB_TaStat) { 2483 case SCSI_OK: 2484 case SCSI_COND_MET: 2485 case SCSI_INTERM: 2486 case SCSI_INTERM_COND_MET: 2487 xs->resid = pScb->SCB_BufCharsLeft; 2488 xs->error = XS_NOERROR; 2489 break; 2490 2491 case SCSI_RESV_CONFLICT: 2492 case SCSI_BUSY: 2493 case SCSI_QUEUE_FULL: 2494 xs->error = XS_BUSY; 2495 break; 2496 2497 case SCSI_TERMINATED: 2498 case SCSI_ACA_ACTIVE: 2499 case SCSI_CHECK: 2500 s1 = &pScb->SCB_ScsiSenseData; 2501 s2 = &xs->sense; 2502 *s2 = *s1; 2503 2504 xs->error = XS_SENSE; 2505 break; 2506 2507 default: 2508 xs->error = XS_DRIVER_STUFFUP; 2509 break; 2510 } 2511 break; 2512 2513 case HOST_SEL_TOUT: 2514 xs->error = XS_SELTIMEOUT; 2515 break; 2516 2517 case HOST_SCSI_RST: 2518 case HOST_DEV_RST: 2519 xs->error = XS_RESET; 2520 break; 2521 2522 case HOST_SPERR: 2523 sc_print_addr(xs->sc_link); 2524 printf("SCSI Parity error detected\n"); 2525 xs->error = XS_DRIVER_STUFFUP; 2526 break; 2527 2528 case HOST_TIMED_OUT: 2529 xs->error = XS_TIMEOUT; 2530 break; 2531 2532 case HOST_DO_DU: 2533 case HOST_BAD_PHAS: 2534 default: 2535 xs->error = XS_DRIVER_STUFFUP; 2536 break; 2537 } 2538 scsi_done(xs); 2539 } 2540 } 2541 2542 void 2543 iha_timeout(arg) 2544 void *arg; 2545 { 2546 struct iha_scb *pScb = (struct iha_scb *)arg; 2547 struct scsi_xfer *xs = pScb->SCB_Xs; 2548 2549 if (xs != NULL) { 2550 sc_print_addr(xs->sc_link); 2551 printf("SCSI OpCode 0x%02x timed out\n", xs->cmd->opcode); 2552 iha_abort_xs(xs->sc_link->adapter_softc, xs, HOST_TIMED_OUT); 2553 } 2554 } 2555 2556 void 2557 iha_exec_scb(sc, pScb) 2558 struct iha_softc *sc; 2559 struct iha_scb *pScb; 2560 { 2561 bus_space_handle_t ioh; 2562 bus_space_tag_t iot; 2563 int s; 2564 2565 s = splbio(); 2566 2567 if (((pScb->SCB_Flags & SCSI_RESET) != 0) 2568 || (pScb->SCB_CDB[0] == REQUEST_SENSE)) 2569 iha_push_pend_scb(sc, pScb); /* Insert SCB at head of Pend */ 2570 else 2571 iha_append_pend_scb(sc, pScb); /* Append SCB to tail of Pend */ 2572 2573 /* 2574 * Run through iha_main() to ensure something is active, if 2575 * only this new SCB. 2576 */ 2577 if (sc->HCS_Semaph != SEMAPH_IN_MAIN) { 2578 iot = sc->sc_iot; 2579 ioh = sc->sc_ioh; 2580 2581 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 2582 sc->HCS_Semaph = SEMAPH_IN_MAIN; 2583 2584 splx(s); 2585 iha_main(sc, iot, ioh); 2586 s = splbio(); 2587 2588 sc->HCS_Semaph = ~SEMAPH_IN_MAIN; 2589 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 2590 } 2591 2592 splx(s); 2593 } 2594 2595 2596 /* 2597 * iha_set_ssig - read the current scsi signal mask, then write a new 2598 * one which turns off/on the specified signals. 2599 */ 2600 void 2601 iha_set_ssig( iot, ioh, offsigs, onsigs) 2602 bus_space_tag_t iot; 2603 bus_space_handle_t ioh; 2604 u_int8_t offsigs, onsigs; 2605 { 2606 u_int8_t currsigs; 2607 2608 currsigs = bus_space_read_1(iot, ioh, TUL_SSIGI); 2609 bus_space_write_1(iot, ioh, TUL_SSIGO, (currsigs & ~offsigs) | onsigs); 2610 } 2611 2612 void 2613 iha_print_info(sc, target) 2614 struct iha_softc *sc; 2615 int target; 2616 { 2617 u_int8_t period = sc->HCS_Tcs[target].TCS_JS_Period; 2618 u_int8_t config = sc->HCS_Tcs[target].TCS_SConfig0; 2619 int rate; 2620 2621 printf("%s: target %d using %d bit ", sc->sc_dev.dv_xname, target, 2622 (period & PERIOD_WIDE_SCSI) ? 16 : 8); 2623 2624 if ((period & PERIOD_SYOFS) == 0) 2625 printf("async "); 2626 else { 2627 rate = (period & PERIOD_SYXPD) >> 4; 2628 if ((config & ALTPD) == 0) 2629 rate = 100 + rate * 50; 2630 else 2631 rate = 50 + rate * 25; 2632 rate = 1000000000 / rate; 2633 printf("%d.%d MHz %d REQ/ACK offset ", rate / 1000000, 2634 (rate % 1000000 + 99999) / 100000, period & PERIOD_SYOFS); 2635 } 2636 2637 printf("xfers\n"); 2638 } 2639 2640 2641 /* 2642 * iha_alloc_scbs - allocate and map the SCB's for the supplied iha_softc 2643 */ 2644 int 2645 iha_alloc_scbs(sc) 2646 struct iha_softc *sc; 2647 { 2648 bus_dma_segment_t seg; 2649 int error, rseg; 2650 2651 /* 2652 * Allocate dma-safe memory for the SCB's 2653 */ 2654 if ((error = bus_dmamem_alloc(sc->sc_dmat, 2655 sizeof(struct iha_scb)*IHA_MAX_SCB, 2656 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT | BUS_DMA_ZERO)) 2657 != 0) { 2658 printf("%s: unable to allocate SCBs," 2659 " error = %d\n", sc->sc_dev.dv_xname, error); 2660 return (error); 2661 } 2662 if ((error = bus_dmamem_map(sc->sc_dmat, 2663 &seg, rseg, sizeof(struct iha_scb)*IHA_MAX_SCB, 2664 (caddr_t *)&sc->HCS_Scb, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) 2665 != 0) { 2666 printf("%s: unable to map SCBs, error = %d\n", 2667 sc->sc_dev.dv_xname, error); 2668 return (error); 2669 } 2670 2671 return (0); 2672 } 2673 2674 /* 2675 * iha_read_eeprom - read contents of serial EEPROM into iha_nvram pointed at 2676 * by parameter nvram. 2677 */ 2678 void 2679 iha_read_eeprom(iot, ioh, nvram) 2680 bus_space_tag_t iot; 2681 bus_space_handle_t ioh; 2682 struct iha_nvram *nvram; 2683 { 2684 u_int32_t chksum; 2685 u_int16_t *np; 2686 u_int8_t gctrl, addr; 2687 2688 const int chksum_addr = offsetof(struct iha_nvram, NVM_CheckSum) / 2; 2689 2690 /* Enable EEProm programming */ 2691 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) | EEPRG; 2692 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2693 2694 /* Read EEProm */ 2695 np = (u_int16_t *)nvram; 2696 for (addr=0, chksum=0; addr < chksum_addr; addr++, np++) { 2697 *np = iha_se2_rd(iot, ioh, addr); 2698 chksum += *np; 2699 } 2700 2701 chksum &= 0x0000ffff; 2702 nvram->NVM_CheckSum = iha_se2_rd(iot, ioh, chksum_addr); 2703 2704 /* Disable EEProm programming */ 2705 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) & ~EEPRG; 2706 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2707 2708 if ((nvram->NVM_Signature != SIGNATURE) 2709 || 2710 (nvram->NVM_CheckSum != chksum)) 2711 panic("iha: invalid EEPROM, bad signature or checksum"); 2712 } 2713 2714 /* 2715 * iha_se2_rd - read & return the 16 bit value at the specified 2716 * offset in the Serial E2PROM 2717 * 2718 */ 2719 u_int16_t 2720 iha_se2_rd(iot, ioh, addr) 2721 bus_space_tag_t iot; 2722 bus_space_handle_t ioh; 2723 u_int8_t addr; 2724 { 2725 u_int16_t readWord; 2726 u_int8_t bit; 2727 int i; 2728 2729 /* Send 'READ' instruction == address | READ bit */ 2730 iha_se2_instr(iot, ioh, (addr | NVREAD)); 2731 2732 readWord = 0; 2733 for (i = 15; i >= 0; i--) { 2734 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2735 DELAY(5); 2736 2737 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2738 DELAY(5); 2739 2740 /* sample data after the following edge of clock */ 2741 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI; 2742 DELAY(5); 2743 2744 readWord += bit << i; 2745 } 2746 2747 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2748 DELAY(5); 2749 2750 return (readWord); 2751 } 2752 2753 /* 2754 * iha_se2_instr - write an octet to serial E2PROM one bit at a time 2755 */ 2756 void 2757 iha_se2_instr(iot, ioh, instr) 2758 bus_space_tag_t iot; 2759 bus_space_handle_t ioh; 2760 u_int8_t instr; 2761 { 2762 u_int8_t b; 2763 int i; 2764 2765 b = NVRCS | NVRDO; /* Write the start bit (== 1) */ 2766 2767 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2768 DELAY(5); 2769 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2770 DELAY(5); 2771 2772 for (i = 0; i < 8; i++, instr <<= 1) { 2773 if (instr & 0x80) 2774 b = NVRCS | NVRDO; /* Write a 1 bit */ 2775 else 2776 b = NVRCS; /* Write a 0 bit */ 2777 2778 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2779 DELAY(5); 2780 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2781 DELAY(5); 2782 } 2783 2784 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2785 DELAY(5); 2786 2787 return; 2788 } 2789 2790 /* 2791 * iha_reset_tcs - reset the target control structure pointed 2792 * to by pTcs to default values. TCS_Flags 2793 * only has the negotiation done bits reset as 2794 * the other bits are fixed at initialization. 2795 */ 2796 void 2797 iha_reset_tcs(pTcs, config0) 2798 struct tcs *pTcs; 2799 u_int8_t config0; 2800 { 2801 pTcs->TCS_Flags &= ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 2802 pTcs->TCS_JS_Period = 0; 2803 pTcs->TCS_SConfig0 = config0; 2804 pTcs->TCS_TagCnt = 0; 2805 pTcs->TCS_NonTagScb = NULL; 2806 } 2807