1 /* $OpenBSD: iha.c,v 1.8 2001/07/13 04:27:09 krw Exp $ */ 2 /* 3 * Initio INI-9xxxU/UW SCSI Device Driver 4 * 5 * Copyright (c) 2000-2001 Ken Westerback 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer, 13 * without modification, immediately at the beginning of the file. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 26 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 *------------------------------------------------------------------------- 30 * 31 * Ported from i91u.c, provided by Initio Corporation, which credits: 32 * 33 * Device driver for the INI-9XXXU/UW or INIC-940/950 PCI SCSI Controller. 34 * 35 * FreeBSD 36 * 37 * Written for 386bsd and FreeBSD by 38 * Winston Hung <winstonh@initio.com> 39 * 40 * Copyright (c) 1997-99 Initio Corp. All rights reserved. 41 * 42 *------------------------------------------------------------------------- 43 */ 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/buf.h> 48 #include <sys/device.h> 49 50 #include <machine/bus.h> 51 #include <machine/intr.h> 52 53 #include <scsi/scsi_all.h> 54 #include <scsi/scsiconf.h> 55 #include <scsi/scsi_message.h> 56 57 #include <dev/ic/iha.h> 58 59 struct cfdriver iha_cd = { 60 NULL, "iha", DV_DULL 61 }; 62 63 struct scsi_adapter iha_switch = { 64 iha_scsi_cmd, /* int (*scsi_cmd) __P((struct scsi_xfer *)); */ 65 iha_minphys, /* void (*scsi_minphys) __P((struct buf *)); */ 66 NULL, /* int (*open_target_lu) __P((void)); */ 67 NULL /* int (*close_target_lu) __P((void)); */ 68 }; 69 70 struct scsi_device iha_dev = { 71 NULL, /* Use default error handler */ 72 NULL, /* have a queue, served by this */ 73 NULL, /* have no async handler */ 74 NULL, /* Use default 'done' routine */ 75 }; 76 77 /* 78 * SCSI Rate Table, indexed by FLAG_SCSI_RATE field of 79 * TCS_Flags. 80 */ 81 static const u_int8_t iha_rate_tbl[8] = { 82 /* fast 20 */ 83 /* nanosecond divide by 4 */ 84 12, /* 50ns, 20M */ 85 18, /* 75ns, 13.3M */ 86 25, /* 100ns, 10M */ 87 31, /* 125ns, 8M */ 88 37, /* 150ns, 6.6M */ 89 43, /* 175ns, 5.7M */ 90 50, /* 200ns, 5M */ 91 62 /* 250ns, 4M */ 92 }; 93 94 u_int8_t iha_data_over_run __P((struct iha_scsi_req_q *)); 95 void iha_push_sense_request __P((struct iha_softc *, struct iha_scsi_req_q *)); 96 void iha_timeout __P((void *)); 97 int iha_alloc_scbs __P((struct iha_softc *)); 98 void iha_read_eeprom __P((bus_space_tag_t, bus_space_handle_t, 99 struct iha_nvram *)); 100 void iha_se2_instr __P((bus_space_tag_t, bus_space_handle_t, u_int8_t)); 101 u_int16_t iha_se2_rd __P((bus_space_tag_t, bus_space_handle_t, u_int8_t)); 102 void iha_reset_scsi_bus __P((struct iha_softc *)); 103 void iha_reset_chip __P((struct iha_softc *, 104 bus_space_tag_t, bus_space_handle_t)); 105 void iha_reset_dma __P((bus_space_tag_t, bus_space_handle_t)); 106 void iha_reset_tcs __P((struct tcs *, u_int8_t)); 107 void iha_print_info __P((struct iha_softc *, int)); 108 void iha_done_scb __P((struct iha_softc *, struct iha_scsi_req_q *)); 109 void iha_exec_scb __P((struct iha_softc *, struct iha_scsi_req_q *)); 110 void iha_main __P((struct iha_softc *, bus_space_tag_t, bus_space_handle_t)); 111 void iha_scsi __P((struct iha_softc *, bus_space_tag_t, bus_space_handle_t)); 112 int iha_wait __P((struct iha_softc *, bus_space_tag_t, bus_space_handle_t, 113 u_int8_t)); 114 void iha_mark_busy_scb __P((struct iha_scsi_req_q *)); 115 void iha_append_free_scb __P((struct iha_softc *, struct iha_scsi_req_q *)); 116 struct iha_scsi_req_q *iha_pop_free_scb __P((struct iha_softc *)); 117 void iha_append_done_scb __P((struct iha_softc *, struct iha_scsi_req_q *, 118 u_int8_t)); 119 struct iha_scsi_req_q *iha_pop_done_scb __P((struct iha_softc *)); 120 void iha_append_pend_scb __P((struct iha_softc *, struct iha_scsi_req_q *)); 121 void iha_push_pend_scb __P((struct iha_softc *, struct iha_scsi_req_q *)); 122 void iha_del_pend_scb __P((struct iha_softc *, struct iha_scsi_req_q *)); 123 struct iha_scsi_req_q *iha_find_pend_scb __P((struct iha_softc *)); 124 void iha_sync_done __P((struct iha_softc *, 125 bus_space_tag_t, bus_space_handle_t)); 126 void iha_wide_done __P((struct iha_softc *, 127 bus_space_tag_t, bus_space_handle_t)); 128 void iha_bad_seq __P((struct iha_softc *)); 129 int iha_next_state __P((struct iha_softc *, 130 bus_space_tag_t, bus_space_handle_t)); 131 int iha_state_1 __P((struct iha_softc *, 132 bus_space_tag_t, bus_space_handle_t)); 133 int iha_state_2 __P((struct iha_softc *, 134 bus_space_tag_t, bus_space_handle_t)); 135 int iha_state_3 __P((struct iha_softc *, 136 bus_space_tag_t, bus_space_handle_t)); 137 int iha_state_4 __P((struct iha_softc *, 138 bus_space_tag_t, bus_space_handle_t)); 139 int iha_state_5 __P((struct iha_softc *, 140 bus_space_tag_t, bus_space_handle_t)); 141 int iha_state_6 __P((struct iha_softc *, 142 bus_space_tag_t, bus_space_handle_t)); 143 int iha_state_8 __P((struct iha_softc *, 144 bus_space_tag_t, bus_space_handle_t)); 145 void iha_set_ssig __P((bus_space_tag_t, 146 bus_space_handle_t, u_int8_t, u_int8_t)); 147 int iha_xpad_in __P((struct iha_softc *, 148 bus_space_tag_t, bus_space_handle_t)); 149 int iha_xpad_out __P((struct iha_softc *, 150 bus_space_tag_t, bus_space_handle_t)); 151 int iha_xfer_data __P((struct iha_scsi_req_q *, 152 bus_space_tag_t, bus_space_handle_t, 153 int direction)); 154 int iha_status_msg __P((struct iha_softc *, 155 bus_space_tag_t, bus_space_handle_t)); 156 int iha_msgin __P((struct iha_softc *, bus_space_tag_t, bus_space_handle_t)); 157 int iha_msgin_sdtr __P((struct iha_softc *)); 158 int iha_msgin_extended __P((struct iha_softc *, 159 bus_space_tag_t, bus_space_handle_t)); 160 int iha_msgin_ignore_wid_resid __P((struct iha_softc *, 161 bus_space_tag_t, bus_space_handle_t)); 162 int iha_msgout __P((struct iha_softc *, 163 bus_space_tag_t, bus_space_handle_t, u_int8_t)); 164 int iha_msgout_extended __P((struct iha_softc *, 165 bus_space_tag_t, bus_space_handle_t)); 166 void iha_msgout_abort __P((struct iha_softc *, 167 bus_space_tag_t, bus_space_handle_t, u_int8_t)); 168 int iha_msgout_reject __P((struct iha_softc *, 169 bus_space_tag_t, bus_space_handle_t)); 170 int iha_msgout_sdtr __P((struct iha_softc *, 171 bus_space_tag_t, bus_space_handle_t)); 172 int iha_msgout_wdtr __P((struct iha_softc *, 173 bus_space_tag_t, bus_space_handle_t)); 174 void iha_select __P((struct iha_softc *, 175 bus_space_tag_t, bus_space_handle_t, 176 struct iha_scsi_req_q *, u_int8_t)); 177 void iha_busfree __P((struct iha_softc *, 178 bus_space_tag_t, bus_space_handle_t)); 179 int iha_resel __P((struct iha_softc *, bus_space_tag_t, bus_space_handle_t)); 180 void iha_abort_xs __P((struct iha_softc *, struct scsi_xfer *, u_int8_t)); 181 182 /* 183 * iha_intr - the interrupt service routine for the iha driver 184 */ 185 int 186 iha_intr(arg) 187 void *arg; 188 { 189 bus_space_handle_t ioh; 190 struct iha_softc *sc; 191 bus_space_tag_t iot; 192 int s; 193 194 sc = (struct iha_softc *)arg; 195 iot = sc->sc_iot; 196 ioh = sc->sc_ioh; 197 198 if ((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 199 return (0); 200 201 s = splbio(); /* XXX - Or are interrupts off when ISR's are called? */ 202 203 if (sc->HCS_Semaph != SEMAPH_IN_MAIN) { 204 /* XXX - need these inside a splbio()/splx()? */ 205 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 206 sc->HCS_Semaph = SEMAPH_IN_MAIN; 207 208 iha_main(sc, iot, ioh); 209 210 sc->HCS_Semaph = ~SEMAPH_IN_MAIN; 211 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 212 } 213 214 splx(s); 215 216 return (1); 217 } 218 219 /* 220 * iha_scsi_cmd - start execution of a SCSI command. This is called 221 * from the generic SCSI driver via the field 222 * sc_adapter.scsi_cmd of iha_softc. 223 */ 224 int 225 iha_scsi_cmd(xs) 226 struct scsi_xfer *xs; 227 { 228 struct iha_scsi_req_q *pScb; 229 struct iha_sg_element *sg; 230 struct scsi_link *sc_link = xs->sc_link; 231 struct iha_softc *sc = sc_link->adapter_softc; 232 bus_dmamap_t dm; 233 int error, nseg, i; 234 235 if ((xs->cmdlen > 12) || (sc_link->target >= IHA_MAX_TARGETS)) { 236 xs->error = XS_DRIVER_STUFFUP; 237 return (COMPLETE); 238 } 239 240 pScb = iha_pop_free_scb(sc); 241 if (pScb == NULL) { 242 /* XXX - different xs->error/return if 243 * SCSI_POLL/_NOSLEEP? */ 244 xs->error = XS_BUSY; 245 return (TRY_AGAIN_LATER); 246 } 247 248 pScb->SCB_Target = sc_link->target; 249 pScb->SCB_Lun = sc_link->lun; 250 pScb->SCB_Tcs = &sc->HCS_Tcs[pScb->SCB_Target]; 251 pScb->SCB_Flags = xs->flags; 252 pScb->SCB_Ident = MSG_IDENTIFYFLAG | 253 (pScb->SCB_Lun & MSG_IDENTIFY_LUNMASK); 254 255 if ((xs->cmd->opcode != REQUEST_SENSE) 256 && ((pScb->SCB_Flags & SCSI_POLL) == 0)) 257 pScb->SCB_Ident |= MSG_IDENTIFY_DISCFLAG; 258 259 pScb->SCB_Xs = xs; 260 pScb->SCB_CDBLen = xs->cmdlen; 261 bcopy(xs->cmd, &pScb->SCB_CDB, xs->cmdlen); 262 263 pScb->SCB_BufLen = xs->datalen; 264 265 if (pScb->SCB_BufLen > 0) { 266 #ifdef TFS 267 if (xs->flags & SCSI_DATA_UIO) 268 error = bus_dmamap_load_uio(sc->sc_dmat, 269 pScb->SCB_Dmamap, (struct uio *)xs->data, 270 (xs->flags & SCSI_NOSLEEP) ? 271 BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 272 else 273 #endif /* TFS */ 274 error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_Dmamap, 275 xs->data, pScb->SCB_BufLen, NULL, 276 (xs->flags & SCSI_NOSLEEP) ? 277 BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 278 279 if (error) { 280 if (error == EFBIG) 281 printf("%s: buffer needs >%d dma segments\n", 282 sc->sc_dev.dv_xname, IHA_MAX_SG_ENTRIES); 283 else 284 printf("%s: error %d loading dma map\n", 285 sc->sc_dev.dv_xname, error); 286 287 iha_append_free_scb(sc, pScb); 288 289 xs->error = XS_DRIVER_STUFFUP; 290 return (COMPLETE); 291 } 292 293 dm = pScb->SCB_Dmamap; 294 nseg = dm->dm_nsegs; 295 296 if (nseg > 1) { 297 sg = pScb->SCB_SGList; 298 299 for (i=0; i < nseg; i++) { 300 sg[i].SG_Len = dm->dm_segs[i].ds_len; 301 sg[i].SG_Ptr = dm->dm_segs[i].ds_addr; 302 } 303 304 pScb->SCB_Flags |= FLAG_SG; 305 pScb->SCB_SGLen = nseg; 306 307 pScb->SCB_BufPAddr = pScb->SCB_SGPAddr; 308 } else 309 pScb->SCB_BufPAddr = dm->dm_segs[0].ds_addr; 310 311 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_Dmamap, 312 (pScb->SCB_Flags & SCSI_DATA_IN) ? 313 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 314 } 315 316 pScb->SCB_SGMax = pScb->SCB_SGLen; 317 pScb->SCB_Timeout = xs->timeout; 318 319 /* 320 * Always initialize the stimeout structure as it may 321 * contain garbage that confuses timeout_del() later on. 322 * But, timeout_add() ONLY if we are not polling. 323 */ 324 timeout_set(&xs->stimeout, iha_timeout, pScb); 325 if ((xs->flags & SCSI_POLL) == 0) 326 timeout_add(&xs->stimeout, (xs->timeout/1000) * hz); 327 328 iha_exec_scb(sc, pScb); 329 330 if ((xs->flags & ITSDONE) == 0) 331 return (SUCCESSFULLY_QUEUED); 332 else 333 return (COMPLETE); 334 } 335 336 /* 337 * iha_init_tulip - initialize the inic-940/950 card and the rest of the 338 * iha_softc structure supplied 339 */ 340 int 341 iha_init_tulip(sc) 342 struct iha_softc *sc; 343 { 344 struct iha_scsi_req_q *pScb; 345 struct iha_nvram_scsi *pScsi; 346 bus_space_handle_t ioh; 347 struct iha_nvram iha_nvram; 348 bus_space_tag_t iot; 349 int i, error; 350 351 iot = sc->sc_iot; 352 ioh = sc->sc_ioh; 353 354 iha_read_eeprom(iot, ioh, &iha_nvram); 355 356 pScsi = &iha_nvram.NVM_Scsi[0]; 357 358 /* 359 * fill in the prototype scsi_link. 360 */ 361 sc->sc_link.adapter_softc = sc; 362 sc->sc_link.adapter = &iha_switch; 363 sc->sc_link.device = &iha_dev; 364 sc->sc_link.openings = 4; /* # xs's allowed per device */ 365 sc->sc_link.adapter_target = pScsi->NVM_SCSI_Id; 366 sc->sc_link.adapter_buswidth = pScsi->NVM_SCSI_Targets; 367 368 /* 369 * fill in the rest of the iha_softc fields 370 */ 371 sc->HCS_Semaph = ~SEMAPH_IN_MAIN; 372 sc->HCS_JSStatus0 = 0; 373 sc->HCS_ActScb = NULL; 374 375 TAILQ_INIT(&sc->HCS_FreeScb); 376 TAILQ_INIT(&sc->HCS_PendScb); 377 TAILQ_INIT(&sc->HCS_DoneScb); 378 379 error = iha_alloc_scbs(sc); 380 if (error != 0) 381 return (error); 382 383 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) { 384 pScb->SCB_TagId = i; 385 pScb->SCB_SGPAddr = sc->sc_dmamap->dm_segs[0].ds_addr 386 + i*sizeof(struct iha_scsi_req_q) 387 + offsetof(struct iha_scsi_req_q, SCB_SGList); 388 389 pScb->SCB_SenseLen = sizeof(struct scsi_sense_data); 390 pScb->SCB_SensePAddr = sc->sc_dmamap->dm_segs[0].ds_addr 391 + i*sizeof(struct iha_scsi_req_q) 392 + offsetof(struct iha_scsi_req_q, SCB_ScsiSenseData); 393 394 error = bus_dmamap_create(sc->sc_dmat, 395 (IHA_MAX_SG_ENTRIES-1) * PAGE_SIZE, IHA_MAX_SG_ENTRIES, 396 (IHA_MAX_SG_ENTRIES-1) * PAGE_SIZE, 0, 397 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &pScb->SCB_Dmamap); 398 399 if (error != 0) { 400 printf("%s: couldn't create SCB DMA map, error = %d\n", 401 sc->sc_dev.dv_xname, error); 402 return (error); 403 } 404 TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList); 405 } 406 407 /* Mask all the interrupts */ 408 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 409 410 /* Stop any I/O and reset the scsi module */ 411 iha_reset_dma(iot, ioh); 412 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSMOD); 413 414 /* Program HBA's SCSI ID */ 415 bus_space_write_1(iot, ioh, TUL_SID, sc->sc_link.adapter_target << 4); 416 417 /* 418 * Configure the channel as requested by the NVRAM settings read 419 * into iha_nvram by iha_read_eeprom() above. 420 */ 421 422 if ((pScsi->NVM_SCSI_Cfg & CFG_EN_PAR) != 0) 423 sc->HCS_SConf1 = (SCONFIG0DEFAULT | SPCHK); 424 else 425 sc->HCS_SConf1 = (SCONFIG0DEFAULT); 426 bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->HCS_SConf1); 427 428 /* selection time out in units of 1.6385 millisecond = 250 ms */ 429 bus_space_write_1(iot, ioh, TUL_STIMO, 153); 430 431 /* Enable desired SCSI termination configuration read from eeprom */ 432 bus_space_write_1(iot, ioh, TUL_DCTRL0, 433 (pScsi->NVM_SCSI_Cfg & (CFG_ACT_TERM1 | CFG_ACT_TERM2))); 434 435 bus_space_write_1(iot, ioh, TUL_GCTRL1, 436 ((pScsi->NVM_SCSI_Cfg & CFG_AUTO_TERM) >> 4) 437 | (bus_space_read_1(iot, ioh, TUL_GCTRL1) & (~ATDEN))); 438 439 for (i = 0; i < IHA_MAX_TARGETS; i++) { 440 sc->HCS_Tcs[i].TCS_Flags = pScsi->NVM_SCSI_TargetFlags[i]; 441 iha_reset_tcs(&sc->HCS_Tcs[i], sc->HCS_SConf1); 442 } 443 444 iha_reset_chip(sc, iot, ioh); 445 bus_space_write_1(iot, ioh, TUL_SIEN, ALL_INTERRUPTS); 446 447 return (0); 448 } 449 450 /* 451 * iha_minphys - reduce bp->b_bcount to something less than 452 * or equal to the largest I/O possible through 453 * the adapter. Called from higher layers 454 * via sc->sc_adapter.scsi_minphys. 455 */ 456 void 457 iha_minphys(bp) 458 struct buf *bp; 459 { 460 if (bp->b_bcount > ((IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE)) 461 bp->b_bcount = ((IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE); 462 463 minphys(bp); 464 } 465 466 /* 467 * iha_reset_dma - abort any active DMA xfer, reset tulip FIFO. 468 */ 469 void 470 iha_reset_dma(iot, ioh) 471 bus_space_tag_t iot; 472 bus_space_handle_t ioh; 473 { 474 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 475 /* if DMA xfer is pending, abort DMA xfer */ 476 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 477 /* wait Abort DMA xfer done */ 478 while ((bus_space_read_1(iot, ioh, TUL_ISTUS0) & DABT) == 0) 479 ; 480 } 481 482 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 483 } 484 485 /* 486 * iha_pop_free_scb - return the first free SCB, or NULL if there are none. 487 */ 488 struct iha_scsi_req_q * 489 iha_pop_free_scb(sc) 490 struct iha_softc *sc; 491 { 492 struct iha_scsi_req_q *pScb; 493 int s; 494 495 s = splbio(); 496 497 pScb = TAILQ_FIRST(&sc->HCS_FreeScb); 498 499 if (pScb != NULL) { 500 pScb->SCB_Status = STATUS_RENT; 501 TAILQ_REMOVE(&sc->HCS_FreeScb, pScb, SCB_ScbList); 502 } 503 504 splx(s); 505 506 return (pScb); 507 } 508 509 /* 510 * iha_append_free_scb - append the supplied SCB to the tail of the 511 * HCS_FreeScb queue after clearing and resetting 512 * everything possible. 513 */ 514 void 515 iha_append_free_scb(sc, pScb) 516 struct iha_softc *sc; 517 struct iha_scsi_req_q *pScb; 518 { 519 int s; 520 521 s = splbio(); 522 523 if (pScb->SCB_Xs != NULL) 524 timeout_del(&pScb->SCB_Xs->stimeout); 525 526 if (pScb == sc->HCS_ActScb) 527 sc->HCS_ActScb = NULL; 528 529 pScb->SCB_Status = STATUS_QUEUED; 530 pScb->SCB_HaStat = HOST_OK; 531 pScb->SCB_TaStat = SCSI_OK; 532 533 pScb->SCB_NxtStat = 0; 534 pScb->SCB_SGIdx = 0; 535 pScb->SCB_SGMax = 0; 536 pScb->SCB_Flags = 0; 537 pScb->SCB_Target = 0; 538 pScb->SCB_Lun = 0; 539 pScb->SCB_BufLen = 0; 540 pScb->SCB_SGLen = 0; 541 pScb->SCB_CDBLen = 0; 542 pScb->SCB_Ident = 0; 543 pScb->SCB_TagMsg = 0; 544 pScb->SCB_Timeout = 0; 545 pScb->SCB_BufPAddr = 0; 546 547 pScb->SCB_Xs = NULL; 548 pScb->SCB_Tcs = NULL; 549 550 bzero( pScb->SCB_CDB, sizeof(pScb->SCB_CDB)); 551 bzero(&pScb->SCB_ScsiSenseData, sizeof(pScb->SCB_ScsiSenseData)); 552 bzero( pScb->SCB_SGList, sizeof(pScb->SCB_SGList)); 553 554 /* 555 * SCB_TagId, SCB_SGPAddr, SCB_SenseLen, SCB_SGList 556 * SCB_SensePtr are set at initialization 557 * and never change 558 */ 559 560 TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList); 561 562 splx(s); 563 } 564 565 void 566 iha_append_pend_scb(sc, pScb) 567 struct iha_softc *sc; 568 struct iha_scsi_req_q *pScb; 569 { 570 /* ASSUMPTION: only called within a splbio()/splx() pair */ 571 572 if (pScb == sc->HCS_ActScb) 573 sc->HCS_ActScb = NULL; 574 575 pScb->SCB_Status = STATUS_QUEUED; 576 577 TAILQ_INSERT_TAIL(&sc->HCS_PendScb, pScb, SCB_ScbList); 578 } 579 580 void 581 iha_push_pend_scb(sc, pScb) 582 struct iha_softc *sc; 583 struct iha_scsi_req_q *pScb; 584 { 585 int s; 586 587 s = splbio(); 588 589 if (pScb == sc->HCS_ActScb) 590 sc->HCS_ActScb = NULL; 591 592 pScb->SCB_Status = STATUS_QUEUED; 593 594 TAILQ_INSERT_HEAD(&sc->HCS_PendScb, pScb, SCB_ScbList); 595 596 splx(s); 597 } 598 599 /* 600 * iha_find_pend_scb - scan the pending queue for a SCB that can be 601 * processed immediately. Return NULL if none found 602 * and a pointer to the SCB if one is found. If there 603 * is an active SCB, return NULL! 604 */ 605 struct iha_scsi_req_q * 606 iha_find_pend_scb(sc) 607 struct iha_softc *sc; 608 { 609 struct iha_scsi_req_q *pScb; 610 struct tcs *pTcs; 611 int s; 612 613 s = splbio(); 614 615 if (sc->HCS_ActScb != NULL) 616 pScb = NULL; 617 618 else 619 TAILQ_FOREACH(pScb, &sc->HCS_PendScb, SCB_ScbList) { 620 if ((pScb->SCB_Flags & SCSI_RESET) != 0) 621 /* ALWAYS willing to reset a device */ 622 break; 623 624 pTcs = pScb->SCB_Tcs; 625 626 if ((pScb->SCB_TagMsg) != 0) { 627 /* 628 * A Tagged I/O. OK to start If no 629 * non-tagged I/O is active on the same 630 * target 631 */ 632 if (pTcs->TCS_NonTagScb == NULL) 633 break; 634 635 } else if (pScb->SCB_CDB[0] == REQUEST_SENSE) { 636 /* 637 * OK to do a non-tagged request sense 638 * even if a non-tagged I/O has been 639 * started, 'cuz we don't allow any 640 * disconnect during a request sense op 641 */ 642 break; 643 644 } else if (pTcs->TCS_TagCnt == 0) { 645 /* 646 * No tagged I/O active on this target, 647 * ok to start a non-tagged one if one 648 * is not already active 649 */ 650 if (pTcs->TCS_NonTagScb == NULL) 651 break; 652 } 653 } 654 655 splx(s); 656 657 return (pScb); 658 } 659 660 /* 661 * iha_del_pend_scb - remove pScb from HCS_PendScb 662 */ 663 void 664 iha_del_pend_scb(sc, pScb) 665 struct iha_softc *sc; 666 struct iha_scsi_req_q *pScb; 667 { 668 int s; 669 670 s = splbio(); 671 672 TAILQ_REMOVE(&sc->HCS_PendScb, pScb, SCB_ScbList); 673 674 splx(s); 675 } 676 677 void 678 iha_mark_busy_scb(pScb) 679 struct iha_scsi_req_q *pScb; 680 { 681 int s; 682 683 s = splbio(); 684 685 pScb->SCB_Status = STATUS_BUSY; 686 687 if (pScb->SCB_TagMsg == 0) 688 pScb->SCB_Tcs->TCS_NonTagScb = pScb; 689 else 690 pScb->SCB_Tcs->TCS_TagCnt++; 691 692 splx(s); 693 } 694 695 void 696 iha_append_done_scb(sc, pScb, hastat) 697 struct iha_softc *sc; 698 struct iha_scsi_req_q *pScb; 699 u_int8_t hastat; 700 { 701 struct tcs *pTcs; 702 int s; 703 704 s = splbio(); 705 706 if (pScb->SCB_Xs != NULL) 707 timeout_del(&pScb->SCB_Xs->stimeout); 708 709 if (pScb == sc->HCS_ActScb) 710 sc->HCS_ActScb = NULL; 711 712 pTcs = pScb->SCB_Tcs; 713 714 if (pScb->SCB_TagMsg != 0) { 715 if (pTcs->TCS_TagCnt) 716 pTcs->TCS_TagCnt--; 717 } else if (pTcs->TCS_NonTagScb == pScb) 718 pTcs->TCS_NonTagScb = NULL; 719 720 pScb->SCB_Status = STATUS_QUEUED; 721 pScb->SCB_HaStat = hastat; 722 723 TAILQ_INSERT_TAIL(&sc->HCS_DoneScb, pScb, SCB_ScbList); 724 725 splx(s); 726 } 727 728 struct iha_scsi_req_q * 729 iha_pop_done_scb(sc) 730 struct iha_softc *sc; 731 { 732 struct iha_scsi_req_q *pScb; 733 int s; 734 735 s = splbio(); 736 737 pScb = TAILQ_FIRST(&sc->HCS_DoneScb); 738 739 if (pScb != NULL) { 740 pScb->SCB_Status = STATUS_RENT; 741 TAILQ_REMOVE(&sc->HCS_DoneScb, pScb, SCB_ScbList); 742 } 743 744 splx(s); 745 746 return (pScb); 747 } 748 749 /* 750 * iha_abort_xs - find the SCB associated with the supplied xs and 751 * stop all processing on it, moving it to the done 752 * queue with the supplied host status value. 753 */ 754 void 755 iha_abort_xs(sc, xs, hastat) 756 struct iha_softc *sc; 757 struct scsi_xfer *xs; 758 u_int8_t hastat; 759 { 760 struct iha_scsi_req_q *pScb; 761 int i, s; 762 763 s = splbio(); 764 765 /* Check the pending queue for the SCB pointing to xs */ 766 767 TAILQ_FOREACH(pScb, &sc->HCS_PendScb, SCB_ScbList) 768 if (pScb->SCB_Xs == xs) { 769 iha_del_pend_scb(sc, pScb); 770 iha_append_done_scb(sc, pScb, hastat); 771 splx(s); 772 return; 773 } 774 775 /* 776 * If that didn't work, check all BUSY/SELECTING SCB's for one 777 * pointing to xs 778 */ 779 780 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) 781 switch (pScb->SCB_Status) { 782 case STATUS_BUSY: 783 case STATUS_SELECT: 784 if (pScb->SCB_Xs == xs) { 785 iha_append_done_scb(sc, pScb, hastat); 786 splx(s); 787 return; 788 } 789 break; 790 default: 791 break; 792 } 793 794 splx(s); 795 } 796 797 /* 798 * iha_bad_seq - a SCSI bus phase was encountered out of the 799 * correct/expected sequence. Reset the SCSI bus. 800 */ 801 void 802 iha_bad_seq(sc) 803 struct iha_softc *sc; 804 { 805 struct iha_scsi_req_q *pScb = sc->HCS_ActScb; 806 807 if (pScb != NULL) 808 iha_append_done_scb(sc, pScb, HOST_BAD_PHAS); 809 810 iha_reset_scsi_bus(sc); 811 iha_reset_chip(sc, sc->sc_iot, sc->sc_ioh); 812 } 813 814 /* 815 * iha_push_sense_request - obtain auto sense data by pushing the 816 * SCB needing it back onto the pending 817 * queue with a REQUEST_SENSE CDB. 818 */ 819 void 820 iha_push_sense_request(sc, pScb) 821 struct iha_softc *sc; 822 struct iha_scsi_req_q *pScb; 823 { 824 pScb->SCB_BufLen = pScb->SCB_SenseLen; 825 pScb->SCB_BufPAddr = pScb->SCB_SensePAddr; 826 827 pScb->SCB_Flags &= ~(FLAG_SG | FLAG_DIR); 828 pScb->SCB_Flags |= FLAG_RSENS | SCSI_DATA_IN; 829 830 pScb->SCB_Ident &= ~MSG_IDENTIFY_DISCFLAG; 831 832 pScb->SCB_TagMsg = 0; 833 pScb->SCB_TaStat = SCSI_OK; 834 835 bzero(pScb->SCB_CDB, sizeof(pScb->SCB_CDB)); 836 837 pScb->SCB_CDBLen = 6; 838 pScb->SCB_CDB[0] = REQUEST_SENSE; 839 pScb->SCB_CDB[4] = pScb->SCB_SenseLen; 840 841 if ((pScb->SCB_Flags & SCSI_POLL) == 0) 842 timeout_add(&pScb->SCB_Xs->stimeout, 843 (pScb->SCB_Timeout/1000) * hz); 844 845 iha_push_pend_scb(sc, pScb); 846 } 847 848 /* 849 * iha_main - process the active SCB, taking one off pending and making it 850 * active if necessary, and any done SCB's created as 851 * a result until there are no interrupts pending and no pending 852 * SCB's that can be started. 853 */ 854 void 855 iha_main(sc, iot, ioh) 856 struct iha_softc *sc; 857 bus_space_tag_t iot; 858 bus_space_handle_t ioh; 859 { 860 struct iha_scsi_req_q *pScb; 861 862 for (;;) { 863 iha_scsi_label: 864 iha_scsi(sc, iot, ioh); 865 866 while ((pScb = iha_pop_done_scb(sc)) != NULL) { 867 868 switch (pScb->SCB_TaStat) { 869 case SCSI_CMD_TERMINATED: 870 case SCSI_ACA_ACTIVE: 871 case SCSI_CHECK: 872 pScb->SCB_Tcs->TCS_Flags &= 873 ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 874 875 if ((pScb->SCB_Flags & FLAG_RSENS) != 0) 876 /* Check condition on check condition*/ 877 pScb->SCB_HaStat = HOST_BAD_PHAS; 878 879 else { 880 iha_push_sense_request(sc, pScb); 881 goto iha_scsi_label; 882 } 883 break; 884 885 default: 886 if ((pScb->SCB_Flags & FLAG_RSENS) != 0) 887 /* 888 * Return the original SCSI_CHECK, not 889 * the status of the request sense 890 * command! 891 */ 892 pScb->SCB_TaStat = SCSI_CHECK; 893 break; 894 } 895 896 iha_done_scb(sc, pScb); 897 } 898 899 /* 900 * If there are no interrupts pending, or we can't start 901 * a pending sc, break out of the for(;;). Otherwise 902 * continue the good work with another call to 903 * iha_scsi(). 904 */ 905 if (((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 906 && (iha_find_pend_scb(sc) == NULL)) 907 break; 908 } 909 } 910 911 /* 912 * iha_scsi - service any outstanding interrupts. If there are none, try to 913 * start another SCB currently in the pending queue. 914 */ 915 void 916 iha_scsi(sc, iot, ioh) 917 struct iha_softc *sc; 918 bus_space_tag_t iot; 919 bus_space_handle_t ioh; 920 { 921 struct iha_scsi_req_q *pScb; 922 struct tcs *pTcs; 923 u_int8_t stat; 924 925 /* service pending interrupts asap */ 926 927 stat = bus_space_read_1(iot, ioh, TUL_STAT0); 928 if ((stat & INTPD) != 0) { 929 sc->HCS_JSStatus0 = stat; 930 sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1); 931 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT); 932 933 sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK; 934 935 if ((sc->HCS_JSInt & SRSTD) != 0) { 936 iha_reset_scsi_bus(sc); 937 return; 938 } 939 940 if ((sc->HCS_JSInt & RSELED) != 0) { 941 iha_resel(sc, iot, ioh); 942 return; 943 } 944 945 if ((sc->HCS_JSInt & (STIMEO | DISCD)) != 0) { 946 iha_busfree(sc, iot, ioh); 947 return; 948 } 949 950 if ((sc->HCS_JSInt & (SCMDN | SBSRV)) != 0) { 951 iha_next_state(sc, iot, ioh); 952 return; 953 } 954 955 if ((sc->HCS_JSInt & SELED) != 0) 956 iha_set_ssig(iot, ioh, 0, 0); 957 } 958 959 /* 960 * There were no interrupts pending which required action elsewhere, so 961 * see if it is possible to start the selection phase on a pending SCB 962 */ 963 if ((pScb = iha_find_pend_scb(sc)) == NULL) 964 return; 965 966 pTcs = pScb->SCB_Tcs; 967 968 /* program HBA's SCSI ID & target SCSI ID */ 969 bus_space_write_1(iot, ioh, TUL_SID, 970 (sc->sc_link.adapter_target << 4) | pScb->SCB_Target); 971 972 if ((pScb->SCB_Flags & SCSI_RESET) == 0) { 973 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 974 975 if (((pTcs->TCS_Flags & FLAG_NO_NEG_WIDE) == 0) 976 || 977 ((pTcs->TCS_Flags & FLAG_NO_NEG_SYNC) == 0)) 978 iha_select(sc, iot, ioh, pScb, SELATNSTOP); 979 980 else if (pScb->SCB_TagMsg != 0) 981 iha_select(sc, iot, ioh, pScb, SEL_ATN3); 982 983 else 984 iha_select(sc, iot, ioh, pScb, SEL_ATN); 985 986 } else { 987 iha_select(sc, iot, ioh, pScb, SELATNSTOP); 988 pScb->SCB_NxtStat = 8; 989 } 990 991 if ((pScb->SCB_Flags & SCSI_POLL) != 0) { 992 for (; pScb->SCB_Timeout > 0; pScb->SCB_Timeout--) { 993 if (iha_wait(sc, iot, ioh, NO_OP) == -1) 994 break; 995 if (iha_next_state(sc, iot, ioh) == -1) 996 break; 997 delay(1000); /* Only happens in boot, so it's ok */ 998 } 999 1000 /* 1001 * Since done queue processing not done until AFTER this 1002 * function returns, pScb is on the done queue, not 1003 * the free queue at this point and still has valid data 1004 * 1005 * Conversely, xs->error has not been set yet 1006 */ 1007 if (pScb->SCB_Timeout == 0) 1008 iha_timeout(pScb); 1009 1010 else if ((pScb->SCB_CDB[0] == INQUIRY) 1011 && (pScb->SCB_Lun == 0) 1012 && (pScb->SCB_HaStat == HOST_OK) 1013 && (pScb->SCB_TaStat == SCSI_OK)) 1014 iha_print_info(sc, pScb->SCB_Target); 1015 } 1016 } 1017 1018 /* 1019 * iha_data_over_run - return HOST_OK for all SCSI opcodes where BufLen 1020 * is an 'Allocation Length'. All other SCSI opcodes 1021 * get HOST_DO_DU as they SHOULD have xferred all the 1022 * data requested. 1023 * 1024 * The list of opcodes using 'Allocation Length' was 1025 * found by scanning all the SCSI-3 T10 drafts. See 1026 * www.t10.org for the curious with a .pdf reader. 1027 */ 1028 u_int8_t 1029 iha_data_over_run(pScb) 1030 struct iha_scsi_req_q *pScb; 1031 { 1032 switch (pScb->SCB_CDB[0]) { 1033 case 0x03: /* Request Sense SPC-2 */ 1034 case 0x12: /* Inquiry SPC-2 */ 1035 case 0x1a: /* Mode Sense (6 byte version) SPC-2 */ 1036 case 0x1c: /* Receive Diagnostic Results SPC-2 */ 1037 case 0x23: /* Read Format Capacities MMC-2 */ 1038 case 0x29: /* Read Generation SBC */ 1039 case 0x34: /* Read Position SSC-2 */ 1040 case 0x37: /* Read Defect Data SBC */ 1041 case 0x3c: /* Read Buffer SPC-2 */ 1042 case 0x42: /* Read Sub Channel MMC-2 */ 1043 case 0x43: /* Read TOC/PMA/ATIP MMC */ 1044 1045 /* XXX - 2 with same opcode of 0x44? */ 1046 case 0x44: /* Read Header/Read Density Suprt MMC/SSC*/ 1047 1048 case 0x46: /* Get Configuration MMC-2 */ 1049 case 0x4a: /* Get Event/Status Notification MMC-2 */ 1050 case 0x4d: /* Log Sense SPC-2 */ 1051 case 0x51: /* Read Disc Information MMC */ 1052 case 0x52: /* Read Track Information MMC */ 1053 case 0x59: /* Read Master CUE MMC */ 1054 case 0x5a: /* Mode Sense (10 byte version) SPC-2 */ 1055 case 0x5c: /* Read Buffer Capacity MMC */ 1056 case 0x5e: /* Persistant Reserve In SPC-2 */ 1057 case 0x84: /* Receive Copy Results SPC-2 */ 1058 case 0xa0: /* Report LUNs SPC-2 */ 1059 case 0xa3: /* Various Report requests SBC-2/SCC-2*/ 1060 case 0xa4: /* Report Key MMC-2 */ 1061 case 0xad: /* Read DVD Structure MMC-2 */ 1062 case 0xb4: /* Read Element Status (Attached) SMC */ 1063 case 0xb5: /* Request Volume Element Address SMC */ 1064 case 0xb7: /* Read Defect Data (12 byte ver.) SBC */ 1065 case 0xb8: /* Read Element Status (Independ.) SMC */ 1066 case 0xba: /* Report Redundancy SCC-2 */ 1067 case 0xbd: /* Mechanism Status MMC */ 1068 case 0xbe: /* Report Basic Redundancy SCC-2 */ 1069 1070 return (HOST_OK); 1071 break; 1072 1073 default: 1074 return (HOST_DO_DU); 1075 break; 1076 } 1077 } 1078 1079 /* 1080 * iha_next_state - prcess the current SCB as requested in it's 1081 * SCB_NxtStat member. 1082 */ 1083 int 1084 iha_next_state(sc, iot, ioh) 1085 struct iha_softc *sc; 1086 bus_space_tag_t iot; 1087 bus_space_handle_t ioh; 1088 { 1089 if (sc->HCS_ActScb == NULL) 1090 return (-1); 1091 1092 switch (sc->HCS_ActScb->SCB_NxtStat) { 1093 case 1: 1094 if (iha_state_1(sc, iot, ioh) == 3) 1095 goto state_3; 1096 break; 1097 1098 case 2: 1099 switch (iha_state_2(sc, iot, ioh)) { 1100 case 3: goto state_3; 1101 case 4: goto state_4; 1102 default: break; 1103 } 1104 break; 1105 1106 case 3: 1107 state_3: 1108 if (iha_state_3(sc, iot, ioh) == 4) 1109 goto state_4; 1110 break; 1111 1112 case 4: 1113 state_4: 1114 switch (iha_state_4(sc, iot, ioh)) { 1115 case 0: return (0); 1116 case 6: goto state_6; 1117 default: break; 1118 } 1119 break; 1120 1121 case 5: 1122 switch (iha_state_5(sc, iot, ioh)) { 1123 case 4: goto state_4; 1124 case 6: goto state_6; 1125 default: break; 1126 } 1127 break; 1128 1129 case 6: 1130 state_6: 1131 iha_state_6(sc, iot, ioh); 1132 break; 1133 1134 case 8: 1135 iha_state_8(sc, iot, ioh); 1136 break; 1137 1138 default: 1139 #ifdef IHA_DEBUG_STATE 1140 printf("[debug] -unknown state: %i-\n", 1141 sc->HCS_ActScb->SCB_NxtStat); 1142 #endif 1143 iha_bad_seq(sc); 1144 break; 1145 } 1146 1147 return (-1); 1148 } 1149 1150 /* 1151 * iha_state_1 - selection is complete after a SELATNSTOP. If the target 1152 * has put the bus into MSG_OUT phase start wide/sync 1153 * negotiation. Otherwise clear the FIFO and go to state 3, 1154 * which will send the SCSI CDB to the target. 1155 */ 1156 int 1157 iha_state_1(sc, iot, ioh) 1158 struct iha_softc *sc; 1159 bus_space_tag_t iot; 1160 bus_space_handle_t ioh; 1161 { 1162 struct iha_scsi_req_q *pScb = sc->HCS_ActScb; 1163 struct tcs *pTcs; 1164 u_int16_t flags; 1165 1166 iha_mark_busy_scb(pScb); 1167 1168 pTcs = pScb->SCB_Tcs; 1169 1170 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 1171 1172 /* 1173 * If we are in PHASE_MSG_OUT, send 1174 * a) IDENT message (with tags if appropriate) 1175 * b) WDTR if the target is configured to negotiate wide xfers 1176 * ** OR ** 1177 * c) SDTR if the target is configured to negotiate sync xfers 1178 * but not wide ones 1179 * 1180 * If we are NOT, then the target is not asking for anything but 1181 * the data/command, so go straight to state 3. 1182 */ 1183 if (sc->HCS_Phase == PHASE_MSG_OUT) { 1184 bus_space_write_1(iot, ioh, TUL_SCTRL1, (ESBUSIN | EHRSL)); 1185 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident); 1186 1187 if (pScb->SCB_TagMsg != 0) { 1188 bus_space_write_1(iot, ioh, TUL_SFIFO, 1189 pScb->SCB_TagMsg); 1190 bus_space_write_1(iot, ioh, TUL_SFIFO, 1191 pScb->SCB_TagId); 1192 } 1193 1194 flags = pTcs->TCS_Flags; 1195 if ((flags & FLAG_NO_NEG_WIDE) == 0) { 1196 if (iha_msgout_wdtr(sc, iot, ioh) == -1) 1197 return (-1); 1198 } else if ((flags & FLAG_NO_NEG_SYNC) == 0) { 1199 if (iha_msgout_sdtr(sc, iot, ioh) == -1) 1200 return (-1); 1201 } 1202 1203 } else { 1204 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1205 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 1206 } 1207 1208 return (3); 1209 } 1210 1211 /* 1212 * iha_state_2 - selection is complete after a SEL_ATN or SEL_ATN3. If the SCSI 1213 * CDB has already been send, go to state 4 to start the data 1214 * xfer. Otherwise reset the FIFO and go to state 3, sending 1215 * the SCSI CDB. 1216 */ 1217 int 1218 iha_state_2(sc, iot, ioh) 1219 struct iha_softc *sc; 1220 bus_space_tag_t iot; 1221 bus_space_handle_t ioh; 1222 { 1223 struct iha_scsi_req_q *pScb = sc->HCS_ActScb; 1224 1225 iha_mark_busy_scb(pScb); 1226 1227 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pScb->SCB_Tcs->TCS_SConfig0); 1228 1229 if ((sc->HCS_JSStatus1 & CPDNE) != 0) 1230 return (4); 1231 1232 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1233 1234 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 1235 1236 return (3); 1237 } 1238 1239 /* 1240 * iha_state_3 - send the SCSI CDB to the target, processing any status 1241 * or other messages received until that is done or 1242 * abandoned. 1243 */ 1244 int 1245 iha_state_3(sc, iot, ioh) 1246 struct iha_softc *sc; 1247 bus_space_tag_t iot; 1248 bus_space_handle_t ioh; 1249 { 1250 struct iha_scsi_req_q *pScb = sc->HCS_ActScb; 1251 u_int16_t flags; 1252 1253 for (;;) 1254 switch (sc->HCS_Phase) { 1255 case PHASE_CMD_OUT: 1256 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 1257 pScb->SCB_CDB, pScb->SCB_CDBLen); 1258 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1) 1259 return (-1); 1260 else if (sc->HCS_Phase == PHASE_CMD_OUT) { 1261 iha_bad_seq(sc); 1262 return (-1); 1263 } else 1264 return (4); 1265 1266 case PHASE_MSG_IN: 1267 pScb->SCB_NxtStat = 3; 1268 if (iha_msgin(sc, iot, ioh) == -1) 1269 return (-1); 1270 break; 1271 1272 case PHASE_STATUS_IN: 1273 if (iha_status_msg(sc, iot, ioh) == -1) 1274 return (-1); 1275 break; 1276 1277 case PHASE_MSG_OUT: 1278 flags = pScb->SCB_Tcs->TCS_Flags; 1279 if ((flags & FLAG_NO_NEG_SYNC) != 0) { 1280 if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1) 1281 return (-1); 1282 } else if (iha_msgout_sdtr(sc, iot, ioh) == -1) 1283 return (-1); 1284 break; 1285 1286 default: 1287 printf("[debug] -s3- bad phase = %d\n", sc->HCS_Phase); 1288 iha_bad_seq(sc); 1289 return (-1); 1290 } 1291 } 1292 1293 /* 1294 * iha_state_4 - start a data xfer. Handle any bus state 1295 * transitions until PHASE_DATA_IN/_OUT 1296 * or the attempt is abandoned. If there is 1297 * no data to xfer, go to state 6 and finish 1298 * processing the current SCB. 1299 */ 1300 int 1301 iha_state_4(sc, iot, ioh) 1302 struct iha_softc *sc; 1303 bus_space_tag_t iot; 1304 bus_space_handle_t ioh; 1305 { 1306 struct iha_scsi_req_q *pScb = sc->HCS_ActScb; 1307 1308 if ((pScb->SCB_Flags & FLAG_DIR) == FLAG_DIR) 1309 return (6); /* Both dir flags set => NO xfer was requested */ 1310 1311 for (;;) { 1312 if (pScb->SCB_BufLen == 0) 1313 return (6); 1314 1315 switch (sc->HCS_Phase) { 1316 case PHASE_STATUS_IN: 1317 if ((pScb->SCB_Flags & FLAG_DIR) != 0) 1318 pScb->SCB_HaStat = iha_data_over_run(pScb); 1319 if ((iha_status_msg(sc, iot, ioh)) == -1) 1320 return (-1); 1321 break; 1322 1323 case PHASE_MSG_IN: 1324 pScb->SCB_NxtStat = 4; 1325 if (iha_msgin(sc, iot, ioh) == -1) 1326 return (-1); 1327 break; 1328 1329 case PHASE_MSG_OUT: 1330 if ((sc->HCS_JSStatus0 & SPERR) != 0) { 1331 pScb->SCB_BufLen = 0; 1332 pScb->SCB_HaStat = HOST_SPERR; 1333 if (iha_msgout(sc, iot, ioh, 1334 MSG_INITIATOR_DET_ERR) == -1) 1335 return (-1); 1336 else 1337 return (6); 1338 } else { 1339 if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1) 1340 return (-1); 1341 } 1342 break; 1343 1344 case PHASE_DATA_IN: 1345 return (iha_xfer_data(pScb, iot, ioh, SCSI_DATA_IN)); 1346 1347 case PHASE_DATA_OUT: 1348 return (iha_xfer_data(pScb, iot, ioh, SCSI_DATA_OUT)); 1349 1350 default: 1351 iha_bad_seq(sc); 1352 return (-1); 1353 } 1354 } 1355 } 1356 1357 /* 1358 * iha_state_5 - handle the partial or final completion of the current 1359 * data xfer. If DMA is still active stop it. If there is 1360 * more data to xfer, go to state 4 and start the xfer. 1361 * If not go to state 6 and finish the SCB. 1362 */ 1363 int 1364 iha_state_5(sc, iot, ioh) 1365 struct iha_softc *sc; 1366 bus_space_tag_t iot; 1367 bus_space_handle_t ioh; 1368 { 1369 struct iha_scsi_req_q *pScb = sc->HCS_ActScb; 1370 struct iha_sg_element *pSg; 1371 u_int32_t cnt; 1372 u_int16_t period; 1373 u_int8_t stat; 1374 long xcnt; /* cannot use unsigned!! see code: if (xcnt < 0) */ 1375 int i; 1376 1377 cnt = bus_space_read_4(iot, ioh, TUL_STCNT0) & TCNT; 1378 1379 /* 1380 * Stop any pending DMA activity and check for parity error. 1381 */ 1382 1383 if ((bus_space_read_1(iot, ioh, TUL_DCMD) & XDIR) != 0) { 1384 /* Input Operation */ 1385 if ((sc->HCS_JSStatus0 & SPERR) != 0) 1386 pScb->SCB_HaStat = HOST_SPERR; 1387 1388 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1389 bus_space_write_1(iot, ioh, TUL_DCTRL0, 1390 bus_space_read_1(iot, ioh, TUL_DCTRL0) | SXSTP); 1391 while (bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) 1392 ; 1393 } 1394 1395 } else { 1396 /* Output Operation */ 1397 if ((sc->HCS_JSStatus1 & SXCMP) == 0) { 1398 period = pScb->SCB_Tcs->TCS_JS_Period; 1399 if ((period & PERIOD_WIDE_SCSI) != 0) 1400 cnt += (bus_space_read_1(iot, ioh, 1401 TUL_SFIFOCNT) & FIFOC) << 1; 1402 else 1403 cnt += (bus_space_read_1(iot, ioh, 1404 TUL_SFIFOCNT) & FIFOC); 1405 } 1406 1407 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1408 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 1409 do 1410 stat = bus_space_read_1(iot, ioh, TUL_ISTUS0); 1411 while ((stat & DABT) == 0); 1412 } 1413 1414 if ((cnt == 1) && (sc->HCS_Phase == PHASE_DATA_OUT)) { 1415 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1) 1416 return (-1); 1417 cnt = 0; 1418 1419 } else if ((sc->HCS_JSStatus1 & SXCMP) == 0) 1420 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1421 } 1422 1423 if (cnt == 0) { 1424 pScb->SCB_BufLen = 0; 1425 return (6); 1426 } 1427 1428 /* Update active data pointer and restart the I/O at the new point */ 1429 1430 xcnt = pScb->SCB_BufLen - cnt; /* xcnt == bytes xferred */ 1431 pScb->SCB_BufLen = cnt; /* cnt == bytes left */ 1432 1433 if ((pScb->SCB_Flags & FLAG_SG) != 0) { 1434 pSg = &pScb->SCB_SGList[pScb->SCB_SGIdx]; 1435 for (i = pScb->SCB_SGIdx; i < pScb->SCB_SGMax; pSg++, i++) { 1436 xcnt -= pSg->SG_Len; 1437 if (xcnt < 0) { 1438 xcnt += pSg->SG_Len; 1439 1440 pSg->SG_Ptr += xcnt; 1441 pSg->SG_Len -= xcnt; 1442 1443 pScb->SCB_BufPAddr += (i - pScb->SCB_SGIdx) 1444 * sizeof(struct iha_sg_element); 1445 pScb->SCB_SGLen = pScb->SCB_SGMax - i; 1446 pScb->SCB_SGIdx = i; 1447 1448 return (4); 1449 } 1450 } 1451 return (6); 1452 1453 } else 1454 pScb->SCB_BufPAddr += xcnt; 1455 1456 return (4); 1457 } 1458 1459 /* 1460 * iha_state_6 - finish off the active scb (may require several 1461 * iterations if PHASE_MSG_IN) and return -1 to indicate 1462 * the bus is free. 1463 */ 1464 int 1465 iha_state_6(sc, iot, ioh) 1466 struct iha_softc *sc; 1467 bus_space_tag_t iot; 1468 bus_space_handle_t ioh; 1469 { 1470 for (;;) 1471 switch (sc->HCS_Phase) { 1472 case PHASE_STATUS_IN: 1473 if (iha_status_msg(sc, iot, ioh) == -1) 1474 return (-1); 1475 break; 1476 1477 case PHASE_MSG_IN: 1478 sc->HCS_ActScb->SCB_NxtStat = 6; 1479 if ((iha_msgin(sc, iot, ioh)) == -1) 1480 return (-1); 1481 break; 1482 1483 case PHASE_MSG_OUT: 1484 if ((iha_msgout(sc, iot, ioh, MSG_NOOP)) == -1) 1485 return (-1); 1486 break; 1487 1488 case PHASE_DATA_IN: 1489 if (iha_xpad_in(sc, iot, ioh) == -1) 1490 return (-1); 1491 break; 1492 1493 case PHASE_DATA_OUT: 1494 if (iha_xpad_out(sc, iot, ioh) == -1) 1495 return (-1); 1496 break; 1497 1498 default: 1499 iha_bad_seq(sc); 1500 return (-1); 1501 } 1502 } 1503 1504 /* 1505 * iha_state_8 - reset the active device and all busy SCBs using it 1506 */ 1507 int 1508 iha_state_8(sc, iot, ioh) 1509 struct iha_softc *sc; 1510 bus_space_tag_t iot; 1511 bus_space_handle_t ioh; 1512 { 1513 struct iha_scsi_req_q *pScb; 1514 u_int32_t i; 1515 u_int8_t tar; 1516 1517 if (sc->HCS_Phase == PHASE_MSG_OUT) { 1518 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_BUS_DEV_RESET); 1519 1520 pScb = sc->HCS_ActScb; 1521 1522 /* This SCB finished correctly -- resetting the device */ 1523 iha_append_done_scb(sc, pScb, HOST_OK); 1524 1525 iha_reset_tcs(pScb->SCB_Tcs, sc->HCS_SConf1); 1526 1527 tar = pScb->SCB_Target; 1528 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) 1529 if (pScb->SCB_Target == tar) 1530 switch (pScb->SCB_Status) { 1531 case STATUS_BUSY: 1532 iha_append_done_scb(sc, 1533 pScb, HOST_DEV_RST); 1534 break; 1535 1536 case STATUS_SELECT: 1537 iha_push_pend_scb(sc, pScb); 1538 break; 1539 1540 default: 1541 break; 1542 } 1543 1544 sc->HCS_Flags |= FLAG_EXPECT_DISC; 1545 1546 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1) 1547 return (-1); 1548 } 1549 1550 iha_bad_seq(sc); 1551 return (-1); 1552 } 1553 1554 /* 1555 * iha_xfer_data - initiate the DMA xfer of the data 1556 */ 1557 int 1558 iha_xfer_data(pScb, iot, ioh, direction) 1559 struct iha_scsi_req_q *pScb; 1560 bus_space_tag_t iot; 1561 bus_space_handle_t ioh; 1562 int direction; 1563 { 1564 u_int32_t xferlen; 1565 u_int8_t xfertype; 1566 1567 if ((pScb->SCB_Flags & FLAG_DIR) != direction) 1568 return (6); /* wrong direction, abandon I/O */ 1569 1570 bus_space_write_4(iot, ioh, TUL_STCNT0, pScb->SCB_BufLen); 1571 1572 if ((pScb->SCB_Flags & FLAG_SG) == 0) { 1573 xferlen = pScb->SCB_BufLen; 1574 xfertype = (direction == SCSI_DATA_IN) ? ST_X_IN : ST_X_OUT; 1575 1576 } else { 1577 xferlen = pScb->SCB_SGLen * sizeof(struct iha_sg_element); 1578 xfertype = (direction == SCSI_DATA_IN) ? ST_SG_IN : ST_SG_OUT; 1579 } 1580 1581 bus_space_write_4(iot, ioh, TUL_DXC, xferlen); 1582 bus_space_write_4(iot, ioh, TUL_DXPA, pScb->SCB_BufPAddr); 1583 bus_space_write_1(iot, ioh, TUL_DCMD, xfertype); 1584 1585 bus_space_write_1(iot, ioh, TUL_SCMD, 1586 (direction == SCSI_DATA_IN) ? XF_DMA_IN : XF_DMA_OUT); 1587 1588 pScb->SCB_NxtStat = 5; 1589 1590 return (0); 1591 } 1592 1593 int 1594 iha_xpad_in(sc, iot, ioh) 1595 struct iha_softc *sc; 1596 bus_space_tag_t iot; 1597 bus_space_handle_t ioh; 1598 { 1599 struct iha_scsi_req_q *pScb = sc->HCS_ActScb; 1600 1601 if ((pScb->SCB_Flags & FLAG_DIR) != 0) 1602 pScb->SCB_HaStat = HOST_DO_DU; 1603 1604 for (;;) { 1605 if ((pScb->SCB_Tcs->TCS_JS_Period & PERIOD_WIDE_SCSI) != 0) 1606 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1607 else 1608 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1609 1610 switch (iha_wait(sc, iot, ioh, XF_FIFO_IN)) { 1611 case -1: 1612 return (-1); 1613 1614 case PHASE_DATA_IN: 1615 bus_space_read_1(iot, ioh, TUL_SFIFO); 1616 break; 1617 1618 default: 1619 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1620 return (6); 1621 } 1622 } 1623 } 1624 1625 int 1626 iha_xpad_out(sc, iot, ioh) 1627 struct iha_softc *sc; 1628 bus_space_tag_t iot; 1629 bus_space_handle_t ioh; 1630 { 1631 struct iha_scsi_req_q *pScb = sc->HCS_ActScb; 1632 1633 if ((pScb->SCB_Flags & FLAG_DIR) != 0) 1634 pScb->SCB_HaStat = HOST_DO_DU; 1635 1636 for (;;) { 1637 if ((pScb->SCB_Tcs->TCS_JS_Period & PERIOD_WIDE_SCSI) != 0) 1638 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1639 else 1640 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1641 1642 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1643 1644 switch (iha_wait(sc, iot, ioh, XF_FIFO_OUT)) { 1645 case -1: 1646 return (-1); 1647 1648 case PHASE_DATA_OUT: 1649 break; 1650 1651 default: 1652 /* Disable wide CPU to allow read 16 bits */ 1653 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1654 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1655 return (6); 1656 } 1657 } 1658 } 1659 1660 int 1661 iha_status_msg(sc, iot, ioh) 1662 struct iha_softc *sc; 1663 bus_space_tag_t iot; 1664 bus_space_handle_t ioh; 1665 { 1666 struct iha_scsi_req_q *pScb; 1667 u_int8_t msg; 1668 int phase; 1669 1670 if ((phase = iha_wait(sc, iot, ioh, CMD_COMP)) == -1) 1671 return (-1); 1672 1673 pScb = sc->HCS_ActScb; 1674 1675 pScb->SCB_TaStat = bus_space_read_1(iot, ioh, TUL_SFIFO); 1676 1677 if (phase == PHASE_MSG_OUT) { 1678 if ((sc->HCS_JSStatus0 & SPERR) == 0) 1679 bus_space_write_1(iot, ioh, TUL_SFIFO, 1680 MSG_NOOP); 1681 else 1682 bus_space_write_1(iot, ioh, TUL_SFIFO, 1683 MSG_PARITY_ERROR); 1684 1685 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT)); 1686 1687 } else if (phase == PHASE_MSG_IN) { 1688 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1689 1690 if ((sc->HCS_JSStatus0 & SPERR) != 0) 1691 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 1692 case -1: 1693 return (-1); 1694 case PHASE_MSG_OUT: 1695 bus_space_write_1(iot, ioh, TUL_SFIFO, 1696 MSG_PARITY_ERROR); 1697 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT)); 1698 default: 1699 iha_bad_seq(sc); 1700 return (-1); 1701 } 1702 1703 if (msg == MSG_CMDCOMPLETE) { 1704 if ((pScb->SCB_TaStat 1705 & (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) { 1706 iha_bad_seq(sc); 1707 return (-1); 1708 } 1709 sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC; 1710 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1711 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 1712 } 1713 1714 if ((msg == MSG_LINK_CMD_COMPLETE) 1715 || (msg == MSG_LINK_CMD_COMPLETEF)) { 1716 if ((pScb->SCB_TaStat 1717 & (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) 1718 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 1719 } 1720 } 1721 1722 iha_bad_seq(sc); 1723 return (-1); 1724 } 1725 1726 /* 1727 * iha_busfree - SCSI bus free detected as a result of a TIMEOUT or 1728 * DISCONNECT interrupt. Reset the tulip FIFO and 1729 * SCONFIG0 and enable hardware reselect. Move any active 1730 * SCB to HCS_DoneScb list. Return an appropriate host status 1731 * if an I/O was active. 1732 */ 1733 void 1734 iha_busfree(sc, iot, ioh) 1735 struct iha_softc *sc; 1736 bus_space_tag_t iot; 1737 bus_space_handle_t ioh; 1738 { 1739 struct iha_scsi_req_q *pScb; 1740 1741 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1742 bus_space_write_1(iot, ioh, TUL_SCONFIG0, SCONFIG0DEFAULT); 1743 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1744 1745 pScb = sc->HCS_ActScb; 1746 1747 if (pScb != NULL) { 1748 if (pScb->SCB_Status == STATUS_SELECT) 1749 /* selection timeout */ 1750 iha_append_done_scb(sc, pScb, HOST_SEL_TOUT); 1751 else 1752 /* Unexpected bus free */ 1753 iha_append_done_scb(sc, pScb, HOST_BAD_PHAS); 1754 1755 } 1756 } 1757 1758 void 1759 iha_reset_scsi_bus(sc) 1760 struct iha_softc *sc; 1761 { 1762 struct iha_scsi_req_q *pScb; 1763 struct tcs *pTcs; 1764 int i, s; 1765 1766 s = splbio(); 1767 1768 iha_reset_dma(sc->sc_iot, sc->sc_ioh); 1769 1770 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) 1771 switch (pScb->SCB_Status) { 1772 case STATUS_BUSY: 1773 iha_append_done_scb(sc, pScb, HOST_SCSI_RST); 1774 break; 1775 1776 case STATUS_SELECT: 1777 iha_push_pend_scb(sc, pScb); 1778 break; 1779 1780 default: 1781 break; 1782 } 1783 1784 for (i = 0, pTcs = sc->HCS_Tcs; i < IHA_MAX_TARGETS; i++, pTcs++) 1785 iha_reset_tcs(pTcs, sc->HCS_SConf1); 1786 1787 splx(s); 1788 } 1789 1790 /* 1791 * iha_resel - handle a detected SCSI bus reselection request. 1792 */ 1793 int 1794 iha_resel(sc, iot, ioh) 1795 struct iha_softc *sc; 1796 bus_space_tag_t iot; 1797 bus_space_handle_t ioh; 1798 { 1799 struct iha_scsi_req_q *pScb; 1800 struct tcs *pTcs; 1801 u_int8_t tag, target, lun, msg, abortmsg; 1802 1803 if (sc->HCS_ActScb != NULL) { 1804 if ((sc->HCS_ActScb->SCB_Status == STATUS_SELECT)) 1805 iha_push_pend_scb(sc, sc->HCS_ActScb); 1806 sc->HCS_ActScb = NULL; 1807 } 1808 1809 target = bus_space_read_1(iot, ioh, TUL_SBID); 1810 lun = bus_space_read_1(iot, ioh, TUL_SALVC) & MSG_IDENTIFY_LUNMASK; 1811 1812 pTcs = &sc->HCS_Tcs[target]; 1813 1814 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 1815 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 1816 1817 abortmsg = MSG_ABORT; /* until a valid tag has been obtained */ 1818 1819 if (pTcs->TCS_NonTagScb != NULL) 1820 /* There is a non-tagged I/O active on the target */ 1821 pScb = pTcs->TCS_NonTagScb; 1822 1823 else { 1824 /* 1825 * Since there is no active non-tagged operation 1826 * read the tag type, the tag itself, and find 1827 * the appropriate pScb by indexing HCS_Scb with 1828 * the tag. 1829 */ 1830 1831 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 1832 case -1: 1833 return (-1); 1834 case PHASE_MSG_IN: 1835 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1836 if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1) 1837 return (-1); 1838 break; 1839 default: 1840 goto abort; 1841 } 1842 1843 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag Msg */ 1844 1845 if ((msg < MSG_SIMPLE_Q_TAG) || (msg > MSG_ORDERED_Q_TAG)) 1846 goto abort; 1847 1848 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 1849 case -1: 1850 return (-1); 1851 case PHASE_MSG_IN: 1852 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1853 if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1) 1854 return (-1); 1855 break; 1856 default: 1857 goto abort; 1858 } 1859 1860 tag = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag ID */ 1861 pScb = &sc->HCS_Scb[tag]; 1862 1863 abortmsg = MSG_ABORT_TAG; /* Now that we have valdid tag! */ 1864 } 1865 1866 if ((pScb->SCB_Target != target) 1867 || (pScb->SCB_Lun != lun) 1868 || (pScb->SCB_Status != STATUS_BUSY)) { 1869 abort: 1870 iha_msgout_abort(sc, iot, ioh, abortmsg); 1871 return (-1); 1872 } 1873 1874 sc->HCS_ActScb = pScb; 1875 1876 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == -1) 1877 return (-1); 1878 1879 return(iha_next_state(sc, iot, ioh)); 1880 } 1881 1882 int 1883 iha_msgin(sc, iot, ioh) 1884 struct iha_softc *sc; 1885 bus_space_tag_t iot; 1886 bus_space_handle_t ioh; 1887 { 1888 u_int16_t flags; 1889 u_int8_t msg; 1890 int phase; 1891 1892 for (;;) { 1893 if ((bus_space_read_1(iot, ioh, TUL_SFIFOCNT) & FIFOC) > 0) 1894 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1895 1896 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1897 1898 phase = iha_wait(sc, iot, ioh, XF_FIFO_IN); 1899 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1900 1901 switch (msg) { 1902 case MSG_DISCONNECT: 1903 sc->HCS_Flags |= FLAG_EXPECT_DISC; 1904 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) != -1) 1905 iha_bad_seq(sc); 1906 phase = -1; 1907 break; 1908 case MSG_SAVEDATAPOINTER: 1909 case MSG_RESTOREPOINTERS: 1910 case MSG_NOOP: 1911 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1912 break; 1913 case MSG_MESSAGE_REJECT: 1914 /* XXX - need to clear FIFO like other 'Clear ATN'?*/ 1915 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 1916 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags; 1917 if ((flags & FLAG_NO_NEG_SYNC) == 0) 1918 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 1919 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1920 break; 1921 case MSG_EXTENDED: 1922 phase = iha_msgin_extended(sc, iot, ioh); 1923 break; 1924 case MSG_IGN_WIDE_RESIDUE: 1925 phase = iha_msgin_ignore_wid_resid(sc, iot, ioh); 1926 break; 1927 case MSG_CMDCOMPLETE: 1928 sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC; 1929 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1930 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1931 if (phase != -1) { 1932 iha_bad_seq(sc); 1933 return (-1); 1934 } 1935 break; 1936 default: 1937 printf("[debug] iha_msgin: bad msg type: %d\n", msg); 1938 phase = iha_msgout_reject(sc, iot, ioh); 1939 break; 1940 } 1941 1942 if (phase != PHASE_MSG_IN) 1943 return (phase); 1944 } 1945 /* NOTREACHED */ 1946 } 1947 1948 int 1949 iha_msgin_ignore_wid_resid(sc, iot, ioh) 1950 struct iha_softc *sc; 1951 bus_space_tag_t iot; 1952 bus_space_handle_t ioh; 1953 { 1954 int phase; 1955 1956 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1957 1958 if (phase == PHASE_MSG_IN) { 1959 phase = iha_wait(sc, iot, ioh, XF_FIFO_IN); 1960 1961 if (phase != -1) { 1962 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1963 bus_space_read_1 (iot, ioh, TUL_SFIFO); 1964 bus_space_read_1 (iot, ioh, TUL_SFIFO); 1965 1966 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1967 } 1968 } 1969 1970 return (phase); 1971 } 1972 1973 int 1974 iha_msgin_extended(sc, iot, ioh) 1975 struct iha_softc *sc; 1976 bus_space_tag_t iot; 1977 bus_space_handle_t ioh; 1978 { 1979 u_int16_t flags; 1980 int i, phase, msglen, msgcode; 1981 1982 /* XXX - can we just stop reading and reject, or do we have to 1983 * read all input, discarding the excess, and then reject 1984 */ 1985 for (i = 0; i < IHA_MAX_EXTENDED_MSG; i++) { 1986 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1987 1988 if (phase != PHASE_MSG_IN) 1989 return (phase); 1990 1991 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1992 1993 if (iha_wait(sc, iot, ioh, XF_FIFO_IN) == -1) 1994 return (-1); 1995 1996 sc->HCS_Msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO); 1997 1998 if (sc->HCS_Msg[0] == i) 1999 break; 2000 } 2001 2002 msglen = sc->HCS_Msg[0]; 2003 msgcode = sc->HCS_Msg[1]; 2004 2005 if ((msglen == MSG_EXT_SDTR_LEN) && (msgcode == MSG_EXT_SDTR)) { 2006 if (iha_msgin_sdtr(sc) == 0) { 2007 iha_sync_done(sc, iot, ioh); 2008 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 2009 } 2010 2011 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2012 2013 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 2014 if (phase != PHASE_MSG_OUT) 2015 return (phase); 2016 2017 /* Clear FIFO for important message - final SYNC offer */ 2018 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2019 2020 iha_sync_done(sc, iot, ioh); /* This is our final offer */ 2021 2022 } else if ((msglen == MSG_EXT_WDTR_LEN) && (msgcode == MSG_EXT_WDTR)) { 2023 2024 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags; 2025 2026 if ((flags & FLAG_NO_WIDE) != 0) 2027 sc->HCS_Msg[2] = 0; /* Offer async xfers only */ 2028 2029 else if (sc->HCS_Msg[2] > 2) /* BAD MSG: 2 is max value */ 2030 return (iha_msgout_reject(sc, iot, ioh)); 2031 2032 else if (sc->HCS_Msg[2] == 2) /* a request for 32 bit xfers*/ 2033 sc->HCS_Msg[2] = 1; /* Offer 16 instead */ 2034 2035 else { 2036 iha_wide_done(sc, iot, ioh); 2037 if ((flags & FLAG_NO_NEG_SYNC) == 0) 2038 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2039 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 2040 } 2041 2042 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2043 2044 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 2045 if (phase != PHASE_MSG_OUT) 2046 return (phase); 2047 2048 } else 2049 return (iha_msgout_reject(sc, iot, ioh)); 2050 2051 /* Send message built in sc->HCS_Msg[] */ 2052 return (iha_msgout_extended(sc, iot, ioh)); 2053 } 2054 2055 /* 2056 * iha_msgin_sdtr - check SDTR msg in HCS_Msg. If the offer is 2057 * acceptable leave HCS_Msg as is and return 0. 2058 * If the negotiation must continue, modify HCS_Msg 2059 * as needed and return 1. Else return 0. 2060 */ 2061 int 2062 iha_msgin_sdtr(sc) 2063 struct iha_softc *sc; 2064 { 2065 u_int16_t flags; 2066 u_int8_t default_period; 2067 int newoffer; 2068 2069 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags; 2070 2071 default_period = iha_rate_tbl[flags & FLAG_SCSI_RATE]; 2072 2073 if (sc->HCS_Msg[3] == 0) /* target offered async only. Accept it. */ 2074 return (0); 2075 2076 newoffer = 0; 2077 2078 if ((flags & FLAG_NO_SYNC) != 0) { 2079 sc->HCS_Msg[3] = 0; 2080 newoffer = 1; 2081 } 2082 2083 if (sc->HCS_Msg[3] > IHA_MAX_TARGETS-1) { 2084 sc->HCS_Msg[3] = IHA_MAX_TARGETS-1; 2085 newoffer = 1; 2086 } 2087 2088 if (sc->HCS_Msg[2] < default_period) { 2089 sc->HCS_Msg[2] = default_period; 2090 newoffer = 1; 2091 } 2092 2093 if (sc->HCS_Msg[2] >= 59) { 2094 sc->HCS_Msg[3] = 0; 2095 newoffer = 1; 2096 } 2097 2098 return (newoffer); 2099 } 2100 2101 int 2102 iha_msgout(sc, iot, ioh, msg) 2103 struct iha_softc *sc; 2104 bus_space_tag_t iot; 2105 bus_space_handle_t ioh; 2106 u_int8_t msg; 2107 { 2108 bus_space_write_1(iot, ioh, TUL_SFIFO, msg); 2109 2110 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT)); 2111 } 2112 2113 void 2114 iha_msgout_abort(sc, iot, ioh, aborttype) 2115 struct iha_softc *sc; 2116 bus_space_tag_t iot; 2117 bus_space_handle_t ioh; 2118 u_int8_t aborttype; 2119 { 2120 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2121 2122 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 2123 case -1: 2124 break; 2125 2126 case PHASE_MSG_OUT: 2127 sc->HCS_Flags |= FLAG_EXPECT_DISC; 2128 if (iha_msgout(sc, iot, ioh, aborttype) != -1) 2129 iha_bad_seq(sc); 2130 break; 2131 2132 default: 2133 iha_bad_seq(sc); 2134 break; 2135 } 2136 } 2137 2138 int 2139 iha_msgout_reject(sc, iot, ioh) 2140 struct iha_softc *sc; 2141 bus_space_tag_t iot; 2142 bus_space_handle_t ioh; 2143 { 2144 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2145 2146 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == PHASE_MSG_OUT) 2147 return (iha_msgout(sc, iot, ioh, MSG_MESSAGE_REJECT)); 2148 2149 return (-1); 2150 } 2151 2152 int 2153 iha_msgout_extended(sc, iot, ioh) 2154 struct iha_softc *sc; 2155 bus_space_tag_t iot; 2156 bus_space_handle_t ioh; 2157 { 2158 int phase; 2159 2160 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_EXTENDED); 2161 2162 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2163 sc->HCS_Msg, sc->HCS_Msg[0]+1); 2164 2165 phase = iha_wait(sc, iot, ioh, XF_FIFO_OUT); 2166 2167 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2168 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 2169 2170 return (phase); 2171 } 2172 2173 int 2174 iha_msgout_wdtr(sc, iot, ioh) 2175 struct iha_softc *sc; 2176 bus_space_tag_t iot; 2177 bus_space_handle_t ioh; 2178 { 2179 sc->HCS_ActScb->SCB_Tcs->TCS_Flags |= FLAG_WIDE_DONE; 2180 2181 sc->HCS_Msg[0] = MSG_EXT_WDTR_LEN; 2182 sc->HCS_Msg[1] = MSG_EXT_WDTR; 2183 sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_16_BIT; 2184 2185 return (iha_msgout_extended(sc, iot, ioh)); 2186 } 2187 2188 int 2189 iha_msgout_sdtr(sc, iot, ioh) 2190 struct iha_softc *sc; 2191 bus_space_tag_t iot; 2192 bus_space_handle_t ioh; 2193 { 2194 u_int16_t rateindex; 2195 u_int8_t sync_rate; 2196 2197 rateindex = sc->HCS_ActScb->SCB_Tcs->TCS_Flags & FLAG_SCSI_RATE; 2198 2199 sync_rate = iha_rate_tbl[rateindex]; 2200 2201 sc->HCS_Msg[0] = MSG_EXT_SDTR_LEN; 2202 sc->HCS_Msg[1] = MSG_EXT_SDTR; 2203 sc->HCS_Msg[2] = sync_rate; 2204 sc->HCS_Msg[3] = IHA_MAX_TARGETS-1; /* REQ/ACK */ 2205 2206 return (iha_msgout_extended(sc, iot, ioh)); 2207 } 2208 2209 void 2210 iha_wide_done(sc, iot, ioh) 2211 struct iha_softc *sc; 2212 bus_space_tag_t iot; 2213 bus_space_handle_t ioh; 2214 { 2215 struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs; 2216 2217 pTcs->TCS_JS_Period = 0; 2218 2219 if (sc->HCS_Msg[2] != 0) 2220 pTcs->TCS_JS_Period |= PERIOD_WIDE_SCSI; 2221 2222 pTcs->TCS_SConfig0 &= ~ALTPD; 2223 pTcs->TCS_Flags &= ~FLAG_SYNC_DONE; 2224 pTcs->TCS_Flags |= FLAG_WIDE_DONE; 2225 2226 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 2227 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 2228 } 2229 2230 void 2231 iha_sync_done(sc, iot, ioh) 2232 struct iha_softc *sc; 2233 bus_space_tag_t iot; 2234 bus_space_handle_t ioh; 2235 { 2236 struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs; 2237 int i; 2238 2239 if ((pTcs->TCS_Flags & FLAG_SYNC_DONE) == 0) { 2240 if (sc->HCS_Msg[3] != 0) { 2241 pTcs->TCS_JS_Period |= sc->HCS_Msg[3]; 2242 2243 /* pick the highest possible rate */ 2244 for (i = 0; i < 8; i++) 2245 if (iha_rate_tbl[i] >= sc->HCS_Msg[2]) 2246 break; 2247 2248 pTcs->TCS_JS_Period |= (i << 4); 2249 pTcs->TCS_SConfig0 |= ALTPD; 2250 } 2251 2252 pTcs->TCS_Flags |= FLAG_SYNC_DONE; 2253 2254 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 2255 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 2256 } 2257 } 2258 2259 void 2260 iha_reset_chip(sc, iot, ioh) 2261 struct iha_softc *sc; 2262 bus_space_tag_t iot; 2263 bus_space_handle_t ioh; 2264 { 2265 int i; 2266 2267 /* reset tulip chip */ 2268 2269 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSCSI); 2270 2271 do 2272 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT); 2273 while((sc->HCS_JSInt & SRSTD) == 0); 2274 2275 iha_set_ssig(iot, ioh, 0, 0); 2276 2277 /* 2278 * Stall for 2 seconds, wait for target's firmware ready. 2279 */ 2280 for (i = 0; i < 2000; i++) 2281 DELAY (1000); 2282 2283 bus_space_read_1(iot, ioh, TUL_SISTAT); /* Clear any active interrupt*/ 2284 } 2285 2286 void 2287 iha_select(sc, iot, ioh, pScb, select_type) 2288 struct iha_softc *sc; 2289 bus_space_tag_t iot; 2290 bus_space_handle_t ioh; 2291 struct iha_scsi_req_q *pScb; 2292 u_int8_t select_type; 2293 { 2294 switch (select_type) { 2295 case SEL_ATN: 2296 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident); 2297 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2298 pScb->SCB_CDB, pScb->SCB_CDBLen); 2299 2300 pScb->SCB_NxtStat = 2; 2301 break; 2302 2303 case SELATNSTOP: 2304 pScb->SCB_NxtStat = 1; 2305 break; 2306 2307 case SEL_ATN3: 2308 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident); 2309 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_TagMsg); 2310 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_TagId); 2311 2312 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, pScb->SCB_CDB, 2313 pScb->SCB_CDBLen); 2314 2315 pScb->SCB_NxtStat = 2; 2316 break; 2317 2318 default: 2319 printf("[debug] iha_select() - unknown select type = 0x%02x\n", 2320 select_type); 2321 return; 2322 } 2323 2324 iha_del_pend_scb(sc, pScb); 2325 pScb->SCB_Status = STATUS_SELECT; 2326 2327 sc->HCS_ActScb = pScb; 2328 2329 bus_space_write_1(iot, ioh, TUL_SCMD, select_type); 2330 } 2331 2332 /* 2333 * iha_wait - wait for an interrupt to service or a SCSI bus phase change 2334 * after writing the supplied command to the tulip chip. If 2335 * the command is NO_OP, skip the command writing. 2336 */ 2337 int 2338 iha_wait(sc, iot, ioh, cmd) 2339 struct iha_softc *sc; 2340 bus_space_tag_t iot; 2341 bus_space_handle_t ioh; 2342 u_int8_t cmd; 2343 { 2344 if (cmd != NO_OP) 2345 bus_space_write_1(iot, ioh, TUL_SCMD, cmd); 2346 2347 /* 2348 * Have to do this here, in addition to in iha_isr, because 2349 * interrupts might be turned off when we get here. 2350 */ 2351 do 2352 sc->HCS_JSStatus0 = bus_space_read_1(iot, ioh, TUL_STAT0); 2353 while ((sc->HCS_JSStatus0 & INTPD) == 0); 2354 2355 sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1); 2356 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT); 2357 2358 sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK; 2359 2360 if ((sc->HCS_JSInt & SRSTD) != 0) { 2361 /* SCSI bus reset interrupt */ 2362 iha_reset_scsi_bus(sc); 2363 return (-1); 2364 } 2365 2366 if ((sc->HCS_JSInt & RSELED) != 0) 2367 /* Reselection interrupt */ 2368 return (iha_resel(sc, iot, ioh)); 2369 2370 if ((sc->HCS_JSInt & STIMEO) != 0) { 2371 /* selected/reselected timeout interrupt */ 2372 iha_busfree(sc, iot, ioh); 2373 return (-1); 2374 } 2375 2376 if ((sc->HCS_JSInt & DISCD) != 0) { 2377 /* BUS disconnection interrupt */ 2378 if ((sc->HCS_Flags & FLAG_EXPECT_DONE_DISC) != 0) { 2379 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2380 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2381 SCONFIG0DEFAULT); 2382 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2383 iha_append_done_scb(sc, sc->HCS_ActScb, HOST_OK); 2384 sc->HCS_Flags &= ~FLAG_EXPECT_DONE_DISC; 2385 2386 } else if ((sc->HCS_Flags & FLAG_EXPECT_DISC) != 0) { 2387 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2388 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2389 SCONFIG0DEFAULT); 2390 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2391 sc->HCS_ActScb = NULL; 2392 sc->HCS_Flags &= ~FLAG_EXPECT_DISC; 2393 2394 } else 2395 iha_busfree(sc, iot, ioh); 2396 2397 return (-1); 2398 } 2399 2400 return (sc->HCS_Phase); 2401 } 2402 2403 /* 2404 * iha_done_scb - We have a scb which has been processed by the 2405 * adaptor, now we look to see how the operation went. 2406 */ 2407 void 2408 iha_done_scb(sc, pScb) 2409 struct iha_softc *sc; 2410 struct iha_scsi_req_q *pScb; 2411 { 2412 struct scsi_sense_data *s1, *s2; 2413 struct scsi_xfer *xs = pScb->SCB_Xs; 2414 2415 if (xs != NULL) { 2416 xs->status = pScb->SCB_TaStat; 2417 2418 switch (pScb->SCB_HaStat) { 2419 case HOST_OK: 2420 switch (pScb->SCB_TaStat) { 2421 case SCSI_OK: 2422 case SCSI_CONDITION_MET: 2423 case SCSI_INTERM: 2424 case SCSI_INTERM_COND_MET: 2425 xs->resid = pScb->SCB_BufLen; 2426 xs->error = XS_NOERROR; 2427 break; 2428 2429 case SCSI_RSERV_CONFLICT: 2430 case SCSI_BUSY: 2431 case SCSI_QUEUE_FULL: 2432 xs->error = XS_BUSY; 2433 break; 2434 2435 case SCSI_CMD_TERMINATED: 2436 case SCSI_ACA_ACTIVE: 2437 case SCSI_CHECK: 2438 s1 = &pScb->SCB_ScsiSenseData; 2439 s2 = &xs->sense; 2440 *s2 = *s1; 2441 2442 xs->error = XS_SENSE; 2443 break; 2444 2445 default: 2446 xs->error = XS_DRIVER_STUFFUP; 2447 break; 2448 } 2449 break; 2450 2451 case HOST_SEL_TOUT: 2452 xs->error = XS_SELTIMEOUT; 2453 break; 2454 2455 case HOST_SCSI_RST: 2456 case HOST_DEV_RST: 2457 xs->error = XS_RESET; 2458 break; 2459 2460 case HOST_SPERR: 2461 printf("%s: SCSI Parity error detected\n", 2462 sc->sc_dev.dv_xname); 2463 xs->error = XS_DRIVER_STUFFUP; 2464 break; 2465 2466 case HOST_TIMED_OUT: 2467 xs->error = XS_TIMEOUT; 2468 break; 2469 2470 case HOST_DO_DU: 2471 case HOST_BAD_PHAS: 2472 default: 2473 xs->error = XS_DRIVER_STUFFUP; 2474 break; 2475 } 2476 2477 if (xs->datalen > 0) { 2478 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_Dmamap 2479 ,(xs->flags & SCSI_DATA_IN) ? 2480 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2481 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_Dmamap); 2482 } 2483 2484 xs->flags |= ITSDONE; 2485 scsi_done(xs); 2486 } 2487 2488 iha_append_free_scb(sc, pScb); 2489 } 2490 2491 void 2492 iha_timeout(arg) 2493 void *arg; 2494 { 2495 struct iha_scsi_req_q *pScb = (struct iha_scsi_req_q *)arg; 2496 struct scsi_xfer *xs = pScb->SCB_Xs; 2497 struct iha_softc *sc; 2498 2499 if (xs == NULL) 2500 printf("[debug] iha_timeout called with xs == NULL\n"); 2501 2502 else { 2503 sc = xs->sc_link->adapter_softc; 2504 sc_print_addr(xs->sc_link); 2505 printf("SCSI OpCode 0x%02x timed out\n", xs->cmd->opcode); 2506 2507 iha_abort_xs(xs->sc_link->adapter_softc, xs, HOST_TIMED_OUT); 2508 } 2509 } 2510 2511 void 2512 iha_exec_scb(sc, pScb) 2513 struct iha_softc *sc; 2514 struct iha_scsi_req_q *pScb; 2515 { 2516 bus_space_handle_t ioh; 2517 bus_space_tag_t iot; 2518 int s; 2519 2520 s = splbio(); 2521 2522 if (((pScb->SCB_Flags & SCSI_RESET) != 0) 2523 || (pScb->SCB_CDB[0] == REQUEST_SENSE)) 2524 iha_push_pend_scb(sc, pScb); /* Insert SCB at head of Pend */ 2525 else 2526 iha_append_pend_scb(sc, pScb); /* Append SCB to tail of Pend */ 2527 2528 /* 2529 * Run through iha_main() to ensure something is active, if 2530 * only this new SCB. 2531 */ 2532 if (sc->HCS_Semaph != SEMAPH_IN_MAIN) { 2533 iot = sc->sc_iot; 2534 ioh = sc->sc_ioh; 2535 2536 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 2537 sc->HCS_Semaph = SEMAPH_IN_MAIN;; 2538 2539 splx(s); 2540 iha_main(sc, iot, ioh); 2541 s = splbio(); 2542 2543 sc->HCS_Semaph = ~SEMAPH_IN_MAIN;; 2544 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 2545 } 2546 2547 splx(s); 2548 } 2549 2550 2551 /* 2552 * iha_set_ssig - read the current scsi signal mask, then write a new 2553 * one which turns off/on the specified signals. 2554 */ 2555 void 2556 iha_set_ssig( iot, ioh, offsigs, onsigs) 2557 bus_space_tag_t iot; 2558 bus_space_handle_t ioh; 2559 u_int8_t offsigs, onsigs; 2560 { 2561 u_int8_t currsigs; 2562 2563 currsigs = bus_space_read_1(iot, ioh, TUL_SSIGI); 2564 bus_space_write_1(iot, ioh, TUL_SSIGO, (currsigs & ~offsigs) | onsigs); 2565 } 2566 2567 void 2568 iha_print_info(sc, target) 2569 struct iha_softc *sc; 2570 int target; 2571 { 2572 u_int8_t period = sc->HCS_Tcs[target].TCS_JS_Period; 2573 u_int8_t config = sc->HCS_Tcs[target].TCS_SConfig0; 2574 int rate; 2575 2576 printf("%s: target %d using %d bit ", sc->sc_dev.dv_xname, target, 2577 (period & PERIOD_WIDE_SCSI) ? 16 : 8); 2578 2579 if ((period & PERIOD_SYOFS) == 0) 2580 printf("async "); 2581 else { 2582 rate = (period & PERIOD_SYXPD) >> 4; 2583 if ((config & ALTPD) == 0) 2584 rate = 100 + rate * 50; 2585 else 2586 rate = 50 + rate * 25; 2587 rate = 1000000000 / rate; 2588 printf("%d.%d MHz %d REQ/ACK offset ", rate / 1000000, 2589 (rate % 1000000 + 99999) / 100000, period & PERIOD_SYOFS); 2590 } 2591 2592 printf("xfers\n"); 2593 } 2594 2595 2596 /* 2597 * iha_alloc_scbs - allocate and map the SCB's for the supplied iha_softc 2598 */ 2599 int 2600 iha_alloc_scbs(sc) 2601 struct iha_softc *sc; 2602 { 2603 bus_dma_segment_t seg; 2604 int error, rseg; 2605 2606 /* 2607 * Allocate dma-safe memory for the SCB's 2608 */ 2609 if ((error = bus_dmamem_alloc(sc->sc_dmat, 2610 sizeof(struct iha_scsi_req_q)*IHA_MAX_SCB, 2611 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) 2612 != 0) { 2613 printf("%s: unable to allocate SCBs," 2614 " error = %d\n", sc->sc_dev.dv_xname, error); 2615 return (error); 2616 } 2617 if ((error = bus_dmamem_map(sc->sc_dmat, 2618 &seg, rseg, sizeof(struct iha_scsi_req_q)*IHA_MAX_SCB, 2619 (caddr_t *)&sc->HCS_Scb, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) 2620 != 0) { 2621 printf("%s: unable to map SCBs, error = %d\n", 2622 sc->sc_dev.dv_xname, error); 2623 return (error); 2624 } 2625 2626 /* 2627 * Create and load the DMA map used for the SCBs 2628 */ 2629 if ((error = bus_dmamap_create(sc->sc_dmat, 2630 sizeof(struct iha_scsi_req_q)*IHA_MAX_SCB, 2631 1, sizeof(struct iha_scsi_req_q)*IHA_MAX_SCB, 2632 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) 2633 != 0) { 2634 printf("%s: unable to create control DMA map, error = %d\n", 2635 sc->sc_dev.dv_xname, error); 2636 return (error); 2637 } 2638 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, 2639 sc->HCS_Scb, sizeof(struct iha_scsi_req_q)*IHA_MAX_SCB, 2640 NULL, BUS_DMA_NOWAIT)) 2641 != 0) { 2642 printf("%s: unable to load control DMA map, error = %d\n", 2643 sc->sc_dev.dv_xname, error); 2644 return (error); 2645 } 2646 2647 bzero(sc->HCS_Scb, sizeof(struct iha_scsi_req_q)*IHA_MAX_SCB); 2648 2649 return (0); 2650 } 2651 2652 /* 2653 * iha_read_eeprom - read contents of serial EEPROM into iha_nvram pointed at 2654 * by parameter nvram. 2655 */ 2656 void 2657 iha_read_eeprom(iot, ioh, nvram) 2658 bus_space_tag_t iot; 2659 bus_space_handle_t ioh; 2660 struct iha_nvram *nvram; 2661 { 2662 u_int32_t chksum; 2663 u_int16_t *np; 2664 u_int8_t gctrl, addr; 2665 2666 const int chksum_addr = offsetof(struct iha_nvram, NVM_CheckSum) / 2; 2667 2668 /* Enable EEProm programming */ 2669 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) | EEPRG; 2670 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2671 2672 /* Read EEProm */ 2673 np = (u_int16_t *)nvram; 2674 for (addr=0, chksum=0; addr < chksum_addr; addr++, np++) { 2675 *np = iha_se2_rd(iot, ioh, addr); 2676 chksum += *np; 2677 } 2678 2679 chksum &= 0x0000ffff; 2680 nvram->NVM_CheckSum = iha_se2_rd(iot, ioh, chksum_addr); 2681 2682 /* Disable EEProm programming */ 2683 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) & ~EEPRG; 2684 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2685 2686 if ((nvram->NVM_Signature != SIGNATURE) 2687 || 2688 (nvram->NVM_CheckSum != chksum)) 2689 panic("iha: invalid EEPROM, bad signature or checksum\n"); 2690 } 2691 2692 /* 2693 * iha_se2_rd - read & return the 16 bit value at the specified 2694 * offset in the Serial E2PROM 2695 * 2696 */ 2697 u_int16_t 2698 iha_se2_rd(iot, ioh, addr) 2699 bus_space_tag_t iot; 2700 bus_space_handle_t ioh; 2701 u_int8_t addr; 2702 { 2703 u_int16_t readWord; 2704 u_int8_t bit; 2705 int i; 2706 2707 /* Send 'READ' instruction == address | READ bit */ 2708 iha_se2_instr(iot, ioh, (addr | READ)); 2709 2710 readWord = 0; 2711 for (i = 15; i >= 0; i--) { 2712 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2713 DELAY(5); 2714 2715 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2716 DELAY(5); 2717 2718 /* sample data after the following edge of clock */ 2719 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI; 2720 DELAY(5); 2721 2722 readWord += bit << i; 2723 } 2724 2725 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2726 DELAY(5); 2727 2728 return (readWord); 2729 } 2730 2731 /* 2732 * iha_se2_instr - write an octet to serial E2PROM one bit at a time 2733 */ 2734 void 2735 iha_se2_instr(iot, ioh, instr) 2736 bus_space_tag_t iot; 2737 bus_space_handle_t ioh; 2738 u_int8_t instr; 2739 { 2740 u_int8_t b; 2741 int i; 2742 2743 b = NVRCS | NVRDO; /* Write the start bit (== 1) */ 2744 2745 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2746 DELAY(5); 2747 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2748 DELAY(5); 2749 2750 for (i = 0; i < 8; i++, instr <<= 1) { 2751 if (instr & 0x80) 2752 b = NVRCS | NVRDO; /* Write a 1 bit */ 2753 else 2754 b = NVRCS; /* Write a 0 bit */ 2755 2756 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2757 DELAY(5); 2758 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2759 DELAY(5); 2760 } 2761 2762 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2763 DELAY(5); 2764 2765 return; 2766 } 2767 2768 /* 2769 * iha_reset_tcs - reset the target control structure pointed 2770 * to by pTcs to default values. TCS_Flags 2771 * only has the negotiation done bits reset as 2772 * the other bits are fixed at initialization. 2773 */ 2774 void 2775 iha_reset_tcs(pTcs, config0) 2776 struct tcs *pTcs; 2777 u_int8_t config0; 2778 { 2779 pTcs->TCS_Flags &= ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 2780 pTcs->TCS_JS_Period = 0; 2781 pTcs->TCS_SConfig0 = config0; 2782 pTcs->TCS_TagCnt = 0; 2783 pTcs->TCS_NonTagScb = NULL; 2784 } 2785