xref: /openbsd-src/sys/dev/ic/iha.c (revision a28daedfc357b214be5c701aa8ba8adb29a7f1c2)
1 /*	$OpenBSD: iha.c,v 1.33 2009/02/16 21:19:06 miod Exp $ */
2 /*-------------------------------------------------------------------------
3  *
4  * Device driver for the INI-9XXXU/UW or INIC-940/950  PCI SCSI Controller.
5  *
6  * Written for 386bsd and FreeBSD by
7  *	Winston Hung		<winstonh@initio.com>
8  *
9  * Copyright (c) 1997-1999 Initio Corp
10  * Copyright (c) 2000-2002 Ken Westerback
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer,
17  *    without modification, immediately at the beginning of the file.
18  * 2. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
25  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
30  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31  * THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  *-------------------------------------------------------------------------
34  */
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/buf.h>
39 #include <sys/device.h>
40 
41 #include <machine/bus.h>
42 #include <machine/intr.h>
43 
44 #include <scsi/scsi_all.h>
45 #include <scsi/scsiconf.h>
46 #include <scsi/scsi_message.h>
47 
48 #include <dev/ic/iha.h>
49 
50 /* #define IHA_DEBUG_STATE */
51 
52 struct cfdriver iha_cd = {
53 	NULL, "iha", DV_DULL
54 };
55 
56 struct scsi_adapter iha_switch = {
57 	iha_scsi_cmd,	/* scsi_cmd() */
58 	iha_minphys,	/* scsi_minphys() */
59 	NULL,		/* probe_dev(void) */
60 	NULL		/* free_dev() */
61 };
62 
63 struct scsi_device iha_dev = {
64 	NULL,		/* Use default error handler    */
65 	NULL,		/* have a queue, served by this */
66 	NULL,		/* have no async handler	*/
67 	NULL,		/* Use default 'done' routine   */
68 };
69 
70 /*
71  * SCSI Rate Table, indexed by FLAG_SCSI_RATE field of
72  * TCS_Flags.
73  */
74 static const u_int8_t iha_rate_tbl[] = {
75 	/* fast 20		  */
76 	/* nanosecond divide by 4 */
77 	12,	/* 50ns,  20M	  */
78 	18,	/* 75ns,  13.3M	  */
79 	25,	/* 100ns, 10M	  */
80 	31,	/* 125ns, 8M	  */
81 	37,	/* 150ns, 6.6M	  */
82 	43,	/* 175ns, 5.7M	  */
83 	50,	/* 200ns, 5M	  */
84 	62	/* 250ns, 4M	  */
85 };
86 
87 int iha_setup_sg_list(struct iha_softc *, struct iha_scb *);
88 u_int8_t iha_data_over_run(struct iha_scb *);
89 int iha_push_sense_request(struct iha_softc *, struct iha_scb *);
90 void iha_timeout(void *);
91 int  iha_alloc_scbs(struct iha_softc *);
92 void iha_read_eeprom(bus_space_tag_t, bus_space_handle_t,
93 			     struct iha_nvram *);
94 void iha_se2_instr(bus_space_tag_t, bus_space_handle_t, u_int8_t);
95 u_int16_t iha_se2_rd(bus_space_tag_t, bus_space_handle_t, u_int8_t);
96 void iha_reset_scsi_bus(struct iha_softc *);
97 void iha_reset_chip(struct iha_softc *,
98 			    bus_space_tag_t, bus_space_handle_t);
99 void iha_reset_dma(bus_space_tag_t, bus_space_handle_t);
100 void iha_reset_tcs(struct tcs *, u_int8_t);
101 void iha_print_info(struct iha_softc *, int);
102 void iha_done_scb(struct iha_softc *, struct iha_scb *);
103 void iha_exec_scb(struct iha_softc *, struct iha_scb *);
104 void iha_main(struct iha_softc *, bus_space_tag_t, bus_space_handle_t);
105 void iha_scsi(struct iha_softc *, bus_space_tag_t, bus_space_handle_t);
106 int  iha_wait(struct iha_softc *, bus_space_tag_t, bus_space_handle_t,
107 		      u_int8_t);
108 void iha_mark_busy_scb(struct iha_scb *);
109 void iha_append_free_scb(struct iha_softc *, struct iha_scb *);
110 struct iha_scb *iha_pop_free_scb(struct iha_softc *);
111 void iha_append_done_scb(struct iha_softc *, struct iha_scb *,
112 				 u_int8_t);
113 struct iha_scb *iha_pop_done_scb(struct iha_softc *);
114 void iha_append_pend_scb(struct iha_softc *, struct iha_scb *);
115 void iha_push_pend_scb(struct iha_softc *, struct iha_scb *);
116 struct iha_scb *iha_find_pend_scb(struct iha_softc *);
117 void iha_sync_done(struct iha_softc *,
118 			   bus_space_tag_t, bus_space_handle_t);
119 void iha_wide_done(struct iha_softc *,
120 			   bus_space_tag_t, bus_space_handle_t);
121 void iha_bad_seq(struct iha_softc *);
122 int  iha_next_state(struct iha_softc *,
123 			    bus_space_tag_t, bus_space_handle_t);
124 int  iha_state_1(struct iha_softc *,
125 			 bus_space_tag_t, bus_space_handle_t);
126 int  iha_state_2(struct iha_softc *,
127 			 bus_space_tag_t, bus_space_handle_t);
128 int  iha_state_3(struct iha_softc *,
129 			 bus_space_tag_t, bus_space_handle_t);
130 int  iha_state_4(struct iha_softc *,
131 			 bus_space_tag_t, bus_space_handle_t);
132 int  iha_state_5(struct iha_softc *,
133 			 bus_space_tag_t, bus_space_handle_t);
134 int  iha_state_6(struct iha_softc *,
135 			 bus_space_tag_t, bus_space_handle_t);
136 int  iha_state_8(struct iha_softc *,
137 			 bus_space_tag_t, bus_space_handle_t);
138 void iha_set_ssig(bus_space_tag_t,
139 			  bus_space_handle_t, u_int8_t, u_int8_t);
140 int  iha_xpad_in(struct iha_softc *,
141 			 bus_space_tag_t, bus_space_handle_t);
142 int  iha_xpad_out(struct iha_softc *,
143 			  bus_space_tag_t, bus_space_handle_t);
144 int  iha_xfer_data(struct iha_scb *,
145 			   bus_space_tag_t, bus_space_handle_t,
146 			   int direction);
147 int  iha_status_msg(struct iha_softc *,
148 			    bus_space_tag_t, bus_space_handle_t);
149 int  iha_msgin(struct iha_softc *, bus_space_tag_t, bus_space_handle_t);
150 int  iha_msgin_sdtr(struct iha_softc *);
151 int  iha_msgin_extended(struct iha_softc *,
152 				bus_space_tag_t, bus_space_handle_t);
153 int  iha_msgin_ignore_wid_resid(struct iha_softc *,
154 					bus_space_tag_t, bus_space_handle_t);
155 int  iha_msgout(struct iha_softc *,
156 			bus_space_tag_t, bus_space_handle_t, u_int8_t);
157 int  iha_msgout_extended(struct iha_softc *,
158 				 bus_space_tag_t, bus_space_handle_t);
159 void iha_msgout_abort(struct iha_softc *,
160 			      bus_space_tag_t, bus_space_handle_t,  u_int8_t);
161 int  iha_msgout_reject(struct iha_softc *,
162 			       bus_space_tag_t, bus_space_handle_t);
163 int  iha_msgout_sdtr(struct iha_softc *,
164 			     bus_space_tag_t, bus_space_handle_t);
165 int  iha_msgout_wdtr(struct iha_softc *,
166 			     bus_space_tag_t, bus_space_handle_t);
167 void iha_select(struct iha_softc *,
168 			bus_space_tag_t, bus_space_handle_t,
169 			struct iha_scb *, u_int8_t);
170 void iha_busfree(struct iha_softc *,
171 			 bus_space_tag_t, bus_space_handle_t);
172 int  iha_resel(struct iha_softc *, bus_space_tag_t, bus_space_handle_t);
173 void iha_abort_xs(struct iha_softc *, struct scsi_xfer *, u_int8_t);
174 
175 /*
176  * iha_intr - the interrupt service routine for the iha driver
177  */
178 int
179 iha_intr(arg)
180 	void *arg;
181 {
182 	bus_space_handle_t ioh;
183 	struct iha_softc *sc;
184 	bus_space_tag_t iot;
185 	int s;
186 
187 	sc  = (struct iha_softc *)arg;
188 	iot = sc->sc_iot;
189 	ioh = sc->sc_ioh;
190 
191 	if ((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0)
192 		return (0);
193 
194 	s = splbio(); /* XXX - Or are interrupts off when ISR's are called? */
195 
196 	if (sc->HCS_Semaph != SEMAPH_IN_MAIN) {
197 		/* XXX - need these inside a splbio()/splx()? */
198 		bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL);
199 		sc->HCS_Semaph = SEMAPH_IN_MAIN;
200 
201 		iha_main(sc, iot, ioh);
202 
203 		sc->HCS_Semaph = ~SEMAPH_IN_MAIN;
204 		bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP));
205 	}
206 
207 	splx(s);
208 
209 	return (1);
210 }
211 
212 /*
213  * iha_setup_sg_list -	initialize scatter gather list of pScb from
214  *			pScb->SCB_DataDma.
215  */
216 int
217 iha_setup_sg_list(sc, pScb)
218 	struct iha_softc *sc;
219 	struct iha_scb *pScb;
220 {
221 	bus_dma_segment_t *segs = pScb->SCB_DataDma->dm_segs;
222 	int i, error, nseg = pScb->SCB_DataDma->dm_nsegs;
223 
224 	if (nseg > 1) {
225 		error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_SGDma,
226 				pScb->SCB_SGList, sizeof(pScb->SCB_SGList), NULL,
227 				(pScb->SCB_Flags & SCSI_NOSLEEP) ?
228 					BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
229 		if (error) {
230 			sc_print_addr(pScb->SCB_Xs->sc_link);
231 			printf("error %d loading SG list dma map\n", error);
232 			return (error);
233 		}
234 
235 		/*
236 		 * Only set FLAG_SG when SCB_SGDma is loaded so iha_scsi_done
237 		 * will not unload an unloaded map.
238 		 */
239 		pScb->SCB_Flags	|= FLAG_SG;
240 		bzero(pScb->SCB_SGList, sizeof(pScb->SCB_SGList));
241 
242 		pScb->SCB_SGIdx	  = 0;
243 		pScb->SCB_SGCount = nseg;
244 
245 		for (i=0; i < nseg; i++) {
246 			pScb->SCB_SGList[i].SG_Len  = segs[i].ds_len;
247 			pScb->SCB_SGList[i].SG_Addr = segs[i].ds_addr;
248 		}
249 
250 		bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
251 			0, sizeof(pScb->SCB_SGList), BUS_DMASYNC_PREWRITE);
252 	}
253 
254 	return (0);
255 }
256 
257 /*
258  * iha_scsi_cmd - start execution of a SCSI command. This is called
259  *		  from the generic SCSI driver via the field
260  *		  sc_adapter.scsi_cmd of iha_softc.
261  */
262 int
263 iha_scsi_cmd(xs)
264 	struct scsi_xfer *xs;
265 {
266 	struct iha_scb *pScb;
267 	struct scsi_link *sc_link = xs->sc_link;
268 	struct iha_softc *sc = sc_link->adapter_softc;
269 	int error;
270 
271 	if ((xs->cmdlen > 12) || (sc_link->target >= IHA_MAX_TARGETS)) {
272 		xs->error = XS_DRIVER_STUFFUP;
273 		return (COMPLETE);
274 	}
275 
276 	pScb = iha_pop_free_scb(sc);
277 	if (pScb == NULL) {
278 		/* XXX - different xs->error/return if
279 		 * SCSI_POLL/_NOSLEEP? */
280 		return (NO_CCB);
281 	}
282 
283 	pScb->SCB_Target = sc_link->target;
284 	pScb->SCB_Lun	 = sc_link->lun;
285 	pScb->SCB_Tcs	 = &sc->HCS_Tcs[pScb->SCB_Target];
286 	pScb->SCB_Flags	 = xs->flags;
287 	pScb->SCB_Ident  = MSG_IDENTIFYFLAG |
288 		(pScb->SCB_Lun & MSG_IDENTIFY_LUNMASK);
289 
290 	if ((xs->cmd->opcode != REQUEST_SENSE)
291 	    && ((pScb->SCB_Flags & SCSI_POLL) == 0))
292 		pScb->SCB_Ident |= MSG_IDENTIFY_DISCFLAG;
293 
294 	pScb->SCB_Xs	 = xs;
295 	pScb->SCB_CDBLen = xs->cmdlen;
296 	bcopy(xs->cmd, &pScb->SCB_CDB, xs->cmdlen);
297 
298 	pScb->SCB_BufCharsLeft = pScb->SCB_BufChars = xs->datalen;
299 
300 	if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) {
301 		error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_DataDma,
302 		    xs->data, pScb->SCB_BufChars, NULL,
303 		    (pScb->SCB_Flags & SCSI_NOSLEEP) ?
304 		    BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
305 
306 		if (error) {
307 			sc_print_addr(xs->sc_link);
308 			if (error == EFBIG)
309 				printf("buffer needs >%d dma segments\n",
310 				    IHA_MAX_SG_ENTRIES);
311 			else
312 				printf("error %d loading buffer dma map\n",
313 				    error);
314 
315 			iha_append_free_scb(sc, pScb);
316 
317 			xs->error = XS_DRIVER_STUFFUP;
318 			return (COMPLETE);
319 		}
320 		bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
321 			0, pScb->SCB_BufChars,
322 			(pScb->SCB_Flags & SCSI_DATA_IN) ?
323 				BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
324 
325 		error = iha_setup_sg_list(sc, pScb);
326 		if (error) {
327 			bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma);
328 			xs->error = XS_DRIVER_STUFFUP;
329 			return (COMPLETE);
330 		}
331 
332 	}
333 
334 	/*
335 	 * Always initialize the stimeout structure as it may
336 	 * contain garbage that confuses timeout_del() later on.
337 	 * But, timeout_add() ONLY if we are not polling.
338 	 */
339 	timeout_set(&xs->stimeout, iha_timeout, pScb);
340 	if ((pScb->SCB_Flags & SCSI_POLL) == 0)
341 		timeout_add_msec(&xs->stimeout, xs->timeout);
342 
343 	iha_exec_scb(sc, pScb);
344 
345 	if (xs->flags & (SCSI_POLL | ITSDONE))
346 		return (COMPLETE);
347 	else
348 		return (SUCCESSFULLY_QUEUED);
349 }
350 
351 /*
352  * iha_init_tulip - initialize the inic-940/950 card and the rest of the
353  *		    iha_softc structure supplied
354  */
355 int
356 iha_init_tulip(sc)
357 	struct iha_softc *sc;
358 {
359 	struct iha_scb *pScb;
360 	struct iha_nvram_scsi *pScsi;
361 	bus_space_handle_t ioh;
362 	struct iha_nvram iha_nvram;
363 	bus_space_tag_t iot;
364 	int i, error;
365 
366 	iot = sc->sc_iot;
367 	ioh = sc->sc_ioh;
368 
369 	iha_read_eeprom(iot, ioh, &iha_nvram);
370 
371 	pScsi = &iha_nvram.NVM_Scsi[0];
372 
373 	/*
374 	 * fill in the prototype scsi_link.
375 	 */
376 	sc->sc_link.adapter_softc    = sc;
377 	sc->sc_link.adapter	     = &iha_switch;
378 	sc->sc_link.device	     = &iha_dev;
379 	sc->sc_link.openings	     = 4; /* # xs's allowed per device */
380 	sc->sc_link.adapter_target   = pScsi->NVM_SCSI_Id;
381 	sc->sc_link.adapter_buswidth = pScsi->NVM_SCSI_Targets;
382 
383 	/*
384 	 * fill in the rest of the iha_softc fields
385 	 */
386 	sc->HCS_Semaph	  = ~SEMAPH_IN_MAIN;
387 	sc->HCS_JSStatus0 = 0;
388 	sc->HCS_ActScb	  = NULL;
389 
390 	TAILQ_INIT(&sc->HCS_FreeScb);
391 	TAILQ_INIT(&sc->HCS_PendScb);
392 	TAILQ_INIT(&sc->HCS_DoneScb);
393 
394 	error = iha_alloc_scbs(sc);
395 	if (error != 0)
396 		return (error);
397 
398 	for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) {
399 		pScb->SCB_TagId = i;
400 
401 		error = bus_dmamap_create(sc->sc_dmat,
402 		    (IHA_MAX_SG_ENTRIES-1) * PAGE_SIZE, IHA_MAX_SG_ENTRIES,
403 		    (IHA_MAX_SG_ENTRIES-1) * PAGE_SIZE, 0,
404 		    BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &pScb->SCB_DataDma);
405 
406 		if (error != 0) {
407 			printf("%s: couldn't create SCB data DMA map, error = %d\n",
408 			    sc->sc_dev.dv_xname, error);
409 			return (error);
410 		}
411 
412 		error = bus_dmamap_create(sc->sc_dmat,
413 				sizeof(pScb->SCB_SGList), 1,
414 				sizeof(pScb->SCB_SGList), 0,
415 				BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
416 				&pScb->SCB_SGDma);
417 		if (error != 0) {
418 			printf("%s: couldn't create SCB SG DMA map, error = %d\n",
419 			    sc->sc_dev.dv_xname, error);
420 			return (error);
421 		}
422 
423 		TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList);
424 	}
425 
426 	/* Mask all the interrupts */
427 	bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL);
428 
429 	/* Stop any I/O and reset the scsi module */
430 	iha_reset_dma(iot, ioh);
431 	bus_space_write_1(iot, ioh, TUL_SCTRL0, RSMOD);
432 
433 	/* Program HBA's SCSI ID */
434 	bus_space_write_1(iot, ioh, TUL_SID, sc->sc_link.adapter_target << 4);
435 
436 	/*
437 	 * Configure the channel as requested by the NVRAM settings read
438 	 * into iha_nvram by iha_read_eeprom() above.
439 	 */
440 
441 	if ((pScsi->NVM_SCSI_Cfg & CFG_EN_PAR) != 0)
442 		sc->HCS_SConf1 = (SCONFIG0DEFAULT | SPCHK);
443 	else
444 		sc->HCS_SConf1 = (SCONFIG0DEFAULT);
445 	bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->HCS_SConf1);
446 
447 	/* selection time out in units of 1.6385 millisecond = 250 ms */
448 	bus_space_write_1(iot, ioh, TUL_STIMO, 153);
449 
450 	/* Enable desired SCSI termination configuration read from eeprom */
451 	bus_space_write_1(iot, ioh, TUL_DCTRL0,
452 	    (pScsi->NVM_SCSI_Cfg & (CFG_ACT_TERM1 | CFG_ACT_TERM2)));
453 
454 	bus_space_write_1(iot, ioh, TUL_GCTRL1,
455 	    ((pScsi->NVM_SCSI_Cfg & CFG_AUTO_TERM) >> 4)
456 	        | (bus_space_read_1(iot, ioh, TUL_GCTRL1) & (~ATDEN)));
457 
458 	for (i = 0; i < IHA_MAX_TARGETS; i++) {
459 		sc->HCS_Tcs[i].TCS_Flags = pScsi->NVM_SCSI_TargetFlags[i];
460 		iha_reset_tcs(&sc->HCS_Tcs[i], sc->HCS_SConf1);
461 	}
462 
463 	iha_reset_chip(sc, iot, ioh);
464 	bus_space_write_1(iot, ioh, TUL_SIEN, ALL_INTERRUPTS);
465 
466 	return (0);
467 }
468 
469 /*
470  * iha_minphys - reduce bp->b_bcount to something less than
471  *		 or equal to the largest I/O possible through
472  *		 the adapter. Called from higher layers
473  *		 via sc->sc_adapter.scsi_minphys.
474  */
475 void
476 iha_minphys(struct buf *bp, struct scsi_link *sl)
477 {
478 	if (bp->b_bcount > ((IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE))
479 		bp->b_bcount = ((IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE);
480 
481 	minphys(bp);
482 }
483 
484 /*
485  * iha_reset_dma - abort any active DMA xfer, reset tulip FIFO.
486  */
487 void
488 iha_reset_dma(iot, ioh)
489 	bus_space_tag_t	   iot;
490 	bus_space_handle_t ioh;
491 {
492 	if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) {
493 		/* if DMA xfer is pending, abort DMA xfer */
494 		bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR);
495 		/* wait Abort DMA xfer done */
496 		while ((bus_space_read_1(iot, ioh, TUL_ISTUS0) & DABT) == 0)
497 			;
498 	}
499 
500 	bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
501 }
502 
503 /*
504  * iha_pop_free_scb - return the first free SCB, or NULL if there are none.
505  */
506 struct iha_scb *
507 iha_pop_free_scb(sc)
508 	struct iha_softc *sc;
509 {
510 	struct iha_scb *pScb;
511 	int s;
512 
513 	s = splbio();
514 
515 	pScb = TAILQ_FIRST(&sc->HCS_FreeScb);
516 
517 	if (pScb != NULL) {
518 		pScb->SCB_Status = STATUS_RENT;
519 		TAILQ_REMOVE(&sc->HCS_FreeScb, pScb, SCB_ScbList);
520 	}
521 
522 	splx(s);
523 
524 	return (pScb);
525 }
526 
527 /*
528  * iha_append_free_scb - append the supplied SCB to the tail of the
529  *                       HCS_FreeScb queue after clearing and resetting
530  *			 everything possible.
531  */
532 void
533 iha_append_free_scb(sc, pScb)
534 	struct iha_softc *sc;
535 	struct iha_scb *pScb;
536 {
537 	int s;
538 
539 	s = splbio();
540 
541 	if (pScb == sc->HCS_ActScb)
542 		sc->HCS_ActScb = NULL;
543 
544 	pScb->SCB_Status = STATUS_QUEUED;
545 	pScb->SCB_HaStat = HOST_OK;
546 	pScb->SCB_TaStat = SCSI_OK;
547 
548 	pScb->SCB_NxtStat  = 0;
549 	pScb->SCB_Flags	   = 0;
550 	pScb->SCB_Target   = 0;
551 	pScb->SCB_Lun	   = 0;
552 	pScb->SCB_CDBLen   = 0;
553 	pScb->SCB_Ident	   = 0;
554 	pScb->SCB_TagMsg   = 0;
555 
556 	pScb->SCB_BufChars     = 0;
557 	pScb->SCB_BufCharsLeft = 0;
558 
559 	pScb->SCB_Xs  = NULL;
560 	pScb->SCB_Tcs = NULL;
561 
562 	bzero(pScb->SCB_CDB, sizeof(pScb->SCB_CDB));
563 
564 	/*
565 	 * SCB_TagId is set at initialization and never changes
566 	 */
567 
568 	TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList);
569 
570 	splx(s);
571 }
572 
573 void
574 iha_append_pend_scb(sc, pScb)
575 	struct iha_softc *sc;
576 	struct iha_scb *pScb;
577 {
578 	/* ASSUMPTION: only called within a splbio()/splx() pair */
579 
580 	if (pScb == sc->HCS_ActScb)
581 		sc->HCS_ActScb = NULL;
582 
583 	pScb->SCB_Status = STATUS_QUEUED;
584 
585 	TAILQ_INSERT_TAIL(&sc->HCS_PendScb, pScb, SCB_ScbList);
586 }
587 
588 void
589 iha_push_pend_scb(sc, pScb)
590 	struct iha_softc *sc;
591 	struct iha_scb *pScb;
592 {
593 	int s;
594 
595 	s = splbio();
596 
597 	if (pScb == sc->HCS_ActScb)
598 		sc->HCS_ActScb = NULL;
599 
600 	pScb->SCB_Status = STATUS_QUEUED;
601 
602 	TAILQ_INSERT_HEAD(&sc->HCS_PendScb, pScb, SCB_ScbList);
603 
604 	splx(s);
605 }
606 
607 /*
608  * iha_find_pend_scb - scan the pending queue for a SCB that can be
609  *		       processed immediately. Return NULL if none found
610  *		       and a pointer to the SCB if one is found. If there
611  *		       is an active SCB, return NULL!
612  */
613 struct iha_scb *
614 iha_find_pend_scb(sc)
615 	struct iha_softc *sc;
616 {
617 	struct iha_scb *pScb;
618 	struct tcs *pTcs;
619 	int s;
620 
621 	s = splbio();
622 
623 	if (sc->HCS_ActScb != NULL)
624 		pScb = NULL;
625 
626 	else
627 		TAILQ_FOREACH(pScb, &sc->HCS_PendScb, SCB_ScbList) {
628 			if ((pScb->SCB_Flags & SCSI_RESET) != 0)
629 				/* ALWAYS willing to reset a device */
630 				break;
631 
632 			pTcs = pScb->SCB_Tcs;
633 
634 			if ((pScb->SCB_TagMsg) != 0) {
635 				/*
636 				 * A Tagged I/O. OK to start If no
637 				 * non-tagged I/O is active on the same
638 				 * target
639 				 */
640 				if (pTcs->TCS_NonTagScb == NULL)
641 					break;
642 
643 			} else	if (pScb->SCB_CDB[0] == REQUEST_SENSE) {
644 				/*
645 				 * OK to do a non-tagged request sense
646 				 * even if a non-tagged I/O has been
647 				 * started, because we don't allow any
648 				 * disconnect during a request sense op
649 				 */
650 				break;
651 
652 			} else	if (pTcs->TCS_TagCnt == 0) {
653 				/*
654 				 * No tagged I/O active on this target,
655 				 * ok to start a non-tagged one if one
656 				 * is not already active
657 				 */
658 				if (pTcs->TCS_NonTagScb == NULL)
659 					break;
660 			}
661 		}
662 
663 	splx(s);
664 
665 	return (pScb);
666 }
667 
668 void
669 iha_mark_busy_scb(pScb)
670 	struct iha_scb *pScb;
671 {
672 	int  s;
673 
674 	s = splbio();
675 
676 	pScb->SCB_Status = STATUS_BUSY;
677 
678 	if (pScb->SCB_TagMsg == 0)
679 		pScb->SCB_Tcs->TCS_NonTagScb = pScb;
680 	else
681 		pScb->SCB_Tcs->TCS_TagCnt++;
682 
683 	splx(s);
684 }
685 
686 void
687 iha_append_done_scb(sc, pScb, hastat)
688 	struct iha_softc *sc;
689 	struct iha_scb *pScb;
690 	u_int8_t hastat;
691 {
692 	struct tcs *pTcs;
693 	int s;
694 
695 	s = splbio();
696 
697 	if (pScb->SCB_Xs != NULL)
698 		timeout_del(&pScb->SCB_Xs->stimeout);
699 
700 	if (pScb == sc->HCS_ActScb)
701 		sc->HCS_ActScb = NULL;
702 
703 	pTcs = pScb->SCB_Tcs;
704 
705 	if (pScb->SCB_TagMsg != 0) {
706 		if (pTcs->TCS_TagCnt)
707 			pTcs->TCS_TagCnt--;
708 	} else if (pTcs->TCS_NonTagScb == pScb)
709 		pTcs->TCS_NonTagScb = NULL;
710 
711 	pScb->SCB_Status = STATUS_QUEUED;
712 	pScb->SCB_HaStat = hastat;
713 
714 	TAILQ_INSERT_TAIL(&sc->HCS_DoneScb, pScb, SCB_ScbList);
715 
716 	splx(s);
717 }
718 
719 struct iha_scb *
720 iha_pop_done_scb(sc)
721 	struct iha_softc *sc;
722 {
723 	struct iha_scb *pScb;
724 	int s;
725 
726 	s = splbio();
727 
728 	pScb = TAILQ_FIRST(&sc->HCS_DoneScb);
729 
730 	if (pScb != NULL) {
731 		pScb->SCB_Status = STATUS_RENT;
732 		TAILQ_REMOVE(&sc->HCS_DoneScb, pScb, SCB_ScbList);
733 	}
734 
735 	splx(s);
736 
737 	return (pScb);
738 }
739 
740 /*
741  * iha_abort_xs - find the SCB associated with the supplied xs and
742  *                stop all processing on it, moving it to the done
743  *                queue with the supplied host status value.
744  */
745 void
746 iha_abort_xs(sc, xs, hastat)
747 	struct iha_softc *sc;
748 	struct scsi_xfer *xs;
749 	u_int8_t hastat;
750 {
751 	struct iha_scb *pScb, *next;
752 	int i, s;
753 
754 	s = splbio();
755 
756 	/* Check the pending queue for the SCB pointing to xs */
757 
758 	for (pScb = TAILQ_FIRST(&sc->HCS_PendScb); pScb != NULL; pScb = next) {
759 		next = TAILQ_NEXT(pScb, SCB_ScbList);
760 		if (pScb->SCB_Xs == xs) {
761 			TAILQ_REMOVE(&sc->HCS_PendScb, pScb, SCB_ScbList);
762 			iha_append_done_scb(sc, pScb, hastat);
763 			splx(s);
764 			return;
765 		}
766 	}
767 
768 	/*
769 	 * If that didn't work, check all BUSY/SELECTING SCB's for one
770 	 * pointing to xs
771 	 */
772 
773 	for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++)
774 		switch (pScb->SCB_Status) {
775 		case STATUS_BUSY:
776 		case STATUS_SELECT:
777 			if (pScb->SCB_Xs == xs) {
778 				iha_append_done_scb(sc, pScb, hastat);
779 				splx(s);
780 				return;
781 			}
782 			break;
783 		default:
784 			break;
785 		}
786 
787 	splx(s);
788 }
789 
790 /*
791  * iha_bad_seq - a SCSI bus phase was encountered out of the
792  *               correct/expected sequence. Reset the SCSI bus.
793  */
794 void
795 iha_bad_seq(sc)
796 	struct iha_softc *sc;
797 {
798 	struct iha_scb *pScb = sc->HCS_ActScb;
799 
800 	if (pScb != NULL)
801 		iha_append_done_scb(sc, pScb, HOST_BAD_PHAS);
802 
803 	iha_reset_scsi_bus(sc);
804 	iha_reset_chip(sc, sc->sc_iot, sc->sc_ioh);
805 }
806 
807 /*
808  * iha_push_sense_request - obtain auto sense data by pushing the
809  *                          SCB needing it back onto the pending
810  *			    queue with a REQUEST_SENSE CDB.
811  */
812 int
813 iha_push_sense_request(sc, pScb)
814 	struct iha_softc *sc;
815 	struct iha_scb *pScb;
816 {
817 	struct scsi_sense *sensecmd;
818 	int error;
819 
820 	/* First sync & unload any existing DataDma and SGDma maps */
821 	if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) {
822 		bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
823 			0, pScb->SCB_BufChars,
824 			((pScb->SCB_Flags & SCSI_DATA_IN) ?
825 				BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
826 		bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma);
827 		/* Don't unload this map again until it is reloaded */
828 		pScb->SCB_Flags &= ~(SCSI_DATA_IN | SCSI_DATA_OUT);
829 	}
830 	if ((pScb->SCB_Flags & FLAG_SG) != 0) {
831 		bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
832 			0, sizeof(pScb->SCB_SGList),
833 			BUS_DMASYNC_POSTWRITE);
834 		bus_dmamap_unload(sc->sc_dmat, pScb->SCB_SGDma);
835 		/* Don't unload this map again until it is reloaded */
836 		pScb->SCB_Flags &= ~FLAG_SG;
837 	}
838 
839 	pScb->SCB_BufChars     = sizeof(pScb->SCB_ScsiSenseData);
840 	pScb->SCB_BufCharsLeft = sizeof(pScb->SCB_ScsiSenseData);
841 	bzero(&pScb->SCB_ScsiSenseData, sizeof(pScb->SCB_ScsiSenseData));
842 
843 	error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_DataDma,
844 			&pScb->SCB_ScsiSenseData,
845 			sizeof(pScb->SCB_ScsiSenseData), NULL,
846 			(pScb->SCB_Flags & SCSI_NOSLEEP) ?
847 				BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
848 	if (error) {
849 		sc_print_addr(pScb->SCB_Xs->sc_link);
850 		printf("error %d loading request sense buffer dma map\n",
851 			error);
852 		return (error);
853 	}
854 	bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
855 		0, pScb->SCB_BufChars, BUS_DMASYNC_PREREAD);
856 
857 	/* Save _POLL and _NOSLEEP flags. */
858 	pScb->SCB_Flags &= SCSI_POLL | SCSI_NOSLEEP;
859 	pScb->SCB_Flags |= FLAG_RSENS | SCSI_DATA_IN;
860 
861 	error = iha_setup_sg_list(sc, pScb);
862 	if (error)
863 		return (error);
864 
865 	pScb->SCB_Ident &= ~MSG_IDENTIFY_DISCFLAG;
866 
867 	pScb->SCB_TagMsg = 0;
868 	pScb->SCB_TaStat = SCSI_OK;
869 
870 	bzero(pScb->SCB_CDB, sizeof(pScb->SCB_CDB));
871 
872 	sensecmd = (struct scsi_sense *)pScb->SCB_CDB;
873 	pScb->SCB_CDBLen = sizeof(*sensecmd);
874 	sensecmd->opcode = REQUEST_SENSE;
875 	sensecmd->byte2  = pScb->SCB_Xs->sc_link->lun << 5;
876 	sensecmd->length = sizeof(pScb->SCB_ScsiSenseData);
877 
878 	if ((pScb->SCB_Flags & SCSI_POLL) == 0)
879 		timeout_add_msec(&pScb->SCB_Xs->stimeout,
880 		    pScb->SCB_Xs->timeout);
881 
882 	iha_push_pend_scb(sc, pScb);
883 
884 	return (0);
885 }
886 
887 /*
888  * iha_main - process the active SCB, taking one off pending and making it
889  *            active if necessary, and any done SCB's created as
890  *            a result until there are no interrupts pending and no pending
891  *            SCB's that can be started.
892  */
893 void
894 iha_main(sc, iot, ioh)
895 	struct iha_softc  *sc;
896 	bus_space_tag_t	   iot;
897 	bus_space_handle_t ioh;
898 {
899 	struct iha_scb *pScb;
900 
901 	for (;;) {
902 iha_scsi_label:
903 		iha_scsi(sc, iot, ioh);
904 
905 		while ((pScb = iha_pop_done_scb(sc)) != NULL) {
906 
907 			switch (pScb->SCB_TaStat) {
908 			case SCSI_TERMINATED:
909 			case SCSI_ACA_ACTIVE:
910 			case SCSI_CHECK:
911 				pScb->SCB_Tcs->TCS_Flags &=
912 				    ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE);
913 
914 				if ((pScb->SCB_Flags & FLAG_RSENS) != 0)
915 					/* Check condition on check condition*/
916 					pScb->SCB_HaStat = HOST_BAD_PHAS;
917 				else if (iha_push_sense_request(sc, pScb) != 0)
918 					/* Could not push sense request */
919 					pScb->SCB_HaStat = HOST_BAD_PHAS;
920 				else
921 					/* REQUEST SENSE ready to process */
922 					goto iha_scsi_label;
923 				break;
924 
925 			default:
926 				if ((pScb->SCB_Flags & FLAG_RSENS) != 0)
927 					/*
928 					 * Return the original SCSI_CHECK, not
929 					 * the status of the request sense
930 					 * command!
931 					 */
932 					pScb->SCB_TaStat = SCSI_CHECK;
933 				break;
934 			}
935 
936 			iha_done_scb(sc, pScb);
937 		}
938 
939 		/*
940 		 * If there are no interrupts pending, or we can't start
941 		 * a pending sc, break out of the for(;;). Otherwise
942 		 * continue the good work with another call to
943 		 * iha_scsi().
944 		 */
945 		if (((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0)
946 		    && (iha_find_pend_scb(sc) == NULL))
947 			break;
948 	}
949 }
950 
951 /*
952  * iha_scsi - service any outstanding interrupts. If there are none, try to
953  *            start another SCB currently in the pending queue.
954  */
955 void
956 iha_scsi(sc, iot, ioh)
957 	struct iha_softc  *sc;
958 	bus_space_tag_t	   iot;
959 	bus_space_handle_t ioh;
960 {
961 	struct iha_scb *pScb;
962 	struct tcs *pTcs;
963 	u_int8_t stat;
964 	int i;
965 
966 	/* service pending interrupts asap */
967 
968 	stat = bus_space_read_1(iot, ioh, TUL_STAT0);
969 	if ((stat & INTPD) != 0) {
970 		sc->HCS_JSStatus0 = stat;
971 		sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1);
972 		sc->HCS_JSInt     = bus_space_read_1(iot, ioh, TUL_SISTAT);
973 
974 		sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK;
975 
976 		if ((sc->HCS_JSInt & SRSTD) != 0) {
977 			iha_reset_scsi_bus(sc);
978 			return;
979 		}
980 
981 		if ((sc->HCS_JSInt & RSELED) != 0) {
982 			iha_resel(sc, iot, ioh);
983 			return;
984 		}
985 
986 		if ((sc->HCS_JSInt & (STIMEO | DISCD)) != 0) {
987 			iha_busfree(sc, iot, ioh);
988 			return;
989 		}
990 
991 		if ((sc->HCS_JSInt & (SCMDN | SBSRV)) != 0) {
992 			iha_next_state(sc, iot, ioh);
993 			return;
994 		}
995 
996 		if ((sc->HCS_JSInt & SELED) != 0)
997 			iha_set_ssig(iot, ioh, 0, 0);
998 	}
999 
1000 	/*
1001 	 * There were no interrupts pending which required action elsewhere, so
1002 	 * see if it is possible to start the selection phase on a pending SCB
1003 	 */
1004 	if ((pScb = iha_find_pend_scb(sc)) == NULL)
1005 		return;
1006 
1007 	pTcs = pScb->SCB_Tcs;
1008 
1009 	/* program HBA's SCSI ID & target SCSI ID */
1010 	bus_space_write_1(iot, ioh, TUL_SID,
1011 	    (sc->sc_link.adapter_target << 4) | pScb->SCB_Target);
1012 
1013 	if ((pScb->SCB_Flags & SCSI_RESET) == 0) {
1014 		bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period);
1015 
1016 		if (((pTcs->TCS_Flags & FLAG_NO_NEG_WIDE) == 0)
1017 		    ||
1018 		    ((pTcs->TCS_Flags & FLAG_NO_NEG_SYNC) == 0))
1019 			iha_select(sc, iot, ioh, pScb, SELATNSTOP);
1020 
1021 		else if (pScb->SCB_TagMsg != 0)
1022 			iha_select(sc, iot, ioh, pScb, SEL_ATN3);
1023 
1024 		else
1025 			iha_select(sc, iot, ioh, pScb, SEL_ATN);
1026 
1027 	} else {
1028 		iha_select(sc, iot, ioh, pScb, SELATNSTOP);
1029 		pScb->SCB_NxtStat = 8;
1030 	}
1031 
1032 	if ((pScb->SCB_Flags & SCSI_POLL) != 0) {
1033 		for (i = pScb->SCB_Xs->timeout; i > 0; i--) {
1034 			if (iha_wait(sc, iot, ioh, NO_OP) == -1)
1035 				break;
1036 			if (iha_next_state(sc, iot, ioh) == -1)
1037 				break;
1038 			delay(1000); /* Only happens in boot, so it's ok */
1039 		}
1040 
1041 		/*
1042 		 * Since done queue processing not done until AFTER this
1043 		 * function returns, pScb is on the done queue, not
1044 		 * the free queue at this point and still has valid data
1045 		 *
1046 		 * Conversely, xs->error has not been set yet
1047 		 */
1048 		if (i == 0)
1049 			iha_timeout(pScb);
1050 
1051 		else if ((pScb->SCB_CDB[0] == INQUIRY)
1052 		    && (pScb->SCB_Lun == 0)
1053 		    && (pScb->SCB_HaStat == HOST_OK)
1054 		    && (pScb->SCB_TaStat == SCSI_OK))
1055 			iha_print_info(sc, pScb->SCB_Target);
1056 	}
1057 }
1058 
1059 /*
1060  * iha_data_over_run - return HOST_OK for all SCSI opcodes where BufCharsLeft
1061  *                     is an 'Allocation Length'. All other SCSI opcodes
1062  *		       get HOST_DO_DU as they SHOULD have xferred all the
1063  *		       data requested.
1064  *
1065  *		       The list of opcodes using 'Allocation Length' was
1066  * 		       found by scanning all the SCSI-3 T10 drafts. See
1067  *		       www.t10.org for the curious with a .pdf reader.
1068  */
1069 u_int8_t
1070 iha_data_over_run(pScb)
1071 	struct iha_scb *pScb;
1072 {
1073 	switch (pScb->SCB_CDB[0]) {
1074 	case 0x03: /* Request Sense                   SPC-2 */
1075 	case 0x12: /* Inquiry                         SPC-2 */
1076 	case 0x1a: /* Mode Sense (6 byte version)     SPC-2 */
1077 	case 0x1c: /* Receive Diagnostic Results      SPC-2 */
1078 	case 0x23: /* Read Format Capacities          MMC-2 */
1079 	case 0x29: /* Read Generation                 SBC   */
1080 	case 0x34: /* Read Position                   SSC-2 */
1081 	case 0x37: /* Read Defect Data                SBC   */
1082 	case 0x3c: /* Read Buffer                     SPC-2 */
1083 	case 0x42: /* Read Sub Channel                MMC-2 */
1084 	case 0x43: /* Read TOC/PMA/ATIP               MMC   */
1085 
1086 	/* XXX - 2 with same opcode of 0x44? */
1087 	case 0x44: /* Read Header/Read Density Suprt  MMC/SSC*/
1088 
1089 	case 0x46: /* Get Configuration               MMC-2 */
1090 	case 0x4a: /* Get Event/Status Notification   MMC-2 */
1091 	case 0x4d: /* Log Sense                       SPC-2 */
1092 	case 0x51: /* Read Disc Information           MMC   */
1093 	case 0x52: /* Read Track Information          MMC   */
1094 	case 0x59: /* Read Master CUE                 MMC   */
1095 	case 0x5a: /* Mode Sense (10 byte version)    SPC-2 */
1096 	case 0x5c: /* Read Buffer Capacity            MMC   */
1097 	case 0x5e: /* Persistent Reserve In           SPC-2 */
1098 	case 0x84: /* Receive Copy Results            SPC-2 */
1099 	case 0xa0: /* Report LUNs                     SPC-2 */
1100 	case 0xa3: /* Various Report requests         SBC-2/SCC-2*/
1101 	case 0xa4: /* Report Key                      MMC-2 */
1102 	case 0xad: /* Read DVD Structure              MMC-2 */
1103 	case 0xb4: /* Read Element Status (Attached)  SMC   */
1104 	case 0xb5: /* Request Volume Element Address  SMC   */
1105 	case 0xb7: /* Read Defect Data (12 byte ver.) SBC   */
1106 	case 0xb8: /* Read Element Status (Independ.) SMC   */
1107 	case 0xba: /* Report Redundancy               SCC-2 */
1108 	case 0xbd: /* Mechanism Status                MMC   */
1109 	case 0xbe: /* Report Basic Redundancy         SCC-2 */
1110 
1111 		return (HOST_OK);
1112 		break;
1113 
1114 	default:
1115 		return (HOST_DO_DU);
1116 		break;
1117 	}
1118 }
1119 
1120 /*
1121  * iha_next_state - process the current SCB as requested in its
1122  *                  SCB_NxtStat member.
1123  */
1124 int
1125 iha_next_state(sc, iot, ioh)
1126 	struct iha_softc  *sc;
1127 	bus_space_tag_t	   iot;
1128 	bus_space_handle_t ioh;
1129 {
1130 	if (sc->HCS_ActScb == NULL)
1131 		return (-1);
1132 
1133 	switch (sc->HCS_ActScb->SCB_NxtStat) {
1134 	case 1:
1135 		if (iha_state_1(sc, iot, ioh) == 3)
1136 			goto state_3;
1137 		break;
1138 
1139 	case 2:
1140 		switch (iha_state_2(sc, iot, ioh)) {
1141 		case 3:	 goto state_3;
1142 		case 4:	 goto state_4;
1143 		default: break;
1144 		}
1145 		break;
1146 
1147 	case 3:
1148 	state_3:
1149 		if (iha_state_3(sc, iot, ioh) == 4)
1150 			goto state_4;
1151 		break;
1152 
1153 	case 4:
1154 	state_4:
1155 		switch (iha_state_4(sc, iot, ioh)) {
1156 		case 0:	 return (0);
1157 		case 6:	 goto state_6;
1158 		default: break;
1159 		}
1160 		break;
1161 
1162 	case 5:
1163 		switch (iha_state_5(sc, iot, ioh)) {
1164 		case 4:	 goto state_4;
1165 		case 6:	 goto state_6;
1166 		default: break;
1167 		}
1168 		break;
1169 
1170 	case 6:
1171 	state_6:
1172 		iha_state_6(sc, iot, ioh);
1173 		break;
1174 
1175 	case 8:
1176 		iha_state_8(sc, iot, ioh);
1177 		break;
1178 
1179 	default:
1180 #ifdef IHA_DEBUG_STATE
1181 		sc_print_addr(sc->HCS_ActScb->SCB_Xs->sc_link);
1182 		printf("[debug] -unknown state: %i-\n",
1183 		    sc->HCS_ActScb->SCB_NxtStat);
1184 #endif
1185 		iha_bad_seq(sc);
1186 		break;
1187 	}
1188 
1189 	return (-1);
1190 }
1191 
1192 /*
1193  * iha_state_1 - selection is complete after a SELATNSTOP. If the target
1194  *               has put the bus into MSG_OUT phase start wide/sync
1195  *               negotiation. Otherwise clear the FIFO and go to state 3,
1196  *	    	 which will send the SCSI CDB to the target.
1197  */
1198 int
1199 iha_state_1(sc, iot, ioh)
1200 	struct iha_softc  *sc;
1201 	bus_space_tag_t	   iot;
1202 	bus_space_handle_t ioh;
1203 {
1204 	struct iha_scb *pScb = sc->HCS_ActScb;
1205 	struct tcs *pTcs;
1206 	u_int16_t flags;
1207 
1208 	iha_mark_busy_scb(pScb);
1209 
1210 	pTcs = pScb->SCB_Tcs;
1211 
1212 	bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0);
1213 
1214 	/*
1215 	 * If we are in PHASE_MSG_OUT, send
1216 	 *     a) IDENT message (with tags if appropriate)
1217 	 *     b) WDTR if the target is configured to negotiate wide xfers
1218 	 *     ** OR **
1219 	 *     c) SDTR if the target is configured to negotiate sync xfers
1220 	 *	  but not wide ones
1221 	 *
1222 	 * If we are NOT, then the target is not asking for anything but
1223 	 * the data/command, so go straight to state 3.
1224 	 */
1225 	if (sc->HCS_Phase == PHASE_MSG_OUT) {
1226 		bus_space_write_1(iot, ioh, TUL_SCTRL1, (ESBUSIN | EHRSL));
1227 		bus_space_write_1(iot, ioh, TUL_SFIFO,	pScb->SCB_Ident);
1228 
1229 		if (pScb->SCB_TagMsg != 0) {
1230 			bus_space_write_1(iot, ioh, TUL_SFIFO,
1231 			    pScb->SCB_TagMsg);
1232 			bus_space_write_1(iot, ioh, TUL_SFIFO,
1233 			    pScb->SCB_TagId);
1234 		}
1235 
1236 		flags = pTcs->TCS_Flags;
1237 		if ((flags & FLAG_NO_NEG_WIDE) == 0) {
1238 			if (iha_msgout_wdtr(sc, iot, ioh) == -1)
1239 				return (-1);
1240 		} else if ((flags & FLAG_NO_NEG_SYNC) == 0) {
1241 			if (iha_msgout_sdtr(sc, iot, ioh) == -1)
1242 				return (-1);
1243 		}
1244 
1245 	} else {
1246 		bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1247 		iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0);
1248 	}
1249 
1250 	return (3);
1251 }
1252 
1253 /*
1254  * iha_state_2 - selection is complete after a SEL_ATN or SEL_ATN3. If the SCSI
1255  *		 CDB has already been send, go to state 4 to start the data
1256  *               xfer. Otherwise reset the FIFO and go to state 3, sending
1257  *		 the SCSI CDB.
1258  */
1259 int
1260 iha_state_2(sc, iot, ioh)
1261 	struct iha_softc  *sc;
1262 	bus_space_tag_t	   iot;
1263 	bus_space_handle_t ioh;
1264 {
1265 	struct iha_scb *pScb = sc->HCS_ActScb;
1266 
1267 	iha_mark_busy_scb(pScb);
1268 
1269 	bus_space_write_1(iot, ioh, TUL_SCONFIG0, pScb->SCB_Tcs->TCS_SConfig0);
1270 
1271 	if ((sc->HCS_JSStatus1 & CPDNE) != 0)
1272 		return (4);
1273 
1274 	bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1275 
1276 	iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0);
1277 
1278 	return (3);
1279 }
1280 
1281 /*
1282  * iha_state_3 - send the SCSI CDB to the target, processing any status
1283  *		 or other messages received until that is done or
1284  *               abandoned.
1285  */
1286 int
1287 iha_state_3(sc, iot, ioh)
1288 	struct iha_softc  *sc;
1289 	bus_space_tag_t	   iot;
1290 	bus_space_handle_t ioh;
1291 {
1292 	struct iha_scb *pScb = sc->HCS_ActScb;
1293 	u_int16_t flags;
1294 
1295 	for (;;)
1296 		switch (sc->HCS_Phase) {
1297 		case PHASE_CMD_OUT:
1298 			bus_space_write_multi_1(iot, ioh, TUL_SFIFO,
1299 			    pScb->SCB_CDB, pScb->SCB_CDBLen);
1300 			if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1)
1301 				return (-1);
1302 			else if (sc->HCS_Phase == PHASE_CMD_OUT) {
1303 				iha_bad_seq(sc);
1304 				return (-1);
1305 			} else
1306 				return (4);
1307 
1308 		case PHASE_MSG_IN:
1309 			pScb->SCB_NxtStat = 3;
1310 			if (iha_msgin(sc, iot, ioh) == -1)
1311 				return (-1);
1312 			break;
1313 
1314 		case PHASE_STATUS_IN:
1315 			if (iha_status_msg(sc, iot, ioh) == -1)
1316 				return (-1);
1317 			break;
1318 
1319 		case PHASE_MSG_OUT:
1320 			flags = pScb->SCB_Tcs->TCS_Flags;
1321 			if ((flags & FLAG_NO_NEG_SYNC) != 0) {
1322 				if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1)
1323 					return (-1);
1324 			} else if (iha_msgout_sdtr(sc, iot, ioh) == -1)
1325 				return (-1);
1326 			break;
1327 
1328 		default:
1329 #ifdef IHA_DEBUG_STATE
1330 			sc_print_addr(pScb->SCB_Xs->sc_link);
1331 			printf("[debug] -s3- bad phase = %d\n", sc->HCS_Phase);
1332 #endif
1333 			iha_bad_seq(sc);
1334 			return (-1);
1335 		}
1336 }
1337 
1338 /*
1339  * iha_state_4 - start a data xfer. Handle any bus state
1340  *               transitions until PHASE_DATA_IN/_OUT
1341  *               or the attempt is abandoned. If there is
1342  *               no data to xfer, go to state 6 and finish
1343  *               processing the current SCB.
1344  */
1345 int
1346 iha_state_4(sc, iot, ioh)
1347 	struct iha_softc  *sc;
1348 	bus_space_tag_t	   iot;
1349 	bus_space_handle_t ioh;
1350 {
1351 	struct iha_scb *pScb = sc->HCS_ActScb;
1352 
1353 	if ((pScb->SCB_Flags & FLAG_DIR) == FLAG_DIR)
1354 		return (6); /* Both dir flags set => NO xfer was requested */
1355 
1356 	for (;;) {
1357 		if (pScb->SCB_BufCharsLeft == 0)
1358 			return (6);
1359 
1360 		switch (sc->HCS_Phase) {
1361 		case PHASE_STATUS_IN:
1362 			if ((pScb->SCB_Flags & FLAG_DIR) != 0)
1363 				pScb->SCB_HaStat = iha_data_over_run(pScb);
1364 			if ((iha_status_msg(sc, iot, ioh)) == -1)
1365 				return (-1);
1366 			break;
1367 
1368 		case PHASE_MSG_IN:
1369 			pScb->SCB_NxtStat = 4;
1370 			if (iha_msgin(sc, iot, ioh) == -1)
1371 				return (-1);
1372 			break;
1373 
1374 		case PHASE_MSG_OUT:
1375 			if ((sc->HCS_JSStatus0 & SPERR) != 0) {
1376 				pScb->SCB_BufCharsLeft = 0;
1377 				pScb->SCB_HaStat = HOST_SPERR;
1378 				if (iha_msgout(sc, iot, ioh,
1379 					MSG_INITIATOR_DET_ERR) == -1)
1380 					return (-1);
1381 				else
1382 					return (6);
1383 			} else {
1384 				if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1)
1385 					return (-1);
1386 			}
1387 			break;
1388 
1389 		case PHASE_DATA_IN:
1390 			return (iha_xfer_data(pScb, iot, ioh, SCSI_DATA_IN));
1391 
1392 		case PHASE_DATA_OUT:
1393 			return (iha_xfer_data(pScb, iot, ioh, SCSI_DATA_OUT));
1394 
1395 		default:
1396 			iha_bad_seq(sc);
1397 			return (-1);
1398 		}
1399 	}
1400 }
1401 
1402 /*
1403  * iha_state_5 - handle the partial or final completion of the current
1404  *               data xfer. If DMA is still active stop it. If there is
1405  *		 more data to xfer, go to state 4 and start the xfer.
1406  *               If not go to state 6 and finish the SCB.
1407  */
1408 int
1409 iha_state_5(sc, iot, ioh)
1410 	struct iha_softc  *sc;
1411 	bus_space_tag_t	   iot;
1412 	bus_space_handle_t ioh;
1413 {
1414 	struct iha_scb *pScb = sc->HCS_ActScb;
1415 	struct iha_sg_element *pSg;
1416 	u_int32_t cnt;
1417 	u_int16_t period;
1418 	u_int8_t stat;
1419 	long xcnt;  /* cannot use unsigned!! see code: if (xcnt < 0) */
1420 
1421 	cnt = bus_space_read_4(iot, ioh, TUL_STCNT0) & TCNT;
1422 
1423 	/*
1424 	 * Stop any pending DMA activity and check for parity error.
1425 	 */
1426 
1427 	if ((bus_space_read_1(iot, ioh, TUL_DCMD) & XDIR) != 0) {
1428 		/* Input Operation */
1429 		if ((sc->HCS_JSStatus0 & SPERR) != 0)
1430 			pScb->SCB_HaStat = HOST_SPERR;
1431 
1432 		if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) {
1433 			bus_space_write_1(iot, ioh, TUL_DCTRL0,
1434 			    bus_space_read_1(iot, ioh, TUL_DCTRL0) | SXSTP);
1435 			while (bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND)
1436 				;
1437 		}
1438 
1439 	} else {
1440 		/* Output Operation */
1441 		if ((sc->HCS_JSStatus1 & SXCMP) == 0) {
1442 			period = pScb->SCB_Tcs->TCS_JS_Period;
1443 			if ((period & PERIOD_WIDE_SCSI) != 0)
1444 				cnt += (bus_space_read_1(iot, ioh,
1445 					    TUL_SFIFOCNT) & FIFOC) << 1;
1446 			else
1447 				cnt += (bus_space_read_1(iot, ioh,
1448 					    TUL_SFIFOCNT) & FIFOC);
1449 		}
1450 
1451 		if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) {
1452 			bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR);
1453 			do
1454 				stat = bus_space_read_1(iot, ioh, TUL_ISTUS0);
1455 			while ((stat & DABT) == 0);
1456 		}
1457 
1458 		if ((cnt == 1) && (sc->HCS_Phase == PHASE_DATA_OUT)) {
1459 			if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1)
1460 				return (-1);
1461 			cnt = 0;
1462 
1463 		} else if ((sc->HCS_JSStatus1 & SXCMP) == 0)
1464 			bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1465 	}
1466 
1467 	if (cnt == 0) {
1468 		pScb->SCB_BufCharsLeft = 0;
1469 		return (6);
1470 	}
1471 
1472 	/* Update active data pointer and restart the I/O at the new point */
1473 
1474 	xcnt = pScb->SCB_BufCharsLeft - cnt;	/* xcnt == bytes xferred */
1475 	pScb->SCB_BufCharsLeft = cnt;		/* cnt  == bytes left    */
1476 
1477 	bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
1478 		0, sizeof(pScb->SCB_SGList), BUS_DMASYNC_POSTWRITE);
1479 
1480 	if ((pScb->SCB_Flags & FLAG_SG) != 0) {
1481 		pSg = &pScb->SCB_SGList[pScb->SCB_SGIdx];
1482 		for (; pScb->SCB_SGIdx < pScb->SCB_SGCount; pSg++, pScb->SCB_SGIdx++) {
1483 			xcnt -= pSg->SG_Len;
1484 			if (xcnt < 0) {
1485 				xcnt += pSg->SG_Len;
1486 
1487 				pSg->SG_Addr += xcnt;
1488 				pSg->SG_Len -= xcnt;
1489 
1490 				bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
1491 					0, sizeof(pScb->SCB_SGList),
1492 					BUS_DMASYNC_PREWRITE);
1493 
1494 				return (4);
1495 			}
1496 		}
1497 		return (6);
1498 
1499 	}
1500 
1501 	return (4);
1502 }
1503 
1504 /*
1505  * iha_state_6 - finish off the active scb (may require several
1506  *               iterations if PHASE_MSG_IN) and return -1 to indicate
1507  *		 the bus is free.
1508  */
1509 int
1510 iha_state_6(sc, iot, ioh)
1511 	struct iha_softc  *sc;
1512 	bus_space_tag_t	   iot;
1513 	bus_space_handle_t ioh;
1514 {
1515 	for (;;)
1516 		switch (sc->HCS_Phase) {
1517 		case PHASE_STATUS_IN:
1518 			if (iha_status_msg(sc, iot, ioh) == -1)
1519 				return (-1);
1520 			break;
1521 
1522 		case PHASE_MSG_IN:
1523 			sc->HCS_ActScb->SCB_NxtStat = 6;
1524 			if ((iha_msgin(sc, iot, ioh)) == -1)
1525 				return (-1);
1526 			break;
1527 
1528 		case PHASE_MSG_OUT:
1529 			if ((iha_msgout(sc, iot, ioh, MSG_NOOP)) == -1)
1530 				return (-1);
1531 			break;
1532 
1533 		case PHASE_DATA_IN:
1534 			if (iha_xpad_in(sc, iot, ioh) == -1)
1535 				return (-1);
1536 			break;
1537 
1538 		case PHASE_DATA_OUT:
1539 			if (iha_xpad_out(sc, iot, ioh) == -1)
1540 				return (-1);
1541 			break;
1542 
1543 		default:
1544 			iha_bad_seq(sc);
1545 			return (-1);
1546 		}
1547 }
1548 
1549 /*
1550  * iha_state_8 - reset the active device and all busy SCBs using it
1551  */
1552 int
1553 iha_state_8(sc, iot, ioh)
1554 	struct iha_softc  *sc;
1555 	bus_space_tag_t	   iot;
1556 	bus_space_handle_t ioh;
1557 {
1558 	struct iha_scb *pScb;
1559 	u_int32_t i;
1560 	u_int8_t tar;
1561 
1562 	if (sc->HCS_Phase == PHASE_MSG_OUT) {
1563 		bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_BUS_DEV_RESET);
1564 
1565 		pScb = sc->HCS_ActScb;
1566 
1567 		/* This SCB finished correctly -- resetting the device */
1568 		iha_append_done_scb(sc, pScb, HOST_OK);
1569 
1570 		iha_reset_tcs(pScb->SCB_Tcs, sc->HCS_SConf1);
1571 
1572 		tar = pScb->SCB_Target;
1573 		for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++)
1574 			if (pScb->SCB_Target == tar)
1575 				switch (pScb->SCB_Status) {
1576 				case STATUS_BUSY:
1577 					iha_append_done_scb(sc,
1578 					    pScb, HOST_DEV_RST);
1579 					break;
1580 
1581 				case STATUS_SELECT:
1582 					iha_push_pend_scb(sc, pScb);
1583 					break;
1584 
1585 				default:
1586 					break;
1587 				}
1588 
1589 		sc->HCS_Flags |= FLAG_EXPECT_DISC;
1590 
1591 		if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1)
1592 			return (-1);
1593 	}
1594 
1595 	iha_bad_seq(sc);
1596 	return (-1);
1597 }
1598 
1599 /*
1600  * iha_xfer_data - initiate the DMA xfer of the data
1601  */
1602 int
1603 iha_xfer_data(pScb, iot, ioh, direction)
1604 	struct iha_scb *pScb;
1605 	bus_space_tag_t	   iot;
1606 	bus_space_handle_t ioh;
1607 	int direction;
1608 {
1609 	u_int32_t xferaddr, xferlen;
1610 	u_int8_t xfertype;
1611 
1612 	if ((pScb->SCB_Flags & FLAG_DIR) != direction)
1613 		return (6); /* wrong direction, abandon I/O */
1614 
1615 	bus_space_write_4(iot, ioh, TUL_STCNT0, pScb->SCB_BufCharsLeft);
1616 
1617 	if ((pScb->SCB_Flags & FLAG_SG) == 0) {
1618 		xferaddr = pScb->SCB_DataDma->dm_segs[0].ds_addr
1619 				+ (pScb->SCB_BufChars - pScb->SCB_BufCharsLeft);
1620 		xferlen  = pScb->SCB_BufCharsLeft;
1621 		xfertype = (direction == SCSI_DATA_IN) ? ST_X_IN : ST_X_OUT;
1622 
1623 	} else {
1624 		xferaddr = pScb->SCB_SGDma->dm_segs[0].ds_addr
1625 				+ (pScb->SCB_SGIdx * sizeof(struct iha_sg_element));
1626 		xferlen  = (pScb->SCB_SGCount - pScb->SCB_SGIdx)
1627 				* sizeof(struct iha_sg_element);
1628 		xfertype = (direction == SCSI_DATA_IN) ? ST_SG_IN : ST_SG_OUT;
1629 	}
1630 
1631 	bus_space_write_4(iot, ioh, TUL_DXC,  xferlen);
1632 	bus_space_write_4(iot, ioh, TUL_DXPA, xferaddr);
1633 	bus_space_write_1(iot, ioh, TUL_DCMD, xfertype);
1634 
1635 	bus_space_write_1(iot, ioh, TUL_SCMD,
1636 	    (direction == SCSI_DATA_IN) ? XF_DMA_IN : XF_DMA_OUT);
1637 
1638 	pScb->SCB_NxtStat = 5;
1639 
1640 	return (0);
1641 }
1642 
1643 int
1644 iha_xpad_in(sc, iot, ioh)
1645 	struct iha_softc  *sc;
1646 	bus_space_tag_t	   iot;
1647 	bus_space_handle_t ioh;
1648 {
1649 	struct iha_scb *pScb = sc->HCS_ActScb;
1650 
1651 	if ((pScb->SCB_Flags & FLAG_DIR) != 0)
1652 		pScb->SCB_HaStat = HOST_DO_DU;
1653 
1654 	for (;;) {
1655 		if ((pScb->SCB_Tcs->TCS_JS_Period & PERIOD_WIDE_SCSI) != 0)
1656 			bus_space_write_4(iot, ioh, TUL_STCNT0, 2);
1657 		else
1658 			bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
1659 
1660 		switch (iha_wait(sc, iot, ioh, XF_FIFO_IN)) {
1661 		case -1:
1662 			return (-1);
1663 
1664 		case PHASE_DATA_IN:
1665 			bus_space_read_1(iot, ioh, TUL_SFIFO);
1666 			break;
1667 
1668 		default:
1669 			bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1670 			return (6);
1671 		}
1672 	}
1673 }
1674 
1675 int
1676 iha_xpad_out(sc, iot, ioh)
1677 	struct iha_softc  *sc;
1678 	bus_space_tag_t	   iot;
1679 	bus_space_handle_t ioh;
1680 {
1681 	struct iha_scb *pScb = sc->HCS_ActScb;
1682 
1683 	if ((pScb->SCB_Flags & FLAG_DIR) != 0)
1684 		pScb->SCB_HaStat = HOST_DO_DU;
1685 
1686 	for (;;) {
1687 		if ((pScb->SCB_Tcs->TCS_JS_Period & PERIOD_WIDE_SCSI) != 0)
1688 			bus_space_write_4(iot, ioh, TUL_STCNT0, 2);
1689 		else
1690 			bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
1691 
1692 		bus_space_write_1(iot, ioh, TUL_SFIFO, 0);
1693 
1694 		switch (iha_wait(sc, iot, ioh, XF_FIFO_OUT)) {
1695 		case -1:
1696 			return (-1);
1697 
1698 		case PHASE_DATA_OUT:
1699 			break;
1700 
1701 		default:
1702 			/* Disable wide CPU to allow read 16 bits */
1703 			bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL);
1704 			bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1705 			return (6);
1706 		}
1707 	}
1708 }
1709 
1710 int
1711 iha_status_msg(sc, iot, ioh)
1712 	struct iha_softc  *sc;
1713 	bus_space_tag_t	   iot;
1714 	bus_space_handle_t ioh;
1715 {
1716 	struct iha_scb *pScb;
1717 	u_int8_t msg;
1718 	int phase;
1719 
1720 	if ((phase = iha_wait(sc, iot, ioh, CMD_COMP)) == -1)
1721 		return (-1);
1722 
1723 	pScb = sc->HCS_ActScb;
1724 
1725 	pScb->SCB_TaStat = bus_space_read_1(iot, ioh, TUL_SFIFO);
1726 
1727 	if (phase == PHASE_MSG_OUT) {
1728 		if ((sc->HCS_JSStatus0 & SPERR) == 0)
1729 			bus_space_write_1(iot, ioh, TUL_SFIFO,
1730 			    MSG_NOOP);
1731 		else
1732 			bus_space_write_1(iot, ioh, TUL_SFIFO,
1733 			    MSG_PARITY_ERROR);
1734 
1735 		return (iha_wait(sc, iot, ioh, XF_FIFO_OUT));
1736 
1737 	} else if (phase == PHASE_MSG_IN) {
1738 		msg = bus_space_read_1(iot, ioh, TUL_SFIFO);
1739 
1740 		if ((sc->HCS_JSStatus0 & SPERR) != 0)
1741 			switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
1742 			case -1:
1743 				return (-1);
1744 			case PHASE_MSG_OUT:
1745 				bus_space_write_1(iot, ioh, TUL_SFIFO,
1746 				    MSG_PARITY_ERROR);
1747 				return (iha_wait(sc, iot, ioh, XF_FIFO_OUT));
1748 			default:
1749 				iha_bad_seq(sc);
1750 				return (-1);
1751 			}
1752 
1753 		if (msg == MSG_CMDCOMPLETE) {
1754 			if ((pScb->SCB_TaStat
1755 				& (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) {
1756 				iha_bad_seq(sc);
1757 				return (-1);
1758 			}
1759 			sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC;
1760 			bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1761 			return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
1762 		}
1763 
1764 		if ((msg == MSG_LINK_CMD_COMPLETE)
1765 		    || (msg == MSG_LINK_CMD_COMPLETEF)) {
1766 			if ((pScb->SCB_TaStat
1767 				 & (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM)
1768 				return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
1769 		}
1770 	}
1771 
1772 	iha_bad_seq(sc);
1773 	return (-1);
1774 }
1775 
1776 /*
1777  * iha_busfree - SCSI bus free detected as a result of a TIMEOUT or
1778  *		 DISCONNECT interrupt. Reset the tulip FIFO and
1779  *		 SCONFIG0 and enable hardware reselect. Move any active
1780  *		 SCB to HCS_DoneScb list. Return an appropriate host status
1781  *		 if an I/O was active.
1782  */
1783 void
1784 iha_busfree(sc, iot, ioh)
1785 	struct iha_softc  *sc;
1786 	bus_space_tag_t	   iot;
1787 	bus_space_handle_t ioh;
1788 {
1789 	struct iha_scb *pScb;
1790 
1791 	bus_space_write_1(iot, ioh, TUL_SCTRL0,	  RSFIFO);
1792 	bus_space_write_1(iot, ioh, TUL_SCONFIG0, SCONFIG0DEFAULT);
1793 	bus_space_write_1(iot, ioh, TUL_SCTRL1,	  EHRSL);
1794 
1795 	pScb = sc->HCS_ActScb;
1796 
1797 	if (pScb != NULL) {
1798 		if (pScb->SCB_Status == STATUS_SELECT)
1799 			/* selection timeout   */
1800 			iha_append_done_scb(sc, pScb, HOST_SEL_TOUT);
1801 		else
1802 			/* Unexpected bus free */
1803 			iha_append_done_scb(sc, pScb, HOST_BAD_PHAS);
1804 
1805 	}
1806 }
1807 
1808 void
1809 iha_reset_scsi_bus(sc)
1810 	struct iha_softc *sc;
1811 {
1812 	struct iha_scb *pScb;
1813 	struct tcs *pTcs;
1814 	int i, s;
1815 
1816 	s = splbio();
1817 
1818 	iha_reset_dma(sc->sc_iot, sc->sc_ioh);
1819 
1820 	for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++)
1821 		switch (pScb->SCB_Status) {
1822 		case STATUS_BUSY:
1823 			iha_append_done_scb(sc, pScb, HOST_SCSI_RST);
1824 			break;
1825 
1826 		case STATUS_SELECT:
1827 			iha_push_pend_scb(sc, pScb);
1828 			break;
1829 
1830 		default:
1831 			break;
1832 		}
1833 
1834 	for (i = 0, pTcs = sc->HCS_Tcs; i < IHA_MAX_TARGETS; i++, pTcs++)
1835 		iha_reset_tcs(pTcs, sc->HCS_SConf1);
1836 
1837 	splx(s);
1838 }
1839 
1840 /*
1841  * iha_resel - handle a detected SCSI bus reselection request.
1842  */
1843 int
1844 iha_resel(sc, iot, ioh)
1845 	struct iha_softc  *sc;
1846 	bus_space_tag_t	   iot;
1847 	bus_space_handle_t ioh;
1848 {
1849 	struct iha_scb *pScb;
1850 	struct tcs *pTcs;
1851 	u_int8_t tag, target, lun, msg, abortmsg;
1852 
1853 	if (sc->HCS_ActScb != NULL) {
1854 		if ((sc->HCS_ActScb->SCB_Status == STATUS_SELECT))
1855 			iha_push_pend_scb(sc, sc->HCS_ActScb);
1856 		sc->HCS_ActScb = NULL;
1857 	}
1858 
1859 	target = bus_space_read_1(iot, ioh, TUL_SBID);
1860 	lun    = bus_space_read_1(iot, ioh, TUL_SALVC) & MSG_IDENTIFY_LUNMASK;
1861 
1862 	pTcs = &sc->HCS_Tcs[target];
1863 
1864 	bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0);
1865 	bus_space_write_1(iot, ioh, TUL_SYNCM,	  pTcs->TCS_JS_Period);
1866 
1867 	abortmsg = MSG_ABORT; /* until a valid tag has been obtained */
1868 
1869 	if (pTcs->TCS_NonTagScb != NULL)
1870 		/* There is a non-tagged I/O active on the target */
1871 		pScb = pTcs->TCS_NonTagScb;
1872 
1873 	else {
1874 		/*
1875 		 * Since there is no active non-tagged operation
1876 		 * read the tag type, the tag itself, and find
1877 		 * the appropriate pScb by indexing HCS_Scb with
1878 		 * the tag.
1879 		 */
1880 
1881 		switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
1882 		case -1:
1883 			return (-1);
1884 		case PHASE_MSG_IN:
1885 			bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
1886 			if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1)
1887 				return (-1);
1888 			break;
1889 		default:
1890 			goto abort;
1891 		}
1892 
1893 		msg = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag Msg */
1894 
1895 		if ((msg < MSG_SIMPLE_Q_TAG) || (msg > MSG_ORDERED_Q_TAG))
1896 			goto abort;
1897 
1898 		switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
1899 		case -1:
1900 			return (-1);
1901 		case PHASE_MSG_IN:
1902 			bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
1903 			if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1)
1904 				return (-1);
1905 			break;
1906 		default:
1907 			goto abort;
1908 		}
1909 
1910 		tag  = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag ID */
1911 		pScb = &sc->HCS_Scb[tag];
1912 
1913 		abortmsg = MSG_ABORT_TAG; /* Now that we have valdid tag! */
1914 	}
1915 
1916 	if ((pScb->SCB_Target != target)
1917 	    || (pScb->SCB_Lun != lun)
1918 	    || (pScb->SCB_Status != STATUS_BUSY)) {
1919 abort:
1920 		iha_msgout_abort(sc, iot, ioh, abortmsg);
1921 		return (-1);
1922 	}
1923 
1924 	sc->HCS_ActScb = pScb;
1925 
1926 	if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == -1)
1927 		return (-1);
1928 
1929 	return(iha_next_state(sc, iot, ioh));
1930 }
1931 
1932 int
1933 iha_msgin(sc, iot, ioh)
1934 	struct iha_softc  *sc;
1935 	bus_space_tag_t	   iot;
1936 	bus_space_handle_t ioh;
1937 {
1938 	u_int16_t flags;
1939 	u_int8_t msg;
1940 	int phase;
1941 
1942 	for (;;) {
1943 		if ((bus_space_read_1(iot, ioh, TUL_SFIFOCNT) & FIFOC) > 0)
1944 			bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1945 
1946 		bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
1947 
1948 		phase = iha_wait(sc, iot, ioh, XF_FIFO_IN);
1949 		msg   = bus_space_read_1(iot, ioh, TUL_SFIFO);
1950 
1951 		switch (msg) {
1952 		case MSG_DISCONNECT:
1953 			sc->HCS_Flags |= FLAG_EXPECT_DISC;
1954 			if (iha_wait(sc, iot, ioh, MSG_ACCEPT) != -1)
1955 				iha_bad_seq(sc);
1956 			phase = -1;
1957 			break;
1958 		case MSG_SAVEDATAPOINTER:
1959 		case MSG_RESTOREPOINTERS:
1960 		case MSG_NOOP:
1961 			phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
1962 			break;
1963 		case MSG_MESSAGE_REJECT:
1964 			/* XXX - need to clear FIFO like other 'Clear ATN'?*/
1965 			iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0);
1966 			flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags;
1967 			if ((flags & FLAG_NO_NEG_SYNC) == 0)
1968 				iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
1969 			phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
1970 			break;
1971 		case MSG_EXTENDED:
1972 			phase = iha_msgin_extended(sc, iot, ioh);
1973 			break;
1974 		case MSG_IGN_WIDE_RESIDUE:
1975 			phase = iha_msgin_ignore_wid_resid(sc, iot, ioh);
1976 			break;
1977 		case MSG_CMDCOMPLETE:
1978 			sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC;
1979 			bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1980 			phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
1981 			if (phase != -1) {
1982 				iha_bad_seq(sc);
1983 				return (-1);
1984 			}
1985 			break;
1986 		default:
1987 #ifdef IHA_DEBUG_STATE
1988 			printf("[debug] iha_msgin: bad msg type: %d\n", msg);
1989 #endif
1990 			phase = iha_msgout_reject(sc, iot, ioh);
1991 			break;
1992 		}
1993 
1994 		if (phase != PHASE_MSG_IN)
1995 			return (phase);
1996 	}
1997 	/* NOTREACHED */
1998 }
1999 
2000 int
2001 iha_msgin_ignore_wid_resid(sc, iot, ioh)
2002 	struct iha_softc  *sc;
2003 	bus_space_tag_t	   iot;
2004 	bus_space_handle_t ioh;
2005 {
2006 	int phase;
2007 
2008 	phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2009 
2010 	if (phase == PHASE_MSG_IN) {
2011 		phase = iha_wait(sc, iot, ioh, XF_FIFO_IN);
2012 
2013 		if (phase != -1) {
2014 			bus_space_write_1(iot, ioh, TUL_SFIFO, 0);
2015 			bus_space_read_1 (iot, ioh, TUL_SFIFO);
2016 			bus_space_read_1 (iot, ioh, TUL_SFIFO);
2017 
2018 			phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2019 		}
2020 	}
2021 
2022 	return (phase);
2023 }
2024 
2025 int
2026 iha_msgin_extended(sc, iot, ioh)
2027 	struct iha_softc  *sc;
2028 	bus_space_tag_t	   iot;
2029 	bus_space_handle_t ioh;
2030 {
2031 	u_int16_t flags;
2032 	int i, phase, msglen, msgcode;
2033 
2034 	/* XXX - can we just stop reading and reject, or do we have to
2035 	 *	 read all input, discarding the excess, and then reject
2036 	 */
2037 	for (i = 0; i < IHA_MAX_EXTENDED_MSG; i++) {
2038 		phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2039 
2040 		if (phase != PHASE_MSG_IN)
2041 			return (phase);
2042 
2043 		bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
2044 
2045 		if (iha_wait(sc, iot, ioh, XF_FIFO_IN) == -1)
2046 			return (-1);
2047 
2048 		sc->HCS_Msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO);
2049 
2050 		if (sc->HCS_Msg[0] == i)
2051 			break;
2052 	}
2053 
2054 	msglen	= sc->HCS_Msg[0];
2055 	msgcode = sc->HCS_Msg[1];
2056 
2057 	if ((msglen == MSG_EXT_SDTR_LEN) && (msgcode == MSG_EXT_SDTR)) {
2058 		if (iha_msgin_sdtr(sc) == 0) {
2059 			iha_sync_done(sc, iot, ioh);
2060 			return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
2061 		}
2062 
2063 		iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
2064 
2065 		phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2066 		if (phase != PHASE_MSG_OUT)
2067 			return (phase);
2068 
2069 		/* Clear FIFO for important message - final SYNC offer */
2070 		bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
2071 
2072 		iha_sync_done(sc, iot, ioh); /* This is our final offer */
2073 
2074 	} else if ((msglen == MSG_EXT_WDTR_LEN) && (msgcode == MSG_EXT_WDTR)) {
2075 
2076 		flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags;
2077 
2078 		if ((flags & FLAG_NO_WIDE) != 0)
2079 			/* Offer 8 bit xfers only */
2080 			sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_8_BIT;
2081 
2082 		else if (sc->HCS_Msg[2] > MSG_EXT_WDTR_BUS_32_BIT)
2083 			return (iha_msgout_reject(sc, iot, ioh));
2084 
2085 		else if (sc->HCS_Msg[2] == MSG_EXT_WDTR_BUS_32_BIT)
2086 			/* Offer 16 instead */
2087 			sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_32_BIT;
2088 
2089 		else {
2090 			iha_wide_done(sc, iot, ioh);
2091 			if ((flags & FLAG_NO_NEG_SYNC) == 0)
2092 				iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
2093 			return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
2094 		}
2095 
2096 		iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
2097 
2098 		phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2099 		if (phase != PHASE_MSG_OUT)
2100 			return (phase);
2101 
2102 	} else
2103 		return (iha_msgout_reject(sc, iot, ioh));
2104 
2105 	/* Send message built in sc->HCS_Msg[] */
2106 	return (iha_msgout_extended(sc, iot, ioh));
2107 }
2108 
2109 /*
2110  * iha_msgin_sdtr - check SDTR msg in HCS_Msg. If the offer is
2111  *                  acceptable leave HCS_Msg as is and return 0.
2112  *                  If the negotiation must continue, modify HCS_Msg
2113  *                  as needed and return 1. Else return 0.
2114  */
2115 int
2116 iha_msgin_sdtr(sc)
2117 	struct iha_softc *sc;
2118 {
2119 	u_int16_t flags;
2120 	u_int8_t default_period;
2121 	int newoffer;
2122 
2123 	flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags;
2124 
2125 	default_period = iha_rate_tbl[flags & FLAG_SCSI_RATE];
2126 
2127 	if (sc->HCS_Msg[3] == 0) /* target offered async only. Accept it. */
2128 		return (0);
2129 
2130 	newoffer = 0;
2131 
2132 	if ((flags & FLAG_NO_SYNC) != 0) {
2133 		sc->HCS_Msg[3] = 0;
2134 		newoffer   = 1;
2135 	}
2136 
2137 	if (sc->HCS_Msg[3] > IHA_MAX_TARGETS-1) {
2138 		sc->HCS_Msg[3] = IHA_MAX_TARGETS-1;
2139 		newoffer   = 1;
2140 	}
2141 
2142 	if (sc->HCS_Msg[2] < default_period) {
2143 		sc->HCS_Msg[2] = default_period;
2144 		newoffer   = 1;
2145 	}
2146 
2147 	if (sc->HCS_Msg[2] >= 59) {
2148 		sc->HCS_Msg[3] = 0;
2149 		newoffer   = 1;
2150 	}
2151 
2152 	return (newoffer);
2153 }
2154 
2155 int
2156 iha_msgout(sc, iot, ioh, msg)
2157 	struct iha_softc  *sc;
2158 	bus_space_tag_t	   iot;
2159 	bus_space_handle_t ioh;
2160 	u_int8_t   msg;
2161 {
2162 	bus_space_write_1(iot, ioh, TUL_SFIFO, msg);
2163 
2164 	return (iha_wait(sc, iot, ioh, XF_FIFO_OUT));
2165 }
2166 
2167 void
2168 iha_msgout_abort(sc, iot, ioh,	aborttype)
2169 	struct iha_softc  *sc;
2170 	bus_space_tag_t	   iot;
2171 	bus_space_handle_t ioh;
2172 	u_int8_t	   aborttype;
2173 {
2174 	iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
2175 
2176 	switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
2177 	case -1:
2178 		break;
2179 
2180 	case PHASE_MSG_OUT:
2181 		sc->HCS_Flags |= FLAG_EXPECT_DISC;
2182 		if (iha_msgout(sc, iot, ioh, aborttype) != -1)
2183 			iha_bad_seq(sc);
2184 		break;
2185 
2186 	default:
2187 		iha_bad_seq(sc);
2188 		break;
2189 	}
2190 }
2191 
2192 int
2193 iha_msgout_reject(sc, iot, ioh)
2194 	struct iha_softc  *sc;
2195 	bus_space_tag_t	   iot;
2196 	bus_space_handle_t ioh;
2197 {
2198 	iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
2199 
2200 	if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == PHASE_MSG_OUT)
2201 		return (iha_msgout(sc, iot, ioh, MSG_MESSAGE_REJECT));
2202 
2203 	return (-1);
2204 }
2205 
2206 int
2207 iha_msgout_extended(sc, iot, ioh)
2208 	struct iha_softc  *sc;
2209 	bus_space_tag_t	   iot;
2210 	bus_space_handle_t ioh;
2211 {
2212 	int phase;
2213 
2214 	bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_EXTENDED);
2215 
2216 	bus_space_write_multi_1(iot, ioh, TUL_SFIFO,
2217 	    sc->HCS_Msg, sc->HCS_Msg[0]+1);
2218 
2219 	phase = iha_wait(sc, iot, ioh, XF_FIFO_OUT);
2220 
2221 	bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
2222 	iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0);
2223 
2224 	return (phase);
2225 }
2226 
2227 int
2228 iha_msgout_wdtr(sc, iot, ioh)
2229 	struct iha_softc  *sc;
2230 	bus_space_tag_t	   iot;
2231 	bus_space_handle_t ioh;
2232 {
2233 	sc->HCS_ActScb->SCB_Tcs->TCS_Flags |= FLAG_WIDE_DONE;
2234 
2235 	sc->HCS_Msg[0] = MSG_EXT_WDTR_LEN;
2236 	sc->HCS_Msg[1] = MSG_EXT_WDTR;
2237 	sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_16_BIT;
2238 
2239 	return (iha_msgout_extended(sc, iot, ioh));
2240 }
2241 
2242 int
2243 iha_msgout_sdtr(sc, iot, ioh)
2244 	struct iha_softc  *sc;
2245 	bus_space_tag_t	   iot;
2246 	bus_space_handle_t ioh;
2247 {
2248 	u_int16_t rateindex;
2249 	u_int8_t sync_rate;
2250 
2251 	rateindex = sc->HCS_ActScb->SCB_Tcs->TCS_Flags & FLAG_SCSI_RATE;
2252 
2253 	sync_rate = iha_rate_tbl[rateindex];
2254 
2255 	sc->HCS_Msg[0] = MSG_EXT_SDTR_LEN;
2256 	sc->HCS_Msg[1] = MSG_EXT_SDTR;
2257 	sc->HCS_Msg[2] = sync_rate;
2258 	sc->HCS_Msg[3] = IHA_MAX_TARGETS-1; /* REQ/ACK */
2259 
2260 	return (iha_msgout_extended(sc, iot, ioh));
2261 }
2262 
2263 void
2264 iha_wide_done(sc, iot, ioh)
2265 	struct iha_softc  *sc;
2266 	bus_space_tag_t	   iot;
2267 	bus_space_handle_t ioh;
2268 {
2269 	struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs;
2270 
2271 	pTcs->TCS_JS_Period = 0;
2272 
2273 	if (sc->HCS_Msg[2] != 0)
2274 		pTcs->TCS_JS_Period |= PERIOD_WIDE_SCSI;
2275 
2276 	pTcs->TCS_SConfig0 &= ~ALTPD;
2277 	pTcs->TCS_Flags	   &= ~FLAG_SYNC_DONE;
2278 	pTcs->TCS_Flags	   |=  FLAG_WIDE_DONE;
2279 
2280 	bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0);
2281 	bus_space_write_1(iot, ioh, TUL_SYNCM,	  pTcs->TCS_JS_Period);
2282 }
2283 
2284 void
2285 iha_sync_done(sc, iot, ioh)
2286 	struct iha_softc  *sc;
2287 	bus_space_tag_t	   iot;
2288 	bus_space_handle_t ioh;
2289 {
2290 	struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs;
2291 	int i;
2292 
2293 	if ((pTcs->TCS_Flags & FLAG_SYNC_DONE) == 0) {
2294 		if (sc->HCS_Msg[3] != 0) {
2295 			pTcs->TCS_JS_Period |= sc->HCS_Msg[3];
2296 
2297 			/* pick the highest possible rate */
2298 			for (i = 0; i < sizeof(iha_rate_tbl); i++)
2299 				if (iha_rate_tbl[i] >= sc->HCS_Msg[2])
2300 					break;
2301 
2302 			pTcs->TCS_JS_Period |= (i << 4);
2303 			pTcs->TCS_SConfig0  |= ALTPD;
2304 		}
2305 
2306 		pTcs->TCS_Flags |= FLAG_SYNC_DONE;
2307 
2308 		bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0);
2309 		bus_space_write_1(iot, ioh, TUL_SYNCM,	  pTcs->TCS_JS_Period);
2310 	}
2311 }
2312 
2313 void
2314 iha_reset_chip(sc, iot, ioh)
2315 	struct iha_softc  *sc;
2316 	bus_space_tag_t	   iot;
2317 	bus_space_handle_t ioh;
2318 {
2319 	int i;
2320 
2321 	/* reset tulip chip */
2322 
2323 	bus_space_write_1(iot, ioh, TUL_SCTRL0, RSCSI);
2324 
2325 	do
2326 		sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT);
2327 	while((sc->HCS_JSInt & SRSTD) == 0);
2328 
2329 	iha_set_ssig(iot, ioh, 0, 0);
2330 
2331 	/*
2332 	 * Stall for 2 seconds, wait for target's firmware ready.
2333 	 */
2334 	for (i = 0; i < 2000; i++)
2335 		DELAY (1000);
2336 
2337 	bus_space_read_1(iot, ioh, TUL_SISTAT); /* Clear any active interrupt*/
2338 }
2339 
2340 void
2341 iha_select(sc, iot, ioh, pScb, select_type)
2342 	struct iha_softc   *sc;
2343 	bus_space_tag_t	    iot;
2344 	bus_space_handle_t  ioh;
2345 	struct iha_scb *pScb;
2346 	u_int8_t	select_type;
2347 {
2348 	int s;
2349 
2350 	switch (select_type) {
2351 	case SEL_ATN:
2352 		bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident);
2353 		bus_space_write_multi_1(iot, ioh, TUL_SFIFO,
2354 		    pScb->SCB_CDB, pScb->SCB_CDBLen);
2355 
2356 		pScb->SCB_NxtStat = 2;
2357 		break;
2358 
2359 	case SELATNSTOP:
2360 		pScb->SCB_NxtStat = 1;
2361 		break;
2362 
2363 	case SEL_ATN3:
2364 		bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident);
2365 		bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_TagMsg);
2366 		bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_TagId);
2367 
2368 		bus_space_write_multi_1(iot, ioh, TUL_SFIFO, pScb->SCB_CDB,
2369 		    pScb->SCB_CDBLen);
2370 
2371 		pScb->SCB_NxtStat = 2;
2372 		break;
2373 
2374 	default:
2375 #ifdef IHA_DEBUG_STATE
2376 		sc_print_addr(pScb->SCB_Xs->sc_link);
2377 		printf("[debug] iha_select() - unknown select type = 0x%02x\n",
2378 		    select_type);
2379 #endif
2380 		return;
2381 	}
2382 
2383 	s = splbio();
2384 	TAILQ_REMOVE(&sc->HCS_PendScb, pScb, SCB_ScbList);
2385 	splx(s);
2386 
2387 	pScb->SCB_Status = STATUS_SELECT;
2388 
2389 	sc->HCS_ActScb = pScb;
2390 
2391 	bus_space_write_1(iot, ioh, TUL_SCMD, select_type);
2392 }
2393 
2394 /*
2395  * iha_wait - wait for an interrupt to service or a SCSI bus phase change
2396  *            after writing the supplied command to the tulip chip. If
2397  *            the command is NO_OP, skip the command writing.
2398  */
2399 int
2400 iha_wait(sc, iot, ioh, cmd)
2401 	struct iha_softc  *sc;
2402 	bus_space_tag_t	   iot;
2403 	bus_space_handle_t ioh;
2404 	u_int8_t	   cmd;
2405 {
2406 	if (cmd != NO_OP)
2407 		bus_space_write_1(iot, ioh, TUL_SCMD, cmd);
2408 
2409 	/*
2410 	 * Have to do this here, in addition to in iha_isr, because
2411 	 * interrupts might be turned off when we get here.
2412 	 */
2413 	do
2414 		sc->HCS_JSStatus0 = bus_space_read_1(iot, ioh, TUL_STAT0);
2415 	while ((sc->HCS_JSStatus0 & INTPD) == 0);
2416 
2417 	sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1);
2418 	sc->HCS_JSInt     = bus_space_read_1(iot, ioh, TUL_SISTAT);
2419 
2420 	sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK;
2421 
2422 	if ((sc->HCS_JSInt & SRSTD) != 0) {
2423 		/* SCSI bus reset interrupt */
2424 		iha_reset_scsi_bus(sc);
2425 		return (-1);
2426 	}
2427 
2428 	if ((sc->HCS_JSInt & RSELED) != 0)
2429 		/* Reselection interrupt */
2430 		return (iha_resel(sc, iot, ioh));
2431 
2432 	if ((sc->HCS_JSInt & STIMEO) != 0) {
2433 		/* selected/reselected timeout interrupt */
2434 		iha_busfree(sc, iot, ioh);
2435 		return (-1);
2436 	}
2437 
2438 	if ((sc->HCS_JSInt & DISCD) != 0) {
2439 		/* BUS disconnection interrupt */
2440 		if ((sc->HCS_Flags & FLAG_EXPECT_DONE_DISC) != 0) {
2441 			bus_space_write_1(iot, ioh, TUL_SCTRL0,	  RSFIFO);
2442 			bus_space_write_1(iot, ioh, TUL_SCONFIG0,
2443 			    SCONFIG0DEFAULT);
2444 			bus_space_write_1(iot, ioh, TUL_SCTRL1,	  EHRSL);
2445 			iha_append_done_scb(sc, sc->HCS_ActScb, HOST_OK);
2446 			sc->HCS_Flags &= ~FLAG_EXPECT_DONE_DISC;
2447 
2448 		} else if ((sc->HCS_Flags & FLAG_EXPECT_DISC) != 0) {
2449 			bus_space_write_1(iot, ioh, TUL_SCTRL0,	  RSFIFO);
2450 			bus_space_write_1(iot, ioh, TUL_SCONFIG0,
2451 			    SCONFIG0DEFAULT);
2452 			bus_space_write_1(iot, ioh, TUL_SCTRL1,	  EHRSL);
2453 			sc->HCS_ActScb = NULL;
2454 			sc->HCS_Flags &= ~FLAG_EXPECT_DISC;
2455 
2456 		} else
2457 			iha_busfree(sc, iot, ioh);
2458 
2459 		return (-1);
2460 	}
2461 
2462 	return (sc->HCS_Phase);
2463 }
2464 
2465 /*
2466  * iha_done_scb - We have a scb which has been processed by the
2467  *                adaptor, now we look to see how the operation went.
2468  */
2469 void
2470 iha_done_scb(sc, pScb)
2471 	struct iha_softc *sc;
2472 	struct iha_scb *pScb;
2473 {
2474 	struct scsi_sense_data *s1, *s2;
2475 	struct scsi_xfer *xs = pScb->SCB_Xs;
2476 	int s;
2477 
2478 	if (xs != NULL) {
2479 		timeout_del(&xs->stimeout);
2480 
2481 		xs->status = pScb->SCB_TaStat;
2482 
2483 		if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) {
2484 			bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
2485 				0, pScb->SCB_BufChars,
2486 				((pScb->SCB_Flags & SCSI_DATA_IN) ?
2487 					BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
2488 			bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma);
2489 		}
2490 		if ((pScb->SCB_Flags & FLAG_SG) != 0) {
2491 			bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
2492 				0, sizeof(pScb->SCB_SGList),
2493 				BUS_DMASYNC_POSTWRITE);
2494 			bus_dmamap_unload(sc->sc_dmat, pScb->SCB_SGDma);
2495 		}
2496 
2497 		switch (pScb->SCB_HaStat) {
2498 		case HOST_OK:
2499 			switch (pScb->SCB_TaStat) {
2500 			case SCSI_OK:
2501 			case SCSI_COND_MET:
2502 			case SCSI_INTERM:
2503 			case SCSI_INTERM_COND_MET:
2504 				xs->resid = pScb->SCB_BufCharsLeft;
2505 				xs->error = XS_NOERROR;
2506 				break;
2507 
2508 			case SCSI_RESV_CONFLICT:
2509 			case SCSI_BUSY:
2510 			case SCSI_QUEUE_FULL:
2511 				xs->error = XS_BUSY;
2512 				break;
2513 
2514 			case SCSI_TERMINATED:
2515 			case SCSI_ACA_ACTIVE:
2516 			case SCSI_CHECK:
2517 				s1 = &pScb->SCB_ScsiSenseData;
2518 				s2 = &xs->sense;
2519 				*s2 = *s1;
2520 
2521 				xs->error = XS_SENSE;
2522 				break;
2523 
2524 			default:
2525 				xs->error = XS_DRIVER_STUFFUP;
2526 				break;
2527 			}
2528 			break;
2529 
2530 		case HOST_SEL_TOUT:
2531 			xs->error = XS_SELTIMEOUT;
2532 			break;
2533 
2534 		case HOST_SCSI_RST:
2535 		case HOST_DEV_RST:
2536 			xs->error = XS_RESET;
2537 			break;
2538 
2539 		case HOST_SPERR:
2540 			sc_print_addr(xs->sc_link);
2541 			printf("SCSI Parity error detected\n");
2542 			xs->error = XS_DRIVER_STUFFUP;
2543 			break;
2544 
2545 		case HOST_TIMED_OUT:
2546 			xs->error = XS_TIMEOUT;
2547 			break;
2548 
2549 		case HOST_DO_DU:
2550 		case HOST_BAD_PHAS:
2551 		default:
2552 			xs->error = XS_DRIVER_STUFFUP;
2553 			break;
2554 		}
2555 
2556 		xs->flags |= ITSDONE;
2557 		s = splbio();
2558 		scsi_done(xs);
2559 		splx(s);
2560 	}
2561 
2562 	iha_append_free_scb(sc, pScb);
2563 }
2564 
2565 void
2566 iha_timeout(arg)
2567 	void *arg;
2568 {
2569 	struct iha_scb *pScb = (struct iha_scb *)arg;
2570 	struct scsi_xfer *xs = pScb->SCB_Xs;
2571 
2572 	if (xs != NULL) {
2573 		sc_print_addr(xs->sc_link);
2574 		printf("SCSI OpCode 0x%02x timed out\n", xs->cmd->opcode);
2575 		iha_abort_xs(xs->sc_link->adapter_softc, xs, HOST_TIMED_OUT);
2576 	}
2577 }
2578 
2579 void
2580 iha_exec_scb(sc, pScb)
2581 	struct iha_softc *sc;
2582 	struct iha_scb *pScb;
2583 {
2584 	bus_space_handle_t ioh;
2585 	bus_space_tag_t iot;
2586 	int s;
2587 
2588 	s = splbio();
2589 
2590 	if (((pScb->SCB_Flags & SCSI_RESET) != 0)
2591 	    || (pScb->SCB_CDB[0] == REQUEST_SENSE))
2592 		iha_push_pend_scb(sc, pScb);   /* Insert SCB at head of Pend */
2593 	else
2594 		iha_append_pend_scb(sc, pScb); /* Append SCB to tail of Pend */
2595 
2596 	/*
2597 	 * Run through iha_main() to ensure something is active, if
2598 	 * only this new SCB.
2599 	 */
2600 	if (sc->HCS_Semaph != SEMAPH_IN_MAIN) {
2601 		iot = sc->sc_iot;
2602 		ioh = sc->sc_ioh;
2603 
2604 		bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL);
2605 		sc->HCS_Semaph = SEMAPH_IN_MAIN;
2606 
2607 		splx(s);
2608 		iha_main(sc, iot, ioh);
2609 		s = splbio();
2610 
2611 		sc->HCS_Semaph = ~SEMAPH_IN_MAIN;
2612 		bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP));
2613 	}
2614 
2615 	splx(s);
2616 }
2617 
2618 
2619 /*
2620  * iha_set_ssig - read the current scsi signal mask, then write a new
2621  *		  one which turns off/on the specified signals.
2622  */
2623 void
2624 iha_set_ssig( iot, ioh, offsigs, onsigs)
2625 	bus_space_tag_t	   iot;
2626 	bus_space_handle_t ioh;
2627 	u_int8_t	   offsigs, onsigs;
2628 {
2629 	u_int8_t currsigs;
2630 
2631 	currsigs = bus_space_read_1(iot, ioh, TUL_SSIGI);
2632 	bus_space_write_1(iot, ioh, TUL_SSIGO, (currsigs & ~offsigs) | onsigs);
2633 }
2634 
2635 void
2636 iha_print_info(sc, target)
2637 	struct iha_softc *sc;
2638 	int target;
2639 {
2640 	u_int8_t period = sc->HCS_Tcs[target].TCS_JS_Period;
2641 	u_int8_t config = sc->HCS_Tcs[target].TCS_SConfig0;
2642 	int rate;
2643 
2644 	printf("%s: target %d using %d bit ", sc->sc_dev.dv_xname, target,
2645 		(period & PERIOD_WIDE_SCSI) ? 16 : 8);
2646 
2647 	if ((period & PERIOD_SYOFS) == 0)
2648 		printf("async ");
2649 	else {
2650 		rate = (period & PERIOD_SYXPD) >> 4;
2651 		if ((config & ALTPD) == 0)
2652 			rate = 100 + rate * 50;
2653 		else
2654 			rate =	50 + rate * 25;
2655 		rate = 1000000000 / rate;
2656 		printf("%d.%d MHz %d REQ/ACK offset ", rate / 1000000,
2657 		    (rate % 1000000 + 99999) / 100000, period & PERIOD_SYOFS);
2658 	}
2659 
2660 	printf("xfers\n");
2661 }
2662 
2663 
2664 /*
2665  * iha_alloc_scbs - allocate and map the SCB's for the supplied iha_softc
2666  */
2667 int
2668 iha_alloc_scbs(sc)
2669 	struct iha_softc *sc;
2670 {
2671 	bus_dma_segment_t seg;
2672 	int error, rseg;
2673 
2674 	/*
2675 	 * Allocate dma-safe memory for the SCB's
2676 	 */
2677 	if ((error = bus_dmamem_alloc(sc->sc_dmat,
2678 		 sizeof(struct iha_scb)*IHA_MAX_SCB,
2679 		 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT))
2680 	    != 0) {
2681 		printf("%s: unable to allocate SCBs,"
2682 		       " error = %d\n", sc->sc_dev.dv_xname, error);
2683 		return (error);
2684 	}
2685 	if ((error = bus_dmamem_map(sc->sc_dmat,
2686 		 &seg, rseg, sizeof(struct iha_scb)*IHA_MAX_SCB,
2687 		 (caddr_t *)&sc->HCS_Scb, BUS_DMA_NOWAIT | BUS_DMA_COHERENT))
2688 	    != 0) {
2689 		printf("%s: unable to map SCBs, error = %d\n",
2690 		       sc->sc_dev.dv_xname, error);
2691 		return (error);
2692 	}
2693 	bzero(sc->HCS_Scb, sizeof(struct iha_scb)*IHA_MAX_SCB);
2694 
2695 	return (0);
2696 }
2697 
2698 /*
2699  * iha_read_eeprom - read contents of serial EEPROM into iha_nvram pointed at
2700  *                                        by parameter nvram.
2701  */
2702 void
2703 iha_read_eeprom(iot, ioh, nvram)
2704 	bus_space_tag_t iot;
2705 	bus_space_handle_t ioh;
2706 	struct iha_nvram *nvram;
2707 {
2708 	u_int32_t chksum;
2709 	u_int16_t *np;
2710 	u_int8_t gctrl, addr;
2711 
2712 	const int chksum_addr = offsetof(struct iha_nvram, NVM_CheckSum) / 2;
2713 
2714 	/* Enable EEProm programming */
2715 	gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) | EEPRG;
2716 	bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl);
2717 
2718 	/* Read EEProm */
2719 	np = (u_int16_t *)nvram;
2720 	for (addr=0, chksum=0; addr < chksum_addr; addr++, np++) {
2721 		*np = iha_se2_rd(iot, ioh, addr);
2722 		chksum += *np;
2723 	}
2724 
2725 	chksum &= 0x0000ffff;
2726 	nvram->NVM_CheckSum = iha_se2_rd(iot, ioh, chksum_addr);
2727 
2728 	/* Disable EEProm programming */
2729 	gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) & ~EEPRG;
2730 	bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl);
2731 
2732 	if ((nvram->NVM_Signature != SIGNATURE)
2733 	    ||
2734 	    (nvram->NVM_CheckSum  != chksum))
2735 		panic("iha: invalid EEPROM,  bad signature or checksum");
2736 }
2737 
2738 /*
2739  * iha_se2_rd - read & return the 16 bit value at the specified
2740  *		offset in the Serial E2PROM
2741  *
2742  */
2743 u_int16_t
2744 iha_se2_rd(iot, ioh, addr)
2745 	bus_space_tag_t	   iot;
2746 	bus_space_handle_t ioh;
2747 	u_int8_t	   addr;
2748 {
2749 	u_int16_t readWord;
2750 	u_int8_t bit;
2751 	int i;
2752 
2753 	/* Send 'READ' instruction == address | READ bit */
2754 	iha_se2_instr(iot, ioh, (addr | NVREAD));
2755 
2756 	readWord = 0;
2757 	for (i = 15; i >= 0; i--) {
2758 		bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK);
2759 		DELAY(5);
2760 
2761 		bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS);
2762 		DELAY(5);
2763 
2764 		/* sample data after the following edge of clock     */
2765 		bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI;
2766 		DELAY(5);
2767 
2768 		readWord += bit << i;
2769 	}
2770 
2771 	bus_space_write_1(iot, ioh, TUL_NVRAM, 0);
2772 	DELAY(5);
2773 
2774 	return (readWord);
2775 }
2776 
2777 /*
2778  * iha_se2_instr - write an octet to serial E2PROM one bit at a time
2779  */
2780 void
2781 iha_se2_instr(iot, ioh, instr)
2782 	bus_space_tag_t	   iot;
2783 	bus_space_handle_t ioh;
2784 	u_int8_t	   instr;
2785 {
2786 	u_int8_t b;
2787 	int i;
2788 
2789 	b = NVRCS | NVRDO; /* Write the start bit (== 1) */
2790 
2791 	bus_space_write_1(iot, ioh, TUL_NVRAM, b);
2792 	DELAY(5);
2793 	bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK);
2794 	DELAY(5);
2795 
2796 	for (i = 0; i < 8; i++, instr <<= 1) {
2797 		if (instr & 0x80)
2798 			b = NVRCS | NVRDO; /* Write a 1 bit */
2799 		else
2800 			b = NVRCS;	   /* Write a 0 bit */
2801 
2802 		bus_space_write_1(iot, ioh, TUL_NVRAM, b);
2803 		DELAY(5);
2804 		bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK);
2805 		DELAY(5);
2806 	}
2807 
2808 	bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS);
2809 	DELAY(5);
2810 
2811 	return;
2812 }
2813 
2814 /*
2815  * iha_reset_tcs - reset the target control structure pointed
2816  *		   to by pTcs to default values. TCS_Flags
2817  *		   only has the negotiation done bits reset as
2818  *		   the other bits are fixed at initialization.
2819  */
2820 void
2821 iha_reset_tcs(pTcs, config0)
2822 	struct tcs *pTcs;
2823 	u_int8_t config0;
2824 {
2825 	pTcs->TCS_Flags	    &= ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE);
2826 	pTcs->TCS_JS_Period  = 0;
2827 	pTcs->TCS_SConfig0   = config0;
2828 	pTcs->TCS_TagCnt     = 0;
2829 	pTcs->TCS_NonTagScb  = NULL;
2830 }
2831