1 /* $OpenBSD: iha.c,v 1.48 2020/02/18 17:08:35 krw Exp $ */ 2 /*------------------------------------------------------------------------- 3 * 4 * Device driver for the INI-9XXXU/UW or INIC-940/950 PCI SCSI Controller. 5 * 6 * Written for 386bsd and FreeBSD by 7 * Winston Hung <winstonh@initio.com> 8 * 9 * Copyright (c) 1997-1999 Initio Corp 10 * Copyright (c) 2000-2002 Ken Westerback 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer, 17 * without modification, immediately at the beginning of the file. 18 * 2. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 30 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 *------------------------------------------------------------------------- 34 */ 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/buf.h> 38 #include <sys/device.h> 39 40 #include <machine/bus.h> 41 #include <machine/intr.h> 42 43 #include <scsi/scsi_all.h> 44 #include <scsi/scsiconf.h> 45 #include <scsi/scsi_message.h> 46 47 #include <dev/ic/iha.h> 48 49 /* #define IHA_DEBUG_STATE */ 50 51 struct cfdriver iha_cd = { 52 NULL, "iha", DV_DULL 53 }; 54 55 struct scsi_adapter iha_switch = { 56 iha_scsi_cmd, NULL, NULL, NULL, NULL 57 }; 58 59 /* 60 * SCSI Rate Table, indexed by FLAG_SCSI_RATE field of 61 * TCS_Flags. 62 */ 63 static const u_int8_t iha_rate_tbl[] = { 64 /* fast 20 */ 65 /* nanosecond divide by 4 */ 66 12, /* 50ns, 20M */ 67 18, /* 75ns, 13.3M */ 68 25, /* 100ns, 10M */ 69 31, /* 125ns, 8M */ 70 37, /* 150ns, 6.6M */ 71 43, /* 175ns, 5.7M */ 72 50, /* 200ns, 5M */ 73 62 /* 250ns, 4M */ 74 }; 75 76 int iha_setup_sg_list(struct iha_softc *, struct iha_scb *); 77 u_int8_t iha_data_over_run(struct iha_scb *); 78 int iha_push_sense_request(struct iha_softc *, struct iha_scb *); 79 void iha_timeout(void *); 80 int iha_alloc_scbs(struct iha_softc *); 81 void iha_read_eeprom(bus_space_tag_t, bus_space_handle_t, 82 struct iha_nvram *); 83 void iha_se2_instr(bus_space_tag_t, bus_space_handle_t, u_int8_t); 84 u_int16_t iha_se2_rd(bus_space_tag_t, bus_space_handle_t, u_int8_t); 85 void iha_reset_scsi_bus(struct iha_softc *); 86 void iha_reset_chip(struct iha_softc *, 87 bus_space_tag_t, bus_space_handle_t); 88 void iha_reset_dma(bus_space_tag_t, bus_space_handle_t); 89 void iha_reset_tcs(struct tcs *, u_int8_t); 90 void iha_print_info(struct iha_softc *, int); 91 void iha_done_scb(struct iha_softc *, struct iha_scb *); 92 void iha_exec_scb(struct iha_softc *, struct iha_scb *); 93 void iha_main(struct iha_softc *, bus_space_tag_t, bus_space_handle_t); 94 void iha_scsi(struct iha_softc *, bus_space_tag_t, bus_space_handle_t); 95 int iha_wait(struct iha_softc *, bus_space_tag_t, bus_space_handle_t, 96 u_int8_t); 97 void iha_mark_busy_scb(struct iha_scb *); 98 void *iha_scb_alloc(void *); 99 void iha_scb_free(void *, void *); 100 void iha_append_done_scb(struct iha_softc *, struct iha_scb *, 101 u_int8_t); 102 struct iha_scb *iha_pop_done_scb(struct iha_softc *); 103 void iha_append_pend_scb(struct iha_softc *, struct iha_scb *); 104 void iha_push_pend_scb(struct iha_softc *, struct iha_scb *); 105 struct iha_scb *iha_find_pend_scb(struct iha_softc *); 106 void iha_sync_done(struct iha_softc *, 107 bus_space_tag_t, bus_space_handle_t); 108 void iha_wide_done(struct iha_softc *, 109 bus_space_tag_t, bus_space_handle_t); 110 void iha_bad_seq(struct iha_softc *); 111 int iha_next_state(struct iha_softc *, 112 bus_space_tag_t, bus_space_handle_t); 113 int iha_state_1(struct iha_softc *, 114 bus_space_tag_t, bus_space_handle_t); 115 int iha_state_2(struct iha_softc *, 116 bus_space_tag_t, bus_space_handle_t); 117 int iha_state_3(struct iha_softc *, 118 bus_space_tag_t, bus_space_handle_t); 119 int iha_state_4(struct iha_softc *, 120 bus_space_tag_t, bus_space_handle_t); 121 int iha_state_5(struct iha_softc *, 122 bus_space_tag_t, bus_space_handle_t); 123 int iha_state_6(struct iha_softc *, 124 bus_space_tag_t, bus_space_handle_t); 125 int iha_state_8(struct iha_softc *, 126 bus_space_tag_t, bus_space_handle_t); 127 void iha_set_ssig(bus_space_tag_t, 128 bus_space_handle_t, u_int8_t, u_int8_t); 129 int iha_xpad_in(struct iha_softc *, 130 bus_space_tag_t, bus_space_handle_t); 131 int iha_xpad_out(struct iha_softc *, 132 bus_space_tag_t, bus_space_handle_t); 133 int iha_xfer_data(struct iha_scb *, 134 bus_space_tag_t, bus_space_handle_t, 135 int direction); 136 int iha_status_msg(struct iha_softc *, 137 bus_space_tag_t, bus_space_handle_t); 138 int iha_msgin(struct iha_softc *, bus_space_tag_t, bus_space_handle_t); 139 int iha_msgin_sdtr(struct iha_softc *); 140 int iha_msgin_extended(struct iha_softc *, 141 bus_space_tag_t, bus_space_handle_t); 142 int iha_msgin_ignore_wid_resid(struct iha_softc *, 143 bus_space_tag_t, bus_space_handle_t); 144 int iha_msgout(struct iha_softc *, 145 bus_space_tag_t, bus_space_handle_t, u_int8_t); 146 int iha_msgout_extended(struct iha_softc *, 147 bus_space_tag_t, bus_space_handle_t); 148 void iha_msgout_abort(struct iha_softc *, 149 bus_space_tag_t, bus_space_handle_t, u_int8_t); 150 int iha_msgout_reject(struct iha_softc *, 151 bus_space_tag_t, bus_space_handle_t); 152 int iha_msgout_sdtr(struct iha_softc *, 153 bus_space_tag_t, bus_space_handle_t); 154 int iha_msgout_wdtr(struct iha_softc *, 155 bus_space_tag_t, bus_space_handle_t); 156 void iha_select(struct iha_softc *, 157 bus_space_tag_t, bus_space_handle_t, 158 struct iha_scb *, u_int8_t); 159 void iha_busfree(struct iha_softc *, 160 bus_space_tag_t, bus_space_handle_t); 161 int iha_resel(struct iha_softc *, bus_space_tag_t, bus_space_handle_t); 162 void iha_abort_xs(struct iha_softc *, struct scsi_xfer *, u_int8_t); 163 164 /* 165 * iha_intr - the interrupt service routine for the iha driver 166 */ 167 int 168 iha_intr(void *arg) 169 { 170 bus_space_handle_t ioh; 171 struct iha_softc *sc; 172 bus_space_tag_t iot; 173 int s; 174 175 sc = (struct iha_softc *)arg; 176 iot = sc->sc_iot; 177 ioh = sc->sc_ioh; 178 179 if ((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 180 return (0); 181 182 s = splbio(); /* XXX - Or are interrupts off when ISR's are called? */ 183 184 if (sc->HCS_Semaph != SEMAPH_IN_MAIN) { 185 /* XXX - need these inside a splbio()/splx()? */ 186 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 187 sc->HCS_Semaph = SEMAPH_IN_MAIN; 188 189 iha_main(sc, iot, ioh); 190 191 sc->HCS_Semaph = ~SEMAPH_IN_MAIN; 192 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 193 } 194 195 splx(s); 196 197 return (1); 198 } 199 200 /* 201 * iha_setup_sg_list - initialize scatter gather list of pScb from 202 * pScb->SCB_DataDma. 203 */ 204 int 205 iha_setup_sg_list(struct iha_softc *sc, struct iha_scb *pScb) 206 { 207 bus_dma_segment_t *segs = pScb->SCB_DataDma->dm_segs; 208 int i, error, nseg = pScb->SCB_DataDma->dm_nsegs; 209 210 if (nseg > 1) { 211 error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_SGDma, 212 pScb->SCB_SGList, sizeof(pScb->SCB_SGList), NULL, 213 (pScb->SCB_Flags & SCSI_NOSLEEP) ? 214 BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 215 if (error) { 216 sc_print_addr(pScb->SCB_Xs->sc_link); 217 printf("error %d loading SG list dma map\n", error); 218 return (error); 219 } 220 221 /* 222 * Only set FLAG_SG when SCB_SGDma is loaded so iha_scsi_done 223 * will not unload an unloaded map. 224 */ 225 pScb->SCB_Flags |= FLAG_SG; 226 bzero(pScb->SCB_SGList, sizeof(pScb->SCB_SGList)); 227 228 pScb->SCB_SGIdx = 0; 229 pScb->SCB_SGCount = nseg; 230 231 for (i=0; i < nseg; i++) { 232 pScb->SCB_SGList[i].SG_Len = segs[i].ds_len; 233 pScb->SCB_SGList[i].SG_Addr = segs[i].ds_addr; 234 } 235 236 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma, 237 0, sizeof(pScb->SCB_SGList), BUS_DMASYNC_PREWRITE); 238 } 239 240 return (0); 241 } 242 243 /* 244 * iha_scsi_cmd - start execution of a SCSI command. This is called 245 * from the generic SCSI driver via the field 246 * sc_adapter.scsi_cmd of iha_softc. 247 */ 248 void 249 iha_scsi_cmd(struct scsi_xfer *xs) 250 { 251 struct iha_scb *pScb; 252 struct scsi_link *sc_link = xs->sc_link; 253 struct iha_softc *sc = sc_link->adapter_softc; 254 int error; 255 256 if ((xs->cmdlen > 12) || (sc_link->target >= IHA_MAX_TARGETS)) { 257 xs->error = XS_DRIVER_STUFFUP; 258 scsi_done(xs); 259 return; 260 } 261 262 pScb = xs->io; 263 264 pScb->SCB_Target = sc_link->target; 265 pScb->SCB_Lun = sc_link->lun; 266 pScb->SCB_Tcs = &sc->HCS_Tcs[pScb->SCB_Target]; 267 pScb->SCB_Flags = xs->flags; 268 pScb->SCB_Ident = MSG_IDENTIFYFLAG | 269 (pScb->SCB_Lun & MSG_IDENTIFY_LUNMASK); 270 271 if ((xs->cmd->opcode != REQUEST_SENSE) 272 && ((pScb->SCB_Flags & SCSI_POLL) == 0)) 273 pScb->SCB_Ident |= MSG_IDENTIFY_DISCFLAG; 274 275 pScb->SCB_Xs = xs; 276 pScb->SCB_CDBLen = xs->cmdlen; 277 bcopy(xs->cmd, &pScb->SCB_CDB, xs->cmdlen); 278 279 pScb->SCB_BufCharsLeft = pScb->SCB_BufChars = xs->datalen; 280 281 if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) { 282 error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_DataDma, 283 xs->data, pScb->SCB_BufChars, NULL, 284 (pScb->SCB_Flags & SCSI_NOSLEEP) ? 285 BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 286 287 if (error) { 288 sc_print_addr(xs->sc_link); 289 if (error == EFBIG) 290 printf("buffer needs >%d dma segments\n", 291 IHA_MAX_SG_ENTRIES); 292 else 293 printf("error %d loading buffer dma map\n", 294 error); 295 296 xs->error = XS_DRIVER_STUFFUP; 297 scsi_done(xs); 298 return; 299 } 300 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma, 301 0, pScb->SCB_BufChars, 302 (pScb->SCB_Flags & SCSI_DATA_IN) ? 303 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 304 305 error = iha_setup_sg_list(sc, pScb); 306 if (error) { 307 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma); 308 xs->error = XS_DRIVER_STUFFUP; 309 scsi_done(xs); 310 return; 311 } 312 313 } 314 315 /* 316 * Always initialize the stimeout structure as it may 317 * contain garbage that confuses timeout_del() later on. 318 * But, timeout_add() ONLY if we are not polling. 319 */ 320 timeout_set(&xs->stimeout, iha_timeout, pScb); 321 322 iha_exec_scb(sc, pScb); 323 } 324 325 /* 326 * iha_init_tulip - initialize the inic-940/950 card and the rest of the 327 * iha_softc structure supplied 328 */ 329 int 330 iha_init_tulip(struct iha_softc *sc) 331 { 332 struct iha_scb *pScb; 333 struct iha_nvram_scsi *pScsi; 334 bus_space_handle_t ioh; 335 struct iha_nvram iha_nvram; 336 bus_space_tag_t iot; 337 int i, error; 338 339 iot = sc->sc_iot; 340 ioh = sc->sc_ioh; 341 342 iha_read_eeprom(iot, ioh, &iha_nvram); 343 344 pScsi = &iha_nvram.NVM_Scsi[0]; 345 346 TAILQ_INIT(&sc->HCS_FreeScb); 347 TAILQ_INIT(&sc->HCS_PendScb); 348 TAILQ_INIT(&sc->HCS_DoneScb); 349 350 mtx_init(&sc->sc_scb_mtx, IPL_BIO); 351 scsi_iopool_init(&sc->sc_iopool, sc, iha_scb_alloc, iha_scb_free); 352 353 /* 354 * fill in the prototype scsi_link. 355 */ 356 sc->sc_link.adapter_softc = sc; 357 sc->sc_link.adapter = &iha_switch; 358 sc->sc_link.openings = 4; /* # xs's allowed per device */ 359 sc->sc_link.adapter_target = pScsi->NVM_SCSI_Id; 360 sc->sc_link.adapter_buswidth = pScsi->NVM_SCSI_Targets; 361 sc->sc_link.pool = &sc->sc_iopool; 362 363 /* 364 * fill in the rest of the iha_softc fields 365 */ 366 sc->HCS_Semaph = ~SEMAPH_IN_MAIN; 367 sc->HCS_JSStatus0 = 0; 368 sc->HCS_ActScb = NULL; 369 370 error = iha_alloc_scbs(sc); 371 if (error != 0) 372 return (error); 373 374 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) { 375 pScb->SCB_TagId = i; 376 377 error = bus_dmamap_create(sc->sc_dmat, 378 (IHA_MAX_SG_ENTRIES-1) * PAGE_SIZE, IHA_MAX_SG_ENTRIES, 379 (IHA_MAX_SG_ENTRIES-1) * PAGE_SIZE, 0, 380 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &pScb->SCB_DataDma); 381 382 if (error != 0) { 383 printf("%s: couldn't create SCB data DMA map, error = %d\n", 384 sc->sc_dev.dv_xname, error); 385 return (error); 386 } 387 388 error = bus_dmamap_create(sc->sc_dmat, 389 sizeof(pScb->SCB_SGList), 1, 390 sizeof(pScb->SCB_SGList), 0, 391 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 392 &pScb->SCB_SGDma); 393 if (error != 0) { 394 printf("%s: couldn't create SCB SG DMA map, error = %d\n", 395 sc->sc_dev.dv_xname, error); 396 return (error); 397 } 398 399 TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList); 400 } 401 402 /* Mask all the interrupts */ 403 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 404 405 /* Stop any I/O and reset the scsi module */ 406 iha_reset_dma(iot, ioh); 407 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSMOD); 408 409 /* Program HBA's SCSI ID */ 410 bus_space_write_1(iot, ioh, TUL_SID, sc->sc_link.adapter_target << 4); 411 412 /* 413 * Configure the channel as requested by the NVRAM settings read 414 * into iha_nvram by iha_read_eeprom() above. 415 */ 416 417 if ((pScsi->NVM_SCSI_Cfg & CFG_EN_PAR) != 0) 418 sc->HCS_SConf1 = (SCONFIG0DEFAULT | SPCHK); 419 else 420 sc->HCS_SConf1 = (SCONFIG0DEFAULT); 421 bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->HCS_SConf1); 422 423 /* selection time out in units of 1.6385 millisecond = 250 ms */ 424 bus_space_write_1(iot, ioh, TUL_STIMO, 153); 425 426 /* Enable desired SCSI termination configuration read from eeprom */ 427 bus_space_write_1(iot, ioh, TUL_DCTRL0, 428 (pScsi->NVM_SCSI_Cfg & (CFG_ACT_TERM1 | CFG_ACT_TERM2))); 429 430 bus_space_write_1(iot, ioh, TUL_GCTRL1, 431 ((pScsi->NVM_SCSI_Cfg & CFG_AUTO_TERM) >> 4) 432 | (bus_space_read_1(iot, ioh, TUL_GCTRL1) & (~ATDEN))); 433 434 for (i = 0; i < IHA_MAX_TARGETS; i++) { 435 sc->HCS_Tcs[i].TCS_Flags = pScsi->NVM_SCSI_TargetFlags[i]; 436 iha_reset_tcs(&sc->HCS_Tcs[i], sc->HCS_SConf1); 437 } 438 439 iha_reset_chip(sc, iot, ioh); 440 bus_space_write_1(iot, ioh, TUL_SIEN, ALL_INTERRUPTS); 441 442 return (0); 443 } 444 445 /* 446 * iha_reset_dma - abort any active DMA xfer, reset tulip FIFO. 447 */ 448 void 449 iha_reset_dma(bus_space_tag_t iot, bus_space_handle_t ioh) 450 { 451 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 452 /* if DMA xfer is pending, abort DMA xfer */ 453 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 454 /* wait Abort DMA xfer done */ 455 while ((bus_space_read_1(iot, ioh, TUL_ISTUS0) & DABT) == 0) 456 ; 457 } 458 459 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 460 } 461 462 /* 463 * iha_scb_alloc - return the first free SCB, or NULL if there are none. 464 */ 465 void * 466 iha_scb_alloc(void *xsc) 467 { 468 struct iha_softc *sc = xsc; 469 struct iha_scb *pScb; 470 471 mtx_enter(&sc->sc_scb_mtx); 472 pScb = TAILQ_FIRST(&sc->HCS_FreeScb); 473 if (pScb != NULL) { 474 pScb->SCB_Status = STATUS_RENT; 475 TAILQ_REMOVE(&sc->HCS_FreeScb, pScb, SCB_ScbList); 476 } 477 mtx_leave(&sc->sc_scb_mtx); 478 479 return (pScb); 480 } 481 482 /* 483 * iha_scb_free - append the supplied SCB to the tail of the 484 * HCS_FreeScb queue after clearing and resetting 485 * everything possible. 486 */ 487 void 488 iha_scb_free(void *xsc, void *xscb) 489 { 490 struct iha_softc *sc = xsc; 491 struct iha_scb *pScb = xscb; 492 int s; 493 494 s = splbio(); 495 if (pScb == sc->HCS_ActScb) 496 sc->HCS_ActScb = NULL; 497 splx(s); 498 499 pScb->SCB_Status = STATUS_QUEUED; 500 pScb->SCB_HaStat = HOST_OK; 501 pScb->SCB_TaStat = SCSI_OK; 502 503 pScb->SCB_NxtStat = 0; 504 pScb->SCB_Flags = 0; 505 pScb->SCB_Target = 0; 506 pScb->SCB_Lun = 0; 507 pScb->SCB_CDBLen = 0; 508 pScb->SCB_Ident = 0; 509 pScb->SCB_TagMsg = 0; 510 511 pScb->SCB_BufChars = 0; 512 pScb->SCB_BufCharsLeft = 0; 513 514 pScb->SCB_Xs = NULL; 515 pScb->SCB_Tcs = NULL; 516 517 bzero(pScb->SCB_CDB, sizeof(pScb->SCB_CDB)); 518 519 /* 520 * SCB_TagId is set at initialization and never changes 521 */ 522 523 mtx_enter(&sc->sc_scb_mtx); 524 TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList); 525 mtx_leave(&sc->sc_scb_mtx); 526 } 527 528 void 529 iha_append_pend_scb(struct iha_softc *sc, struct iha_scb *pScb) 530 { 531 /* ASSUMPTION: only called within a splbio()/splx() pair */ 532 533 if (pScb == sc->HCS_ActScb) 534 sc->HCS_ActScb = NULL; 535 536 pScb->SCB_Status = STATUS_QUEUED; 537 538 TAILQ_INSERT_TAIL(&sc->HCS_PendScb, pScb, SCB_ScbList); 539 } 540 541 void 542 iha_push_pend_scb(struct iha_softc *sc, struct iha_scb *pScb) 543 { 544 int s; 545 546 s = splbio(); 547 548 if (pScb == sc->HCS_ActScb) 549 sc->HCS_ActScb = NULL; 550 551 pScb->SCB_Status = STATUS_QUEUED; 552 553 TAILQ_INSERT_HEAD(&sc->HCS_PendScb, pScb, SCB_ScbList); 554 555 splx(s); 556 } 557 558 /* 559 * iha_find_pend_scb - scan the pending queue for a SCB that can be 560 * processed immediately. Return NULL if none found 561 * and a pointer to the SCB if one is found. If there 562 * is an active SCB, return NULL! 563 */ 564 struct iha_scb * 565 iha_find_pend_scb(struct iha_softc *sc) 566 { 567 struct iha_scb *pScb; 568 struct tcs *pTcs; 569 int s; 570 571 s = splbio(); 572 573 if (sc->HCS_ActScb != NULL) 574 pScb = NULL; 575 576 else 577 TAILQ_FOREACH(pScb, &sc->HCS_PendScb, SCB_ScbList) { 578 if ((pScb->SCB_Flags & SCSI_RESET) != 0) 579 /* ALWAYS willing to reset a device */ 580 break; 581 582 pTcs = pScb->SCB_Tcs; 583 584 if ((pScb->SCB_TagMsg) != 0) { 585 /* 586 * A Tagged I/O. OK to start If no 587 * non-tagged I/O is active on the same 588 * target 589 */ 590 if (pTcs->TCS_NonTagScb == NULL) 591 break; 592 593 } else if (pScb->SCB_CDB[0] == REQUEST_SENSE) { 594 /* 595 * OK to do a non-tagged request sense 596 * even if a non-tagged I/O has been 597 * started, because we don't allow any 598 * disconnect during a request sense op 599 */ 600 break; 601 602 } else if (pTcs->TCS_TagCnt == 0) { 603 /* 604 * No tagged I/O active on this target, 605 * ok to start a non-tagged one if one 606 * is not already active 607 */ 608 if (pTcs->TCS_NonTagScb == NULL) 609 break; 610 } 611 } 612 613 splx(s); 614 615 return (pScb); 616 } 617 618 void 619 iha_mark_busy_scb(struct iha_scb *pScb) 620 { 621 int s; 622 623 s = splbio(); 624 625 pScb->SCB_Status = STATUS_BUSY; 626 627 if (pScb->SCB_TagMsg == 0) 628 pScb->SCB_Tcs->TCS_NonTagScb = pScb; 629 else 630 pScb->SCB_Tcs->TCS_TagCnt++; 631 632 splx(s); 633 } 634 635 void 636 iha_append_done_scb(struct iha_softc *sc, struct iha_scb *pScb, u_int8_t hastat) 637 { 638 struct tcs *pTcs; 639 int s; 640 641 s = splbio(); 642 643 if (pScb->SCB_Xs != NULL) 644 timeout_del(&pScb->SCB_Xs->stimeout); 645 646 if (pScb == sc->HCS_ActScb) 647 sc->HCS_ActScb = NULL; 648 649 pTcs = pScb->SCB_Tcs; 650 651 if (pScb->SCB_TagMsg != 0) { 652 if (pTcs->TCS_TagCnt) 653 pTcs->TCS_TagCnt--; 654 } else if (pTcs->TCS_NonTagScb == pScb) 655 pTcs->TCS_NonTagScb = NULL; 656 657 pScb->SCB_Status = STATUS_QUEUED; 658 pScb->SCB_HaStat = hastat; 659 660 TAILQ_INSERT_TAIL(&sc->HCS_DoneScb, pScb, SCB_ScbList); 661 662 splx(s); 663 } 664 665 struct iha_scb * 666 iha_pop_done_scb(struct iha_softc *sc) 667 { 668 struct iha_scb *pScb; 669 int s; 670 671 s = splbio(); 672 673 pScb = TAILQ_FIRST(&sc->HCS_DoneScb); 674 675 if (pScb != NULL) { 676 pScb->SCB_Status = STATUS_RENT; 677 TAILQ_REMOVE(&sc->HCS_DoneScb, pScb, SCB_ScbList); 678 } 679 680 splx(s); 681 682 return (pScb); 683 } 684 685 /* 686 * iha_abort_xs - find the SCB associated with the supplied xs and 687 * stop all processing on it, moving it to the done 688 * queue with the supplied host status value. 689 */ 690 void 691 iha_abort_xs(struct iha_softc *sc, struct scsi_xfer *xs, u_int8_t hastat) 692 { 693 struct iha_scb *pScb, *next; 694 int i, s; 695 696 s = splbio(); 697 698 /* Check the pending queue for the SCB pointing to xs */ 699 700 for (pScb = TAILQ_FIRST(&sc->HCS_PendScb); pScb != NULL; pScb = next) { 701 next = TAILQ_NEXT(pScb, SCB_ScbList); 702 if (pScb->SCB_Xs == xs) { 703 TAILQ_REMOVE(&sc->HCS_PendScb, pScb, SCB_ScbList); 704 iha_append_done_scb(sc, pScb, hastat); 705 splx(s); 706 return; 707 } 708 } 709 710 /* 711 * If that didn't work, check all BUSY/SELECTING SCB's for one 712 * pointing to xs 713 */ 714 715 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) 716 switch (pScb->SCB_Status) { 717 case STATUS_BUSY: 718 case STATUS_SELECT: 719 if (pScb->SCB_Xs == xs) { 720 iha_append_done_scb(sc, pScb, hastat); 721 splx(s); 722 return; 723 } 724 break; 725 default: 726 break; 727 } 728 729 splx(s); 730 } 731 732 /* 733 * iha_bad_seq - a SCSI bus phase was encountered out of the 734 * correct/expected sequence. Reset the SCSI bus. 735 */ 736 void 737 iha_bad_seq(struct iha_softc *sc) 738 { 739 struct iha_scb *pScb = sc->HCS_ActScb; 740 741 if (pScb != NULL) 742 iha_append_done_scb(sc, pScb, HOST_BAD_PHAS); 743 744 iha_reset_scsi_bus(sc); 745 iha_reset_chip(sc, sc->sc_iot, sc->sc_ioh); 746 } 747 748 /* 749 * iha_push_sense_request - obtain auto sense data by pushing the 750 * SCB needing it back onto the pending 751 * queue with a REQUEST_SENSE CDB. 752 */ 753 int 754 iha_push_sense_request(struct iha_softc *sc, struct iha_scb *pScb) 755 { 756 struct scsi_sense *sensecmd; 757 int error; 758 759 /* First sync & unload any existing DataDma and SGDma maps */ 760 if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) { 761 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma, 762 0, pScb->SCB_BufChars, 763 ((pScb->SCB_Flags & SCSI_DATA_IN) ? 764 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE)); 765 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma); 766 /* Don't unload this map again until it is reloaded */ 767 pScb->SCB_Flags &= ~(SCSI_DATA_IN | SCSI_DATA_OUT); 768 } 769 if ((pScb->SCB_Flags & FLAG_SG) != 0) { 770 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma, 771 0, sizeof(pScb->SCB_SGList), 772 BUS_DMASYNC_POSTWRITE); 773 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_SGDma); 774 /* Don't unload this map again until it is reloaded */ 775 pScb->SCB_Flags &= ~FLAG_SG; 776 } 777 778 pScb->SCB_BufChars = sizeof(pScb->SCB_ScsiSenseData); 779 pScb->SCB_BufCharsLeft = sizeof(pScb->SCB_ScsiSenseData); 780 bzero(&pScb->SCB_ScsiSenseData, sizeof(pScb->SCB_ScsiSenseData)); 781 782 error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_DataDma, 783 &pScb->SCB_ScsiSenseData, 784 sizeof(pScb->SCB_ScsiSenseData), NULL, 785 (pScb->SCB_Flags & SCSI_NOSLEEP) ? 786 BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 787 if (error) { 788 sc_print_addr(pScb->SCB_Xs->sc_link); 789 printf("error %d loading request sense buffer dma map\n", 790 error); 791 return (error); 792 } 793 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma, 794 0, pScb->SCB_BufChars, BUS_DMASYNC_PREREAD); 795 796 /* Save _POLL and _NOSLEEP flags. */ 797 pScb->SCB_Flags &= SCSI_POLL | SCSI_NOSLEEP; 798 pScb->SCB_Flags |= FLAG_RSENS | SCSI_DATA_IN; 799 800 error = iha_setup_sg_list(sc, pScb); 801 if (error) 802 return (error); 803 804 pScb->SCB_Ident &= ~MSG_IDENTIFY_DISCFLAG; 805 806 pScb->SCB_TagMsg = 0; 807 pScb->SCB_TaStat = SCSI_OK; 808 809 bzero(pScb->SCB_CDB, sizeof(pScb->SCB_CDB)); 810 811 sensecmd = (struct scsi_sense *)pScb->SCB_CDB; 812 pScb->SCB_CDBLen = sizeof(*sensecmd); 813 sensecmd->opcode = REQUEST_SENSE; 814 sensecmd->byte2 = pScb->SCB_Xs->sc_link->lun << 5; 815 sensecmd->length = sizeof(pScb->SCB_ScsiSenseData); 816 817 if ((pScb->SCB_Flags & SCSI_POLL) == 0) 818 timeout_add_msec(&pScb->SCB_Xs->stimeout, 819 pScb->SCB_Xs->timeout); 820 821 iha_push_pend_scb(sc, pScb); 822 823 return (0); 824 } 825 826 /* 827 * iha_main - process the active SCB, taking one off pending and making it 828 * active if necessary, and any done SCB's created as 829 * a result until there are no interrupts pending and no pending 830 * SCB's that can be started. 831 */ 832 void 833 iha_main(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 834 { 835 struct iha_scb *pScb; 836 837 for (;;) { 838 iha_scsi_label: 839 iha_scsi(sc, iot, ioh); 840 841 while ((pScb = iha_pop_done_scb(sc)) != NULL) { 842 843 switch (pScb->SCB_TaStat) { 844 case SCSI_TERMINATED: 845 case SCSI_ACA_ACTIVE: 846 case SCSI_CHECK: 847 pScb->SCB_Tcs->TCS_Flags &= 848 ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 849 850 if ((pScb->SCB_Flags & FLAG_RSENS) != 0) 851 /* Check condition on check condition*/ 852 pScb->SCB_HaStat = HOST_BAD_PHAS; 853 else if (iha_push_sense_request(sc, pScb) != 0) 854 /* Could not push sense request */ 855 pScb->SCB_HaStat = HOST_BAD_PHAS; 856 else 857 /* REQUEST SENSE ready to process */ 858 goto iha_scsi_label; 859 break; 860 861 default: 862 if ((pScb->SCB_Flags & FLAG_RSENS) != 0) 863 /* 864 * Return the original SCSI_CHECK, not 865 * the status of the request sense 866 * command! 867 */ 868 pScb->SCB_TaStat = SCSI_CHECK; 869 break; 870 } 871 872 iha_done_scb(sc, pScb); 873 } 874 875 /* 876 * If there are no interrupts pending, or we can't start 877 * a pending sc, break out of the for(;;). Otherwise 878 * continue the good work with another call to 879 * iha_scsi(). 880 */ 881 if (((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 882 && (iha_find_pend_scb(sc) == NULL)) 883 break; 884 } 885 } 886 887 /* 888 * iha_scsi - service any outstanding interrupts. If there are none, try to 889 * start another SCB currently in the pending queue. 890 */ 891 void 892 iha_scsi(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 893 { 894 struct iha_scb *pScb; 895 struct tcs *pTcs; 896 u_int8_t stat; 897 int i; 898 899 /* service pending interrupts asap */ 900 901 stat = bus_space_read_1(iot, ioh, TUL_STAT0); 902 if ((stat & INTPD) != 0) { 903 sc->HCS_JSStatus0 = stat; 904 sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1); 905 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT); 906 907 sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK; 908 909 if ((sc->HCS_JSInt & SRSTD) != 0) { 910 iha_reset_scsi_bus(sc); 911 return; 912 } 913 914 if ((sc->HCS_JSInt & RSELED) != 0) { 915 iha_resel(sc, iot, ioh); 916 return; 917 } 918 919 if ((sc->HCS_JSInt & (STIMEO | DISCD)) != 0) { 920 iha_busfree(sc, iot, ioh); 921 return; 922 } 923 924 if ((sc->HCS_JSInt & (SCMDN | SBSRV)) != 0) { 925 iha_next_state(sc, iot, ioh); 926 return; 927 } 928 929 if ((sc->HCS_JSInt & SELED) != 0) 930 iha_set_ssig(iot, ioh, 0, 0); 931 } 932 933 /* 934 * There were no interrupts pending which required action elsewhere, so 935 * see if it is possible to start the selection phase on a pending SCB 936 */ 937 if ((pScb = iha_find_pend_scb(sc)) == NULL) 938 return; 939 940 pTcs = pScb->SCB_Tcs; 941 942 /* program HBA's SCSI ID & target SCSI ID */ 943 bus_space_write_1(iot, ioh, TUL_SID, 944 (sc->sc_link.adapter_target << 4) | pScb->SCB_Target); 945 946 if ((pScb->SCB_Flags & SCSI_RESET) == 0) { 947 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 948 949 if (((pTcs->TCS_Flags & FLAG_NO_NEG_WIDE) == 0) 950 || 951 ((pTcs->TCS_Flags & FLAG_NO_NEG_SYNC) == 0)) 952 iha_select(sc, iot, ioh, pScb, SELATNSTOP); 953 954 else if (pScb->SCB_TagMsg != 0) 955 iha_select(sc, iot, ioh, pScb, SEL_ATN3); 956 957 else 958 iha_select(sc, iot, ioh, pScb, SEL_ATN); 959 960 } else { 961 iha_select(sc, iot, ioh, pScb, SELATNSTOP); 962 pScb->SCB_NxtStat = 8; 963 } 964 965 if ((pScb->SCB_Flags & SCSI_POLL) != 0) { 966 for (i = pScb->SCB_Xs->timeout; i > 0; i--) { 967 if (iha_wait(sc, iot, ioh, NO_OP) == -1) 968 break; 969 if (iha_next_state(sc, iot, ioh) == -1) 970 break; 971 delay(1000); /* Only happens in boot, so it's ok */ 972 } 973 974 /* 975 * Since done queue processing not done until AFTER this 976 * function returns, pScb is on the done queue, not 977 * the free queue at this point and still has valid data 978 * 979 * Conversely, xs->error has not been set yet 980 */ 981 if (i == 0) 982 iha_timeout(pScb); 983 984 else if ((pScb->SCB_CDB[0] == INQUIRY) 985 && (pScb->SCB_Lun == 0) 986 && (pScb->SCB_HaStat == HOST_OK) 987 && (pScb->SCB_TaStat == SCSI_OK)) 988 iha_print_info(sc, pScb->SCB_Target); 989 } 990 } 991 992 /* 993 * iha_data_over_run - return HOST_OK for all SCSI opcodes where BufCharsLeft 994 * is an 'Allocation Length'. All other SCSI opcodes 995 * get HOST_DO_DU as they SHOULD have xferred all the 996 * data requested. 997 * 998 * The list of opcodes using 'Allocation Length' was 999 * found by scanning all the SCSI-3 T10 drafts. See 1000 * www.t10.org for the curious with a .pdf reader. 1001 */ 1002 u_int8_t 1003 iha_data_over_run(struct iha_scb *pScb) 1004 { 1005 switch (pScb->SCB_CDB[0]) { 1006 case 0x03: /* Request Sense SPC-2 */ 1007 case 0x12: /* Inquiry SPC-2 */ 1008 case 0x1a: /* Mode Sense (6 byte version) SPC-2 */ 1009 case 0x1c: /* Receive Diagnostic Results SPC-2 */ 1010 case 0x23: /* Read Format Capacities MMC-2 */ 1011 case 0x29: /* Read Generation SBC */ 1012 case 0x34: /* Read Position SSC-2 */ 1013 case 0x37: /* Read Defect Data SBC */ 1014 case 0x3c: /* Read Buffer SPC-2 */ 1015 case 0x42: /* Read Sub Channel MMC-2 */ 1016 case 0x43: /* Read TOC/PMA/ATIP MMC */ 1017 1018 /* XXX - 2 with same opcode of 0x44? */ 1019 case 0x44: /* Read Header/Read Density Suprt MMC/SSC*/ 1020 1021 case 0x46: /* Get Configuration MMC-2 */ 1022 case 0x4a: /* Get Event/Status Notification MMC-2 */ 1023 case 0x4d: /* Log Sense SPC-2 */ 1024 case 0x51: /* Read Disc Information MMC */ 1025 case 0x52: /* Read Track Information MMC */ 1026 case 0x59: /* Read Master CUE MMC */ 1027 case 0x5a: /* Mode Sense (10 byte version) SPC-2 */ 1028 case 0x5c: /* Read Buffer Capacity MMC */ 1029 case 0x5e: /* Persistent Reserve In SPC-2 */ 1030 case 0x84: /* Receive Copy Results SPC-2 */ 1031 case 0xa0: /* Report LUNs SPC-2 */ 1032 case 0xa3: /* Various Report requests SBC-2/SCC-2*/ 1033 case 0xa4: /* Report Key MMC-2 */ 1034 case 0xad: /* Read DVD Structure MMC-2 */ 1035 case 0xb4: /* Read Element Status (Attached) SMC */ 1036 case 0xb5: /* Request Volume Element Address SMC */ 1037 case 0xb7: /* Read Defect Data (12 byte ver.) SBC */ 1038 case 0xb8: /* Read Element Status (Independ.) SMC */ 1039 case 0xba: /* Report Redundancy SCC-2 */ 1040 case 0xbd: /* Mechanism Status MMC */ 1041 case 0xbe: /* Report Basic Redundancy SCC-2 */ 1042 1043 return (HOST_OK); 1044 break; 1045 1046 default: 1047 return (HOST_DO_DU); 1048 break; 1049 } 1050 } 1051 1052 /* 1053 * iha_next_state - process the current SCB as requested in its 1054 * SCB_NxtStat member. 1055 */ 1056 int 1057 iha_next_state(struct iha_softc *sc, bus_space_tag_t iot, 1058 bus_space_handle_t ioh) 1059 { 1060 if (sc->HCS_ActScb == NULL) 1061 return (-1); 1062 1063 switch (sc->HCS_ActScb->SCB_NxtStat) { 1064 case 1: 1065 if (iha_state_1(sc, iot, ioh) == 3) 1066 goto state_3; 1067 break; 1068 1069 case 2: 1070 switch (iha_state_2(sc, iot, ioh)) { 1071 case 3: goto state_3; 1072 case 4: goto state_4; 1073 default: break; 1074 } 1075 break; 1076 1077 case 3: 1078 state_3: 1079 if (iha_state_3(sc, iot, ioh) == 4) 1080 goto state_4; 1081 break; 1082 1083 case 4: 1084 state_4: 1085 switch (iha_state_4(sc, iot, ioh)) { 1086 case 0: return (0); 1087 case 6: goto state_6; 1088 default: break; 1089 } 1090 break; 1091 1092 case 5: 1093 switch (iha_state_5(sc, iot, ioh)) { 1094 case 4: goto state_4; 1095 case 6: goto state_6; 1096 default: break; 1097 } 1098 break; 1099 1100 case 6: 1101 state_6: 1102 iha_state_6(sc, iot, ioh); 1103 break; 1104 1105 case 8: 1106 iha_state_8(sc, iot, ioh); 1107 break; 1108 1109 default: 1110 #ifdef IHA_DEBUG_STATE 1111 sc_print_addr(sc->HCS_ActScb->SCB_Xs->sc_link); 1112 printf("[debug] -unknown state: %i-\n", 1113 sc->HCS_ActScb->SCB_NxtStat); 1114 #endif 1115 iha_bad_seq(sc); 1116 break; 1117 } 1118 1119 return (-1); 1120 } 1121 1122 /* 1123 * iha_state_1 - selection is complete after a SELATNSTOP. If the target 1124 * has put the bus into MSG_OUT phase start wide/sync 1125 * negotiation. Otherwise clear the FIFO and go to state 3, 1126 * which will send the SCSI CDB to the target. 1127 */ 1128 int 1129 iha_state_1(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1130 { 1131 struct iha_scb *pScb = sc->HCS_ActScb; 1132 struct tcs *pTcs; 1133 u_int16_t flags; 1134 1135 iha_mark_busy_scb(pScb); 1136 1137 pTcs = pScb->SCB_Tcs; 1138 1139 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 1140 1141 /* 1142 * If we are in PHASE_MSG_OUT, send 1143 * a) IDENT message (with tags if appropriate) 1144 * b) WDTR if the target is configured to negotiate wide xfers 1145 * ** OR ** 1146 * c) SDTR if the target is configured to negotiate sync xfers 1147 * but not wide ones 1148 * 1149 * If we are NOT, then the target is not asking for anything but 1150 * the data/command, so go straight to state 3. 1151 */ 1152 if (sc->HCS_Phase == PHASE_MSG_OUT) { 1153 bus_space_write_1(iot, ioh, TUL_SCTRL1, (ESBUSIN | EHRSL)); 1154 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident); 1155 1156 if (pScb->SCB_TagMsg != 0) { 1157 bus_space_write_1(iot, ioh, TUL_SFIFO, 1158 pScb->SCB_TagMsg); 1159 bus_space_write_1(iot, ioh, TUL_SFIFO, 1160 pScb->SCB_TagId); 1161 } 1162 1163 flags = pTcs->TCS_Flags; 1164 if ((flags & FLAG_NO_NEG_WIDE) == 0) { 1165 if (iha_msgout_wdtr(sc, iot, ioh) == -1) 1166 return (-1); 1167 } else if ((flags & FLAG_NO_NEG_SYNC) == 0) { 1168 if (iha_msgout_sdtr(sc, iot, ioh) == -1) 1169 return (-1); 1170 } 1171 1172 } else { 1173 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1174 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 1175 } 1176 1177 return (3); 1178 } 1179 1180 /* 1181 * iha_state_2 - selection is complete after a SEL_ATN or SEL_ATN3. If the SCSI 1182 * CDB has already been send, go to state 4 to start the data 1183 * xfer. Otherwise reset the FIFO and go to state 3, sending 1184 * the SCSI CDB. 1185 */ 1186 int 1187 iha_state_2(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1188 { 1189 struct iha_scb *pScb = sc->HCS_ActScb; 1190 1191 iha_mark_busy_scb(pScb); 1192 1193 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pScb->SCB_Tcs->TCS_SConfig0); 1194 1195 if ((sc->HCS_JSStatus1 & CPDNE) != 0) 1196 return (4); 1197 1198 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1199 1200 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 1201 1202 return (3); 1203 } 1204 1205 /* 1206 * iha_state_3 - send the SCSI CDB to the target, processing any status 1207 * or other messages received until that is done or 1208 * abandoned. 1209 */ 1210 int 1211 iha_state_3(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1212 { 1213 struct iha_scb *pScb = sc->HCS_ActScb; 1214 u_int16_t flags; 1215 1216 for (;;) 1217 switch (sc->HCS_Phase) { 1218 case PHASE_CMD_OUT: 1219 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 1220 pScb->SCB_CDB, pScb->SCB_CDBLen); 1221 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1) 1222 return (-1); 1223 else if (sc->HCS_Phase == PHASE_CMD_OUT) { 1224 iha_bad_seq(sc); 1225 return (-1); 1226 } else 1227 return (4); 1228 1229 case PHASE_MSG_IN: 1230 pScb->SCB_NxtStat = 3; 1231 if (iha_msgin(sc, iot, ioh) == -1) 1232 return (-1); 1233 break; 1234 1235 case PHASE_STATUS_IN: 1236 if (iha_status_msg(sc, iot, ioh) == -1) 1237 return (-1); 1238 break; 1239 1240 case PHASE_MSG_OUT: 1241 flags = pScb->SCB_Tcs->TCS_Flags; 1242 if ((flags & FLAG_NO_NEG_SYNC) != 0) { 1243 if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1) 1244 return (-1); 1245 } else if (iha_msgout_sdtr(sc, iot, ioh) == -1) 1246 return (-1); 1247 break; 1248 1249 default: 1250 #ifdef IHA_DEBUG_STATE 1251 sc_print_addr(pScb->SCB_Xs->sc_link); 1252 printf("[debug] -s3- bad phase = %d\n", sc->HCS_Phase); 1253 #endif 1254 iha_bad_seq(sc); 1255 return (-1); 1256 } 1257 } 1258 1259 /* 1260 * iha_state_4 - start a data xfer. Handle any bus state 1261 * transitions until PHASE_DATA_IN/_OUT 1262 * or the attempt is abandoned. If there is 1263 * no data to xfer, go to state 6 and finish 1264 * processing the current SCB. 1265 */ 1266 int 1267 iha_state_4(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1268 { 1269 struct iha_scb *pScb = sc->HCS_ActScb; 1270 1271 if ((pScb->SCB_Flags & FLAG_DIR) == FLAG_DIR) 1272 return (6); /* Both dir flags set => NO xfer was requested */ 1273 1274 for (;;) { 1275 if (pScb->SCB_BufCharsLeft == 0) 1276 return (6); 1277 1278 switch (sc->HCS_Phase) { 1279 case PHASE_STATUS_IN: 1280 if ((pScb->SCB_Flags & FLAG_DIR) != 0) 1281 pScb->SCB_HaStat = iha_data_over_run(pScb); 1282 if ((iha_status_msg(sc, iot, ioh)) == -1) 1283 return (-1); 1284 break; 1285 1286 case PHASE_MSG_IN: 1287 pScb->SCB_NxtStat = 4; 1288 if (iha_msgin(sc, iot, ioh) == -1) 1289 return (-1); 1290 break; 1291 1292 case PHASE_MSG_OUT: 1293 if ((sc->HCS_JSStatus0 & SPERR) != 0) { 1294 pScb->SCB_BufCharsLeft = 0; 1295 pScb->SCB_HaStat = HOST_SPERR; 1296 if (iha_msgout(sc, iot, ioh, 1297 MSG_INITIATOR_DET_ERR) == -1) 1298 return (-1); 1299 else 1300 return (6); 1301 } else { 1302 if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1) 1303 return (-1); 1304 } 1305 break; 1306 1307 case PHASE_DATA_IN: 1308 return (iha_xfer_data(pScb, iot, ioh, SCSI_DATA_IN)); 1309 1310 case PHASE_DATA_OUT: 1311 return (iha_xfer_data(pScb, iot, ioh, SCSI_DATA_OUT)); 1312 1313 default: 1314 iha_bad_seq(sc); 1315 return (-1); 1316 } 1317 } 1318 } 1319 1320 /* 1321 * iha_state_5 - handle the partial or final completion of the current 1322 * data xfer. If DMA is still active stop it. If there is 1323 * more data to xfer, go to state 4 and start the xfer. 1324 * If not go to state 6 and finish the SCB. 1325 */ 1326 int 1327 iha_state_5(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1328 { 1329 struct iha_scb *pScb = sc->HCS_ActScb; 1330 struct iha_sg_element *pSg; 1331 u_int32_t cnt; 1332 u_int16_t period; 1333 u_int8_t stat; 1334 long xcnt; /* cannot use unsigned!! see code: if (xcnt < 0) */ 1335 1336 cnt = bus_space_read_4(iot, ioh, TUL_STCNT0) & TCNT; 1337 1338 /* 1339 * Stop any pending DMA activity and check for parity error. 1340 */ 1341 1342 if ((bus_space_read_1(iot, ioh, TUL_DCMD) & XDIR) != 0) { 1343 /* Input Operation */ 1344 if ((sc->HCS_JSStatus0 & SPERR) != 0) 1345 pScb->SCB_HaStat = HOST_SPERR; 1346 1347 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1348 bus_space_write_1(iot, ioh, TUL_DCTRL0, 1349 bus_space_read_1(iot, ioh, TUL_DCTRL0) | SXSTP); 1350 while (bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) 1351 ; 1352 } 1353 1354 } else { 1355 /* Output Operation */ 1356 if ((sc->HCS_JSStatus1 & SXCMP) == 0) { 1357 period = pScb->SCB_Tcs->TCS_JS_Period; 1358 if ((period & PERIOD_WIDE_SCSI) != 0) 1359 cnt += (bus_space_read_1(iot, ioh, 1360 TUL_SFIFOCNT) & FIFOC) << 1; 1361 else 1362 cnt += (bus_space_read_1(iot, ioh, 1363 TUL_SFIFOCNT) & FIFOC); 1364 } 1365 1366 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1367 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 1368 do 1369 stat = bus_space_read_1(iot, ioh, TUL_ISTUS0); 1370 while ((stat & DABT) == 0); 1371 } 1372 1373 if ((cnt == 1) && (sc->HCS_Phase == PHASE_DATA_OUT)) { 1374 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1) 1375 return (-1); 1376 cnt = 0; 1377 1378 } else if ((sc->HCS_JSStatus1 & SXCMP) == 0) 1379 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1380 } 1381 1382 if (cnt == 0) { 1383 pScb->SCB_BufCharsLeft = 0; 1384 return (6); 1385 } 1386 1387 /* Update active data pointer and restart the I/O at the new point */ 1388 1389 xcnt = pScb->SCB_BufCharsLeft - cnt; /* xcnt == bytes xferred */ 1390 pScb->SCB_BufCharsLeft = cnt; /* cnt == bytes left */ 1391 1392 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma, 1393 0, sizeof(pScb->SCB_SGList), BUS_DMASYNC_POSTWRITE); 1394 1395 if ((pScb->SCB_Flags & FLAG_SG) != 0) { 1396 pSg = &pScb->SCB_SGList[pScb->SCB_SGIdx]; 1397 for (; pScb->SCB_SGIdx < pScb->SCB_SGCount; pSg++, pScb->SCB_SGIdx++) { 1398 xcnt -= pSg->SG_Len; 1399 if (xcnt < 0) { 1400 xcnt += pSg->SG_Len; 1401 1402 pSg->SG_Addr += xcnt; 1403 pSg->SG_Len -= xcnt; 1404 1405 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma, 1406 0, sizeof(pScb->SCB_SGList), 1407 BUS_DMASYNC_PREWRITE); 1408 1409 return (4); 1410 } 1411 } 1412 return (6); 1413 1414 } 1415 1416 return (4); 1417 } 1418 1419 /* 1420 * iha_state_6 - finish off the active scb (may require several 1421 * iterations if PHASE_MSG_IN) and return -1 to indicate 1422 * the bus is free. 1423 */ 1424 int 1425 iha_state_6(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1426 { 1427 for (;;) 1428 switch (sc->HCS_Phase) { 1429 case PHASE_STATUS_IN: 1430 if (iha_status_msg(sc, iot, ioh) == -1) 1431 return (-1); 1432 break; 1433 1434 case PHASE_MSG_IN: 1435 sc->HCS_ActScb->SCB_NxtStat = 6; 1436 if ((iha_msgin(sc, iot, ioh)) == -1) 1437 return (-1); 1438 break; 1439 1440 case PHASE_MSG_OUT: 1441 if ((iha_msgout(sc, iot, ioh, MSG_NOOP)) == -1) 1442 return (-1); 1443 break; 1444 1445 case PHASE_DATA_IN: 1446 if (iha_xpad_in(sc, iot, ioh) == -1) 1447 return (-1); 1448 break; 1449 1450 case PHASE_DATA_OUT: 1451 if (iha_xpad_out(sc, iot, ioh) == -1) 1452 return (-1); 1453 break; 1454 1455 default: 1456 iha_bad_seq(sc); 1457 return (-1); 1458 } 1459 } 1460 1461 /* 1462 * iha_state_8 - reset the active device and all busy SCBs using it 1463 */ 1464 int 1465 iha_state_8(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1466 { 1467 struct iha_scb *pScb; 1468 u_int32_t i; 1469 u_int8_t tar; 1470 1471 if (sc->HCS_Phase == PHASE_MSG_OUT) { 1472 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_BUS_DEV_RESET); 1473 1474 pScb = sc->HCS_ActScb; 1475 1476 /* This SCB finished correctly -- resetting the device */ 1477 iha_append_done_scb(sc, pScb, HOST_OK); 1478 1479 iha_reset_tcs(pScb->SCB_Tcs, sc->HCS_SConf1); 1480 1481 tar = pScb->SCB_Target; 1482 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) 1483 if (pScb->SCB_Target == tar) 1484 switch (pScb->SCB_Status) { 1485 case STATUS_BUSY: 1486 iha_append_done_scb(sc, 1487 pScb, HOST_DEV_RST); 1488 break; 1489 1490 case STATUS_SELECT: 1491 iha_push_pend_scb(sc, pScb); 1492 break; 1493 1494 default: 1495 break; 1496 } 1497 1498 sc->HCS_Flags |= FLAG_EXPECT_DISC; 1499 1500 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1) 1501 return (-1); 1502 } 1503 1504 iha_bad_seq(sc); 1505 return (-1); 1506 } 1507 1508 /* 1509 * iha_xfer_data - initiate the DMA xfer of the data 1510 */ 1511 int 1512 iha_xfer_data(struct iha_scb *pScb, bus_space_tag_t iot, bus_space_handle_t ioh, 1513 int direction) 1514 { 1515 u_int32_t xferaddr, xferlen; 1516 u_int8_t xfertype; 1517 1518 if ((pScb->SCB_Flags & FLAG_DIR) != direction) 1519 return (6); /* wrong direction, abandon I/O */ 1520 1521 bus_space_write_4(iot, ioh, TUL_STCNT0, pScb->SCB_BufCharsLeft); 1522 1523 if ((pScb->SCB_Flags & FLAG_SG) == 0) { 1524 xferaddr = pScb->SCB_DataDma->dm_segs[0].ds_addr 1525 + (pScb->SCB_BufChars - pScb->SCB_BufCharsLeft); 1526 xferlen = pScb->SCB_BufCharsLeft; 1527 xfertype = (direction == SCSI_DATA_IN) ? ST_X_IN : ST_X_OUT; 1528 1529 } else { 1530 xferaddr = pScb->SCB_SGDma->dm_segs[0].ds_addr 1531 + (pScb->SCB_SGIdx * sizeof(struct iha_sg_element)); 1532 xferlen = (pScb->SCB_SGCount - pScb->SCB_SGIdx) 1533 * sizeof(struct iha_sg_element); 1534 xfertype = (direction == SCSI_DATA_IN) ? ST_SG_IN : ST_SG_OUT; 1535 } 1536 1537 bus_space_write_4(iot, ioh, TUL_DXC, xferlen); 1538 bus_space_write_4(iot, ioh, TUL_DXPA, xferaddr); 1539 bus_space_write_1(iot, ioh, TUL_DCMD, xfertype); 1540 1541 bus_space_write_1(iot, ioh, TUL_SCMD, 1542 (direction == SCSI_DATA_IN) ? XF_DMA_IN : XF_DMA_OUT); 1543 1544 pScb->SCB_NxtStat = 5; 1545 1546 return (0); 1547 } 1548 1549 int 1550 iha_xpad_in(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1551 { 1552 struct iha_scb *pScb = sc->HCS_ActScb; 1553 1554 if ((pScb->SCB_Flags & FLAG_DIR) != 0) 1555 pScb->SCB_HaStat = HOST_DO_DU; 1556 1557 for (;;) { 1558 if ((pScb->SCB_Tcs->TCS_JS_Period & PERIOD_WIDE_SCSI) != 0) 1559 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1560 else 1561 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1562 1563 switch (iha_wait(sc, iot, ioh, XF_FIFO_IN)) { 1564 case -1: 1565 return (-1); 1566 1567 case PHASE_DATA_IN: 1568 bus_space_read_1(iot, ioh, TUL_SFIFO); 1569 break; 1570 1571 default: 1572 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1573 return (6); 1574 } 1575 } 1576 } 1577 1578 int 1579 iha_xpad_out(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1580 { 1581 struct iha_scb *pScb = sc->HCS_ActScb; 1582 1583 if ((pScb->SCB_Flags & FLAG_DIR) != 0) 1584 pScb->SCB_HaStat = HOST_DO_DU; 1585 1586 for (;;) { 1587 if ((pScb->SCB_Tcs->TCS_JS_Period & PERIOD_WIDE_SCSI) != 0) 1588 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1589 else 1590 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1591 1592 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1593 1594 switch (iha_wait(sc, iot, ioh, XF_FIFO_OUT)) { 1595 case -1: 1596 return (-1); 1597 1598 case PHASE_DATA_OUT: 1599 break; 1600 1601 default: 1602 /* Disable wide CPU to allow read 16 bits */ 1603 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1604 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1605 return (6); 1606 } 1607 } 1608 } 1609 1610 int 1611 iha_status_msg(struct iha_softc *sc, bus_space_tag_t iot, 1612 bus_space_handle_t ioh) 1613 { 1614 struct iha_scb *pScb; 1615 u_int8_t msg; 1616 int phase; 1617 1618 if ((phase = iha_wait(sc, iot, ioh, CMD_COMP)) == -1) 1619 return (-1); 1620 1621 pScb = sc->HCS_ActScb; 1622 1623 pScb->SCB_TaStat = bus_space_read_1(iot, ioh, TUL_SFIFO); 1624 1625 if (phase == PHASE_MSG_OUT) { 1626 if ((sc->HCS_JSStatus0 & SPERR) == 0) 1627 bus_space_write_1(iot, ioh, TUL_SFIFO, 1628 MSG_NOOP); 1629 else 1630 bus_space_write_1(iot, ioh, TUL_SFIFO, 1631 MSG_PARITY_ERROR); 1632 1633 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT)); 1634 1635 } else if (phase == PHASE_MSG_IN) { 1636 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1637 1638 if ((sc->HCS_JSStatus0 & SPERR) != 0) 1639 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 1640 case -1: 1641 return (-1); 1642 case PHASE_MSG_OUT: 1643 bus_space_write_1(iot, ioh, TUL_SFIFO, 1644 MSG_PARITY_ERROR); 1645 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT)); 1646 default: 1647 iha_bad_seq(sc); 1648 return (-1); 1649 } 1650 1651 if (msg == MSG_CMDCOMPLETE) { 1652 if ((pScb->SCB_TaStat 1653 & (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) { 1654 iha_bad_seq(sc); 1655 return (-1); 1656 } 1657 sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC; 1658 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1659 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 1660 } 1661 1662 if ((msg == MSG_LINK_CMD_COMPLETE) 1663 || (msg == MSG_LINK_CMD_COMPLETEF)) { 1664 if ((pScb->SCB_TaStat 1665 & (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) 1666 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 1667 } 1668 } 1669 1670 iha_bad_seq(sc); 1671 return (-1); 1672 } 1673 1674 /* 1675 * iha_busfree - SCSI bus free detected as a result of a TIMEOUT or 1676 * DISCONNECT interrupt. Reset the tulip FIFO and 1677 * SCONFIG0 and enable hardware reselect. Move any active 1678 * SCB to HCS_DoneScb list. Return an appropriate host status 1679 * if an I/O was active. 1680 */ 1681 void 1682 iha_busfree(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1683 { 1684 struct iha_scb *pScb; 1685 1686 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1687 bus_space_write_1(iot, ioh, TUL_SCONFIG0, SCONFIG0DEFAULT); 1688 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1689 1690 pScb = sc->HCS_ActScb; 1691 1692 if (pScb != NULL) { 1693 if (pScb->SCB_Status == STATUS_SELECT) 1694 /* selection timeout */ 1695 iha_append_done_scb(sc, pScb, HOST_SEL_TOUT); 1696 else 1697 /* Unexpected bus free */ 1698 iha_append_done_scb(sc, pScb, HOST_BAD_PHAS); 1699 1700 } 1701 } 1702 1703 void 1704 iha_reset_scsi_bus(struct iha_softc *sc) 1705 { 1706 struct iha_scb *pScb; 1707 struct tcs *pTcs; 1708 int i, s; 1709 1710 s = splbio(); 1711 1712 iha_reset_dma(sc->sc_iot, sc->sc_ioh); 1713 1714 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) 1715 switch (pScb->SCB_Status) { 1716 case STATUS_BUSY: 1717 iha_append_done_scb(sc, pScb, HOST_SCSI_RST); 1718 break; 1719 1720 case STATUS_SELECT: 1721 iha_push_pend_scb(sc, pScb); 1722 break; 1723 1724 default: 1725 break; 1726 } 1727 1728 for (i = 0, pTcs = sc->HCS_Tcs; i < IHA_MAX_TARGETS; i++, pTcs++) 1729 iha_reset_tcs(pTcs, sc->HCS_SConf1); 1730 1731 splx(s); 1732 } 1733 1734 /* 1735 * iha_resel - handle a detected SCSI bus reselection request. 1736 */ 1737 int 1738 iha_resel(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1739 { 1740 struct iha_scb *pScb; 1741 struct tcs *pTcs; 1742 u_int8_t tag, target, lun, msg, abortmsg; 1743 1744 if (sc->HCS_ActScb != NULL) { 1745 if (sc->HCS_ActScb->SCB_Status == STATUS_SELECT) 1746 iha_push_pend_scb(sc, sc->HCS_ActScb); 1747 sc->HCS_ActScb = NULL; 1748 } 1749 1750 target = bus_space_read_1(iot, ioh, TUL_SBID); 1751 lun = bus_space_read_1(iot, ioh, TUL_SALVC) & MSG_IDENTIFY_LUNMASK; 1752 1753 pTcs = &sc->HCS_Tcs[target]; 1754 1755 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 1756 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 1757 1758 abortmsg = MSG_ABORT; /* until a valid tag has been obtained */ 1759 1760 if (pTcs->TCS_NonTagScb != NULL) 1761 /* There is a non-tagged I/O active on the target */ 1762 pScb = pTcs->TCS_NonTagScb; 1763 1764 else { 1765 /* 1766 * Since there is no active non-tagged operation 1767 * read the tag type, the tag itself, and find 1768 * the appropriate pScb by indexing HCS_Scb with 1769 * the tag. 1770 */ 1771 1772 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 1773 case -1: 1774 return (-1); 1775 case PHASE_MSG_IN: 1776 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1777 if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1) 1778 return (-1); 1779 break; 1780 default: 1781 goto abort; 1782 } 1783 1784 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag Msg */ 1785 1786 if ((msg < MSG_SIMPLE_Q_TAG) || (msg > MSG_ORDERED_Q_TAG)) 1787 goto abort; 1788 1789 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 1790 case -1: 1791 return (-1); 1792 case PHASE_MSG_IN: 1793 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1794 if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1) 1795 return (-1); 1796 break; 1797 default: 1798 goto abort; 1799 } 1800 1801 tag = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag ID */ 1802 pScb = &sc->HCS_Scb[tag]; 1803 1804 abortmsg = MSG_ABORT_TAG; /* Now that we have valdid tag! */ 1805 } 1806 1807 if ((pScb->SCB_Target != target) 1808 || (pScb->SCB_Lun != lun) 1809 || (pScb->SCB_Status != STATUS_BUSY)) { 1810 abort: 1811 iha_msgout_abort(sc, iot, ioh, abortmsg); 1812 return (-1); 1813 } 1814 1815 sc->HCS_ActScb = pScb; 1816 1817 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == -1) 1818 return (-1); 1819 1820 return(iha_next_state(sc, iot, ioh)); 1821 } 1822 1823 int 1824 iha_msgin(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 1825 { 1826 u_int16_t flags; 1827 u_int8_t msg; 1828 int phase; 1829 1830 for (;;) { 1831 if ((bus_space_read_1(iot, ioh, TUL_SFIFOCNT) & FIFOC) > 0) 1832 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1833 1834 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1835 1836 phase = iha_wait(sc, iot, ioh, XF_FIFO_IN); 1837 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1838 1839 switch (msg) { 1840 case MSG_DISCONNECT: 1841 sc->HCS_Flags |= FLAG_EXPECT_DISC; 1842 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) != -1) 1843 iha_bad_seq(sc); 1844 phase = -1; 1845 break; 1846 case MSG_SAVEDATAPOINTER: 1847 case MSG_RESTOREPOINTERS: 1848 case MSG_NOOP: 1849 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1850 break; 1851 case MSG_MESSAGE_REJECT: 1852 /* XXX - need to clear FIFO like other 'Clear ATN'?*/ 1853 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 1854 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags; 1855 if ((flags & FLAG_NO_NEG_SYNC) == 0) 1856 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 1857 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1858 break; 1859 case MSG_EXTENDED: 1860 phase = iha_msgin_extended(sc, iot, ioh); 1861 break; 1862 case MSG_IGN_WIDE_RESIDUE: 1863 phase = iha_msgin_ignore_wid_resid(sc, iot, ioh); 1864 break; 1865 case MSG_CMDCOMPLETE: 1866 sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC; 1867 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1868 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1869 if (phase != -1) { 1870 iha_bad_seq(sc); 1871 return (-1); 1872 } 1873 break; 1874 default: 1875 #ifdef IHA_DEBUG_STATE 1876 printf("[debug] iha_msgin: bad msg type: %d\n", msg); 1877 #endif 1878 phase = iha_msgout_reject(sc, iot, ioh); 1879 break; 1880 } 1881 1882 if (phase != PHASE_MSG_IN) 1883 return (phase); 1884 } 1885 /* NOTREACHED */ 1886 } 1887 1888 int 1889 iha_msgin_ignore_wid_resid(struct iha_softc *sc, bus_space_tag_t iot, 1890 bus_space_handle_t ioh) 1891 { 1892 int phase; 1893 1894 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1895 1896 if (phase == PHASE_MSG_IN) { 1897 phase = iha_wait(sc, iot, ioh, XF_FIFO_IN); 1898 1899 if (phase != -1) { 1900 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1901 bus_space_read_1 (iot, ioh, TUL_SFIFO); 1902 bus_space_read_1 (iot, ioh, TUL_SFIFO); 1903 1904 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1905 } 1906 } 1907 1908 return (phase); 1909 } 1910 1911 int 1912 iha_msgin_extended(struct iha_softc *sc, bus_space_tag_t iot, 1913 bus_space_handle_t ioh) 1914 { 1915 u_int16_t flags; 1916 int i, phase, msglen, msgcode; 1917 1918 /* XXX - can we just stop reading and reject, or do we have to 1919 * read all input, discarding the excess, and then reject 1920 */ 1921 for (i = 0; i < IHA_MAX_EXTENDED_MSG; i++) { 1922 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1923 1924 if (phase != PHASE_MSG_IN) 1925 return (phase); 1926 1927 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1928 1929 if (iha_wait(sc, iot, ioh, XF_FIFO_IN) == -1) 1930 return (-1); 1931 1932 sc->HCS_Msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO); 1933 1934 if (sc->HCS_Msg[0] == i) 1935 break; 1936 } 1937 1938 msglen = sc->HCS_Msg[0]; 1939 msgcode = sc->HCS_Msg[1]; 1940 1941 if ((msglen == MSG_EXT_SDTR_LEN) && (msgcode == MSG_EXT_SDTR)) { 1942 if (iha_msgin_sdtr(sc) == 0) { 1943 iha_sync_done(sc, iot, ioh); 1944 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 1945 } 1946 1947 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 1948 1949 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1950 if (phase != PHASE_MSG_OUT) 1951 return (phase); 1952 1953 /* Clear FIFO for important message - final SYNC offer */ 1954 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1955 1956 iha_sync_done(sc, iot, ioh); /* This is our final offer */ 1957 1958 } else if ((msglen == MSG_EXT_WDTR_LEN) && (msgcode == MSG_EXT_WDTR)) { 1959 1960 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags; 1961 1962 if ((flags & FLAG_NO_WIDE) != 0) 1963 /* Offer 8 bit xfers only */ 1964 sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_8_BIT; 1965 1966 else if (sc->HCS_Msg[2] > MSG_EXT_WDTR_BUS_32_BIT) 1967 return (iha_msgout_reject(sc, iot, ioh)); 1968 1969 else if (sc->HCS_Msg[2] == MSG_EXT_WDTR_BUS_32_BIT) 1970 /* Offer 16 instead */ 1971 sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_32_BIT; 1972 1973 else { 1974 iha_wide_done(sc, iot, ioh); 1975 if ((flags & FLAG_NO_NEG_SYNC) == 0) 1976 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 1977 return (iha_wait(sc, iot, ioh, MSG_ACCEPT)); 1978 } 1979 1980 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 1981 1982 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT); 1983 if (phase != PHASE_MSG_OUT) 1984 return (phase); 1985 1986 } else 1987 return (iha_msgout_reject(sc, iot, ioh)); 1988 1989 /* Send message built in sc->HCS_Msg[] */ 1990 return (iha_msgout_extended(sc, iot, ioh)); 1991 } 1992 1993 /* 1994 * iha_msgin_sdtr - check SDTR msg in HCS_Msg. If the offer is 1995 * acceptable leave HCS_Msg as is and return 0. 1996 * If the negotiation must continue, modify HCS_Msg 1997 * as needed and return 1. Else return 0. 1998 */ 1999 int 2000 iha_msgin_sdtr(struct iha_softc *sc) 2001 { 2002 u_int16_t flags; 2003 u_int8_t default_period; 2004 int newoffer; 2005 2006 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags; 2007 2008 default_period = iha_rate_tbl[flags & FLAG_SCSI_RATE]; 2009 2010 if (sc->HCS_Msg[3] == 0) /* target offered async only. Accept it. */ 2011 return (0); 2012 2013 newoffer = 0; 2014 2015 if ((flags & FLAG_NO_SYNC) != 0) { 2016 sc->HCS_Msg[3] = 0; 2017 newoffer = 1; 2018 } 2019 2020 if (sc->HCS_Msg[3] > IHA_MAX_TARGETS-1) { 2021 sc->HCS_Msg[3] = IHA_MAX_TARGETS-1; 2022 newoffer = 1; 2023 } 2024 2025 if (sc->HCS_Msg[2] < default_period) { 2026 sc->HCS_Msg[2] = default_period; 2027 newoffer = 1; 2028 } 2029 2030 if (sc->HCS_Msg[2] >= 59) { 2031 sc->HCS_Msg[3] = 0; 2032 newoffer = 1; 2033 } 2034 2035 return (newoffer); 2036 } 2037 2038 int 2039 iha_msgout(struct iha_softc *sc, bus_space_tag_t iot, 2040 bus_space_handle_t ioh, u_int8_t msg) 2041 { 2042 bus_space_write_1(iot, ioh, TUL_SFIFO, msg); 2043 2044 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT)); 2045 } 2046 2047 void 2048 iha_msgout_abort(struct iha_softc *sc, bus_space_tag_t iot, 2049 bus_space_handle_t ioh, u_int8_t aborttype) 2050 { 2051 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2052 2053 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) { 2054 case -1: 2055 break; 2056 2057 case PHASE_MSG_OUT: 2058 sc->HCS_Flags |= FLAG_EXPECT_DISC; 2059 if (iha_msgout(sc, iot, ioh, aborttype) != -1) 2060 iha_bad_seq(sc); 2061 break; 2062 2063 default: 2064 iha_bad_seq(sc); 2065 break; 2066 } 2067 } 2068 2069 int 2070 iha_msgout_reject(struct iha_softc *sc, bus_space_tag_t iot, 2071 bus_space_handle_t ioh) 2072 { 2073 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN); 2074 2075 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == PHASE_MSG_OUT) 2076 return (iha_msgout(sc, iot, ioh, MSG_MESSAGE_REJECT)); 2077 2078 return (-1); 2079 } 2080 2081 int 2082 iha_msgout_extended(struct iha_softc *sc, bus_space_tag_t iot, 2083 bus_space_handle_t ioh) 2084 { 2085 int phase; 2086 2087 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_EXTENDED); 2088 2089 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2090 sc->HCS_Msg, sc->HCS_Msg[0]+1); 2091 2092 phase = iha_wait(sc, iot, ioh, XF_FIFO_OUT); 2093 2094 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2095 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0); 2096 2097 return (phase); 2098 } 2099 2100 int 2101 iha_msgout_wdtr(struct iha_softc *sc, bus_space_tag_t iot, 2102 bus_space_handle_t ioh) 2103 { 2104 sc->HCS_ActScb->SCB_Tcs->TCS_Flags |= FLAG_WIDE_DONE; 2105 2106 sc->HCS_Msg[0] = MSG_EXT_WDTR_LEN; 2107 sc->HCS_Msg[1] = MSG_EXT_WDTR; 2108 sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_16_BIT; 2109 2110 return (iha_msgout_extended(sc, iot, ioh)); 2111 } 2112 2113 int 2114 iha_msgout_sdtr(struct iha_softc *sc, bus_space_tag_t iot, 2115 bus_space_handle_t ioh) 2116 { 2117 u_int16_t rateindex; 2118 u_int8_t sync_rate; 2119 2120 rateindex = sc->HCS_ActScb->SCB_Tcs->TCS_Flags & FLAG_SCSI_RATE; 2121 2122 sync_rate = iha_rate_tbl[rateindex]; 2123 2124 sc->HCS_Msg[0] = MSG_EXT_SDTR_LEN; 2125 sc->HCS_Msg[1] = MSG_EXT_SDTR; 2126 sc->HCS_Msg[2] = sync_rate; 2127 sc->HCS_Msg[3] = IHA_MAX_TARGETS-1; /* REQ/ACK */ 2128 2129 return (iha_msgout_extended(sc, iot, ioh)); 2130 } 2131 2132 void 2133 iha_wide_done(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 2134 { 2135 struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs; 2136 2137 pTcs->TCS_JS_Period = 0; 2138 2139 if (sc->HCS_Msg[2] != 0) 2140 pTcs->TCS_JS_Period |= PERIOD_WIDE_SCSI; 2141 2142 pTcs->TCS_SConfig0 &= ~ALTPD; 2143 pTcs->TCS_Flags &= ~FLAG_SYNC_DONE; 2144 pTcs->TCS_Flags |= FLAG_WIDE_DONE; 2145 2146 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 2147 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 2148 } 2149 2150 void 2151 iha_sync_done(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh) 2152 { 2153 struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs; 2154 int i; 2155 2156 if ((pTcs->TCS_Flags & FLAG_SYNC_DONE) == 0) { 2157 if (sc->HCS_Msg[3] != 0) { 2158 pTcs->TCS_JS_Period |= sc->HCS_Msg[3]; 2159 2160 /* pick the highest possible rate */ 2161 for (i = 0; i < sizeof(iha_rate_tbl); i++) 2162 if (iha_rate_tbl[i] >= sc->HCS_Msg[2]) 2163 break; 2164 2165 pTcs->TCS_JS_Period |= (i << 4); 2166 pTcs->TCS_SConfig0 |= ALTPD; 2167 } 2168 2169 pTcs->TCS_Flags |= FLAG_SYNC_DONE; 2170 2171 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0); 2172 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period); 2173 } 2174 } 2175 2176 void 2177 iha_reset_chip(struct iha_softc *sc, bus_space_tag_t iot, 2178 bus_space_handle_t ioh) 2179 { 2180 int i; 2181 2182 /* reset tulip chip */ 2183 2184 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSCSI); 2185 2186 do 2187 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT); 2188 while((sc->HCS_JSInt & SRSTD) == 0); 2189 2190 iha_set_ssig(iot, ioh, 0, 0); 2191 2192 /* 2193 * Stall for 2 seconds, wait for target's firmware ready. 2194 */ 2195 for (i = 0; i < 2000; i++) 2196 DELAY (1000); 2197 2198 bus_space_read_1(iot, ioh, TUL_SISTAT); /* Clear any active interrupt*/ 2199 } 2200 2201 void 2202 iha_select(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh, 2203 struct iha_scb *pScb, u_int8_t select_type) 2204 { 2205 int s; 2206 2207 switch (select_type) { 2208 case SEL_ATN: 2209 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident); 2210 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2211 pScb->SCB_CDB, pScb->SCB_CDBLen); 2212 2213 pScb->SCB_NxtStat = 2; 2214 break; 2215 2216 case SELATNSTOP: 2217 pScb->SCB_NxtStat = 1; 2218 break; 2219 2220 case SEL_ATN3: 2221 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident); 2222 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_TagMsg); 2223 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_TagId); 2224 2225 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, pScb->SCB_CDB, 2226 pScb->SCB_CDBLen); 2227 2228 pScb->SCB_NxtStat = 2; 2229 break; 2230 2231 default: 2232 #ifdef IHA_DEBUG_STATE 2233 sc_print_addr(pScb->SCB_Xs->sc_link); 2234 printf("[debug] iha_select() - unknown select type = 0x%02x\n", 2235 select_type); 2236 #endif 2237 return; 2238 } 2239 2240 s = splbio(); 2241 TAILQ_REMOVE(&sc->HCS_PendScb, pScb, SCB_ScbList); 2242 splx(s); 2243 2244 pScb->SCB_Status = STATUS_SELECT; 2245 2246 sc->HCS_ActScb = pScb; 2247 2248 bus_space_write_1(iot, ioh, TUL_SCMD, select_type); 2249 } 2250 2251 /* 2252 * iha_wait - wait for an interrupt to service or a SCSI bus phase change 2253 * after writing the supplied command to the tulip chip. If 2254 * the command is NO_OP, skip the command writing. 2255 */ 2256 int 2257 iha_wait(struct iha_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh, 2258 u_int8_t cmd) 2259 { 2260 if (cmd != NO_OP) 2261 bus_space_write_1(iot, ioh, TUL_SCMD, cmd); 2262 2263 /* 2264 * Have to do this here, in addition to in iha_isr, because 2265 * interrupts might be turned off when we get here. 2266 */ 2267 do 2268 sc->HCS_JSStatus0 = bus_space_read_1(iot, ioh, TUL_STAT0); 2269 while ((sc->HCS_JSStatus0 & INTPD) == 0); 2270 2271 sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1); 2272 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT); 2273 2274 sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK; 2275 2276 if ((sc->HCS_JSInt & SRSTD) != 0) { 2277 /* SCSI bus reset interrupt */ 2278 iha_reset_scsi_bus(sc); 2279 return (-1); 2280 } 2281 2282 if ((sc->HCS_JSInt & RSELED) != 0) 2283 /* Reselection interrupt */ 2284 return (iha_resel(sc, iot, ioh)); 2285 2286 if ((sc->HCS_JSInt & STIMEO) != 0) { 2287 /* selected/reselected timeout interrupt */ 2288 iha_busfree(sc, iot, ioh); 2289 return (-1); 2290 } 2291 2292 if ((sc->HCS_JSInt & DISCD) != 0) { 2293 /* BUS disconnection interrupt */ 2294 if ((sc->HCS_Flags & FLAG_EXPECT_DONE_DISC) != 0) { 2295 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2296 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2297 SCONFIG0DEFAULT); 2298 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2299 iha_append_done_scb(sc, sc->HCS_ActScb, HOST_OK); 2300 sc->HCS_Flags &= ~FLAG_EXPECT_DONE_DISC; 2301 2302 } else if ((sc->HCS_Flags & FLAG_EXPECT_DISC) != 0) { 2303 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2304 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2305 SCONFIG0DEFAULT); 2306 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2307 sc->HCS_ActScb = NULL; 2308 sc->HCS_Flags &= ~FLAG_EXPECT_DISC; 2309 2310 } else 2311 iha_busfree(sc, iot, ioh); 2312 2313 return (-1); 2314 } 2315 2316 return (sc->HCS_Phase); 2317 } 2318 2319 /* 2320 * iha_done_scb - We have a scb which has been processed by the 2321 * adaptor, now we look to see how the operation went. 2322 */ 2323 void 2324 iha_done_scb(struct iha_softc *sc, struct iha_scb *pScb) 2325 { 2326 struct scsi_sense_data *s1, *s2; 2327 struct scsi_xfer *xs = pScb->SCB_Xs; 2328 2329 if (xs != NULL) { 2330 timeout_del(&xs->stimeout); 2331 2332 xs->status = pScb->SCB_TaStat; 2333 2334 if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) { 2335 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma, 2336 0, pScb->SCB_BufChars, 2337 ((pScb->SCB_Flags & SCSI_DATA_IN) ? 2338 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE)); 2339 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma); 2340 } 2341 if ((pScb->SCB_Flags & FLAG_SG) != 0) { 2342 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma, 2343 0, sizeof(pScb->SCB_SGList), 2344 BUS_DMASYNC_POSTWRITE); 2345 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_SGDma); 2346 } 2347 2348 switch (pScb->SCB_HaStat) { 2349 case HOST_OK: 2350 switch (pScb->SCB_TaStat) { 2351 case SCSI_OK: 2352 case SCSI_COND_MET: 2353 case SCSI_INTERM: 2354 case SCSI_INTERM_COND_MET: 2355 xs->resid = pScb->SCB_BufCharsLeft; 2356 xs->error = XS_NOERROR; 2357 break; 2358 2359 case SCSI_RESV_CONFLICT: 2360 case SCSI_BUSY: 2361 case SCSI_QUEUE_FULL: 2362 xs->error = XS_BUSY; 2363 break; 2364 2365 case SCSI_TERMINATED: 2366 case SCSI_ACA_ACTIVE: 2367 case SCSI_CHECK: 2368 s1 = &pScb->SCB_ScsiSenseData; 2369 s2 = &xs->sense; 2370 *s2 = *s1; 2371 2372 xs->error = XS_SENSE; 2373 break; 2374 2375 default: 2376 xs->error = XS_DRIVER_STUFFUP; 2377 break; 2378 } 2379 break; 2380 2381 case HOST_SEL_TOUT: 2382 xs->error = XS_SELTIMEOUT; 2383 break; 2384 2385 case HOST_SCSI_RST: 2386 case HOST_DEV_RST: 2387 xs->error = XS_RESET; 2388 break; 2389 2390 case HOST_SPERR: 2391 sc_print_addr(xs->sc_link); 2392 printf("SCSI Parity error detected\n"); 2393 xs->error = XS_DRIVER_STUFFUP; 2394 break; 2395 2396 case HOST_TIMED_OUT: 2397 xs->error = XS_TIMEOUT; 2398 break; 2399 2400 case HOST_DO_DU: 2401 case HOST_BAD_PHAS: 2402 default: 2403 xs->error = XS_DRIVER_STUFFUP; 2404 break; 2405 } 2406 scsi_done(xs); 2407 } 2408 } 2409 2410 void 2411 iha_timeout(void *arg) 2412 { 2413 struct iha_scb *pScb = (struct iha_scb *)arg; 2414 struct scsi_xfer *xs = pScb->SCB_Xs; 2415 2416 if (xs != NULL) { 2417 sc_print_addr(xs->sc_link); 2418 printf("SCSI OpCode 0x%02x timed out\n", xs->cmd->opcode); 2419 iha_abort_xs(xs->sc_link->adapter_softc, xs, HOST_TIMED_OUT); 2420 } 2421 } 2422 2423 void 2424 iha_exec_scb(struct iha_softc *sc, struct iha_scb *pScb) 2425 { 2426 struct scsi_xfer *xs = pScb->SCB_Xs; 2427 bus_space_handle_t ioh; 2428 bus_space_tag_t iot; 2429 int s; 2430 2431 s = splbio(); 2432 2433 if ((pScb->SCB_Flags & SCSI_POLL) == 0) 2434 timeout_add_msec(&xs->stimeout, xs->timeout); 2435 2436 if (((pScb->SCB_Flags & SCSI_RESET) != 0) 2437 || (pScb->SCB_CDB[0] == REQUEST_SENSE)) 2438 iha_push_pend_scb(sc, pScb); /* Insert SCB at head of Pend */ 2439 else 2440 iha_append_pend_scb(sc, pScb); /* Append SCB to tail of Pend */ 2441 2442 /* 2443 * Run through iha_main() to ensure something is active, if 2444 * only this new SCB. 2445 */ 2446 if (sc->HCS_Semaph != SEMAPH_IN_MAIN) { 2447 iot = sc->sc_iot; 2448 ioh = sc->sc_ioh; 2449 2450 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 2451 sc->HCS_Semaph = SEMAPH_IN_MAIN; 2452 2453 splx(s); 2454 iha_main(sc, iot, ioh); 2455 s = splbio(); 2456 2457 sc->HCS_Semaph = ~SEMAPH_IN_MAIN; 2458 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 2459 } 2460 2461 splx(s); 2462 } 2463 2464 2465 /* 2466 * iha_set_ssig - read the current scsi signal mask, then write a new 2467 * one which turns off/on the specified signals. 2468 */ 2469 void 2470 iha_set_ssig(bus_space_tag_t iot, bus_space_handle_t ioh, u_int8_t offsigs, 2471 u_int8_t onsigs) 2472 { 2473 u_int8_t currsigs; 2474 2475 currsigs = bus_space_read_1(iot, ioh, TUL_SSIGI); 2476 bus_space_write_1(iot, ioh, TUL_SSIGO, (currsigs & ~offsigs) | onsigs); 2477 } 2478 2479 void 2480 iha_print_info(struct iha_softc *sc, int target) 2481 { 2482 u_int8_t period = sc->HCS_Tcs[target].TCS_JS_Period; 2483 u_int8_t config = sc->HCS_Tcs[target].TCS_SConfig0; 2484 int rate; 2485 2486 printf("%s: target %d using %d bit ", sc->sc_dev.dv_xname, target, 2487 (period & PERIOD_WIDE_SCSI) ? 16 : 8); 2488 2489 if ((period & PERIOD_SYOFS) == 0) 2490 printf("async "); 2491 else { 2492 rate = (period & PERIOD_SYXPD) >> 4; 2493 if ((config & ALTPD) == 0) 2494 rate = 100 + rate * 50; 2495 else 2496 rate = 50 + rate * 25; 2497 rate = 1000000000 / rate; 2498 printf("%d.%d MHz %d REQ/ACK offset ", rate / 1000000, 2499 (rate % 1000000 + 99999) / 100000, period & PERIOD_SYOFS); 2500 } 2501 2502 printf("xfers\n"); 2503 } 2504 2505 2506 /* 2507 * iha_alloc_scbs - allocate and map the SCB's for the supplied iha_softc 2508 */ 2509 int 2510 iha_alloc_scbs(struct iha_softc *sc) 2511 { 2512 bus_dma_segment_t seg; 2513 int error, rseg; 2514 2515 /* 2516 * Allocate dma-safe memory for the SCB's 2517 */ 2518 if ((error = bus_dmamem_alloc(sc->sc_dmat, 2519 sizeof(struct iha_scb)*IHA_MAX_SCB, 2520 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT | BUS_DMA_ZERO)) 2521 != 0) { 2522 printf("%s: unable to allocate SCBs," 2523 " error = %d\n", sc->sc_dev.dv_xname, error); 2524 return (error); 2525 } 2526 if ((error = bus_dmamem_map(sc->sc_dmat, 2527 &seg, rseg, sizeof(struct iha_scb)*IHA_MAX_SCB, 2528 (caddr_t *)&sc->HCS_Scb, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) 2529 != 0) { 2530 printf("%s: unable to map SCBs, error = %d\n", 2531 sc->sc_dev.dv_xname, error); 2532 return (error); 2533 } 2534 2535 return (0); 2536 } 2537 2538 /* 2539 * iha_read_eeprom - read contents of serial EEPROM into iha_nvram pointed at 2540 * by parameter nvram. 2541 */ 2542 void 2543 iha_read_eeprom(bus_space_tag_t iot, bus_space_handle_t ioh, 2544 struct iha_nvram *nvram) 2545 { 2546 u_int32_t chksum; 2547 u_int16_t *np; 2548 u_int8_t gctrl, addr; 2549 2550 const int chksum_addr = offsetof(struct iha_nvram, NVM_CheckSum) / 2; 2551 2552 /* Enable EEProm programming */ 2553 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) | EEPRG; 2554 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2555 2556 /* Read EEProm */ 2557 np = (u_int16_t *)nvram; 2558 for (addr=0, chksum=0; addr < chksum_addr; addr++, np++) { 2559 *np = iha_se2_rd(iot, ioh, addr); 2560 chksum += *np; 2561 } 2562 2563 chksum &= 0x0000ffff; 2564 nvram->NVM_CheckSum = iha_se2_rd(iot, ioh, chksum_addr); 2565 2566 /* Disable EEProm programming */ 2567 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) & ~EEPRG; 2568 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2569 2570 if ((nvram->NVM_Signature != SIGNATURE) 2571 || 2572 (nvram->NVM_CheckSum != chksum)) 2573 panic("iha: invalid EEPROM, bad signature or checksum"); 2574 } 2575 2576 /* 2577 * iha_se2_rd - read & return the 16 bit value at the specified 2578 * offset in the Serial E2PROM 2579 * 2580 */ 2581 u_int16_t 2582 iha_se2_rd(bus_space_tag_t iot, bus_space_handle_t ioh, u_int8_t addr) 2583 { 2584 u_int16_t readWord; 2585 u_int8_t bit; 2586 int i; 2587 2588 /* Send 'READ' instruction == address | READ bit */ 2589 iha_se2_instr(iot, ioh, (addr | NVREAD)); 2590 2591 readWord = 0; 2592 for (i = 15; i >= 0; i--) { 2593 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2594 DELAY(5); 2595 2596 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2597 DELAY(5); 2598 2599 /* sample data after the following edge of clock */ 2600 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI; 2601 DELAY(5); 2602 2603 readWord += bit << i; 2604 } 2605 2606 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2607 DELAY(5); 2608 2609 return (readWord); 2610 } 2611 2612 /* 2613 * iha_se2_instr - write an octet to serial E2PROM one bit at a time 2614 */ 2615 void 2616 iha_se2_instr(bus_space_tag_t iot, bus_space_handle_t ioh, u_int8_t instr) 2617 { 2618 u_int8_t b; 2619 int i; 2620 2621 b = NVRCS | NVRDO; /* Write the start bit (== 1) */ 2622 2623 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2624 DELAY(5); 2625 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2626 DELAY(5); 2627 2628 for (i = 0; i < 8; i++, instr <<= 1) { 2629 if (instr & 0x80) 2630 b = NVRCS | NVRDO; /* Write a 1 bit */ 2631 else 2632 b = NVRCS; /* Write a 0 bit */ 2633 2634 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2635 DELAY(5); 2636 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2637 DELAY(5); 2638 } 2639 2640 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2641 DELAY(5); 2642 2643 return; 2644 } 2645 2646 /* 2647 * iha_reset_tcs - reset the target control structure pointed 2648 * to by pTcs to default values. TCS_Flags 2649 * only has the negotiation done bits reset as 2650 * the other bits are fixed at initialization. 2651 */ 2652 void 2653 iha_reset_tcs(struct tcs *pTcs, u_int8_t config0) 2654 { 2655 pTcs->TCS_Flags &= ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 2656 pTcs->TCS_JS_Period = 0; 2657 pTcs->TCS_SConfig0 = config0; 2658 pTcs->TCS_TagCnt = 0; 2659 pTcs->TCS_NonTagScb = NULL; 2660 } 2661