1 /* $OpenBSD: cy.c,v 1.21 2003/01/05 22:41:35 deraadt Exp $ */ 2 /* 3 * Copyright (c) 1996 Timo Rossi. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the author nor the names of contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * cy.c 33 * 34 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 35 * (currently not tested with Cyclom-32 cards) 36 * 37 * Timo Rossi, 1996 38 * 39 * Supports both ISA and PCI Cyclom cards 40 * 41 * Uses CD1400 automatic CTS flow control, and 42 * if CY_HW_RTS is defined, uses CD1400 automatic input flow control. 43 * This requires a special cable that exchanges the RTS and DTR lines. 44 * 45 * Lots of debug output can be enabled by defining CY_DEBUG 46 * Some debugging counters (number of receive/transmit interrupts etc.) 47 * can be enabled by defining CY_DEBUG1 48 * 49 * This version uses the bus_space/io_??() stuff 50 * 51 */ 52 53 /* NCY is the number of Cyclom cards in the machine */ 54 #include "cy.h" 55 #if NCY > 0 56 57 #include <sys/types.h> 58 #include <sys/param.h> 59 #include <sys/ioctl.h> 60 #include <sys/syslog.h> 61 #include <sys/fcntl.h> 62 #include <sys/tty.h> 63 #include <sys/proc.h> 64 #include <sys/conf.h> 65 #include <sys/user.h> 66 #include <sys/select.h> 67 #include <sys/device.h> 68 #include <sys/malloc.h> 69 #include <sys/systm.h> 70 71 #include <machine/bus.h> 72 #include <machine/intr.h> 73 74 #if NCY_ISA > 0 75 #include <dev/isa/isavar.h> 76 #include <dev/isa/isareg.h> 77 #endif /* NCY_ISA > 0 */ 78 #if NCY_PCI > 0 79 #include <dev/pci/pcivar.h> 80 #include <dev/pci/pcireg.h> 81 #include <dev/pci/pcidevs.h> 82 #endif /* NCY_PCI > 0 */ 83 84 #include <dev/ic/cd1400reg.h> 85 #include <dev/ic/cyreg.h> 86 87 88 int cy_intr(void *); 89 int cyparam(struct tty *, struct termios *); 90 void cystart(struct tty *); 91 void cy_poll(void *); 92 int cy_modem_control(struct cy_port *, int, int); 93 void cy_enable_transmitter(struct cy_port *); 94 void cd1400_channel_cmd(struct cy_port *, int); 95 int cy_speed(speed_t, int *, int *, int); 96 97 struct cfdriver cy_cd = { 98 NULL, "cy", DV_TTY 99 }; 100 101 /* 102 * Common probe routine 103 * 104 * returns the number of chips found. 105 */ 106 int 107 cy_probe_common(bus_space_tag_t memt, bus_space_handle_t memh, int bustype) 108 { 109 int cy_chip, chip_offs; 110 u_char firmware_ver; 111 int nchips; 112 113 /* Cyclom card hardware reset */ 114 bus_space_write_1(memt, memh, CY16_RESET<<bustype, 0); 115 DELAY(500); /* wait for reset to complete */ 116 bus_space_write_1(memt, memh, CY_CLEAR_INTR<<bustype, 0); 117 118 #ifdef CY_DEBUG 119 printf("cy: card reset done\n"); 120 #endif 121 122 nchips = 0; 123 124 for (cy_chip = 0, chip_offs = 0; 125 cy_chip < CY_MAX_CD1400s; 126 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING << bustype)) { 127 int i; 128 129 /* the last 4 cd1400s are 'interleaved' 130 with the first 4 on 32-port boards */ 131 if (cy_chip == 4) 132 chip_offs -= (CY32_ADDR_FIX << bustype); 133 134 #ifdef CY_DEBUG 135 printf("cy: probe chip %d offset 0x%lx ... ", 136 cy_chip, chip_offs); 137 #endif 138 139 /* wait until the chip is ready for command */ 140 DELAY(1000); 141 if (bus_space_read_1(memt, memh, chip_offs + 142 ((CD1400_CCR << 1) << bustype)) != 0) { 143 #ifdef CY_DEBUG 144 printf("not ready for command\n"); 145 #endif 146 break; 147 } 148 149 /* clear the firmware version reg. */ 150 bus_space_write_1(memt, memh, chip_offs + 151 ((CD1400_GFRCR << 1) << bustype), 0); 152 153 /* 154 * On Cyclom-16 references to non-existent chip 4 155 * actually access chip 0 (address line 9 not decoded). 156 * Here we check if the clearing of chip 4 GFRCR actually 157 * cleared chip 0 GFRCR. In that case we have a 16 port card. 158 */ 159 if (cy_chip == 4 && 160 bus_space_read_1(memt, memh, chip_offs + 161 ((CD1400_GFRCR << 1) << bustype)) == 0) 162 break; 163 164 /* reset the chip */ 165 bus_space_write_1(memt, memh, chip_offs + 166 ((CD1400_CCR << 1) << bustype), 167 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 168 169 /* wait for the chip to initialize itself */ 170 for (i = 0; i < 200; i++) { 171 DELAY(50); 172 firmware_ver = bus_space_read_1(memt, memh, chip_offs + 173 ((CD1400_GFRCR << 1) << bustype)); 174 if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 175 break; 176 } 177 #ifdef CY_DEBUG 178 printf("firmware version 0x%x\n", firmware_ver); 179 #endif 180 181 if ((firmware_ver & 0xf0) != 0x40) 182 break; 183 184 /* firmware version OK, CD1400 found */ 185 nchips++; 186 } 187 188 if (nchips == 0) { 189 #ifdef CY_DEBUG 190 printf("no CD1400s found\n"); 191 #endif 192 return (0); 193 } 194 195 #ifdef CY_DEBUG 196 printf("found %d CD1400s\n", nchips); 197 #endif 198 199 return (nchips); 200 } 201 202 void 203 cy_attach(parent, self) 204 struct device *parent, *self; 205 { 206 int card, port, cy_chip, num_chips, cdu, chip_offs, cy_clock; 207 struct cy_softc *sc = (void *)self; 208 209 card = sc->sc_dev.dv_unit; 210 num_chips = sc->sc_nr_cd1400s; 211 if (num_chips == 0) 212 return; 213 214 timeout_set(&sc->sc_poll_to, cy_poll, sc); 215 bzero(sc->sc_ports, sizeof(sc->sc_ports)); 216 sc->sc_nports = num_chips * CD1400_NO_OF_CHANNELS; 217 218 port = 0; 219 for (cy_chip = 0, chip_offs = 0; 220 cy_chip < num_chips; 221 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING<<sc->sc_bustype)) { 222 if (cy_chip == 4) 223 chip_offs -= (CY32_ADDR_FIX<<sc->sc_bustype); 224 225 #ifdef CY_DEBUG 226 printf("attach CD1400 #%d offset 0x%x\n", cy_chip, chip_offs); 227 #endif 228 sc->sc_cd1400_offs[cy_chip] = chip_offs; 229 230 /* configure port 0 as serial port 231 (should already be after reset) */ 232 cd_write_reg_sc(sc, cy_chip, CD1400_GCR, 0); 233 234 /* Set cy_clock depending on firmware version */ 235 if (cd_read_reg_sc(sc, cy_chip, CD1400_GFRCR) <= 0x46) 236 cy_clock = CY_CLOCK; 237 else 238 cy_clock = CY_CLOCK_60; 239 240 /* set up a receive timeout period (1ms) */ 241 cd_write_reg_sc(sc, cy_chip, CD1400_PPR, 242 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 243 244 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 245 sc->sc_ports[port].cy_port_num = port; 246 sc->sc_ports[port].cy_memt = sc->sc_memt; 247 sc->sc_ports[port].cy_memh = sc->sc_memh; 248 sc->sc_ports[port].cy_chip_offs = chip_offs; 249 sc->sc_ports[port].cy_bustype = sc->sc_bustype; 250 sc->sc_ports[port].cy_clock = cy_clock; 251 252 /* should we initialize anything else here? */ 253 port++; 254 } /* for(each port on one CD1400...) */ 255 256 } /* for(each CD1400 on a card... ) */ 257 258 printf(": %d ports\n", port); 259 260 /* ensure an edge for the next interrupt */ 261 bus_space_write_1(sc->sc_memt, sc->sc_memh, 262 CY_CLEAR_INTR<<sc->sc_bustype, 0); 263 } 264 265 /* 266 * open routine. returns zero if successful, else error code 267 */ 268 int cyopen(dev_t, int, int, struct proc *); 269 int cyclose(dev_t, int, int, struct proc *); 270 int cyread(dev_t, struct uio *, int); 271 int cywrite(dev_t, struct uio *, int); 272 struct tty *cytty(dev_t); 273 int cyioctl(dev_t, u_long, caddr_t, int, struct proc *); 274 int cystop(struct tty *, int flag); 275 276 int 277 cyopen(dev, flag, mode, p) 278 dev_t dev; 279 int flag, mode; 280 struct proc *p; 281 { 282 int card = CY_CARD(dev); 283 int port = CY_PORT(dev); 284 struct cy_softc *sc; 285 struct cy_port *cy; 286 struct tty *tp; 287 int s, error; 288 289 if (card >= cy_cd.cd_ndevs || 290 (sc = cy_cd.cd_devs[card]) == NULL) { 291 return (ENXIO); 292 } 293 294 #ifdef CY_DEBUG 295 printf("%s open port %d flag 0x%x mode 0x%x\n", sc->sc_dev.dv_xname, 296 port, flag, mode); 297 #endif 298 299 cy = &sc->sc_ports[port]; 300 301 s = spltty(); 302 if (cy->cy_tty == NULL) { 303 if ((cy->cy_tty = ttymalloc()) == NULL) { 304 splx(s); 305 printf("%s port %d open: can't allocate tty\n", 306 sc->sc_dev.dv_xname, port); 307 return (ENOMEM); 308 } 309 } 310 splx(s); 311 312 tp = cy->cy_tty; 313 tty_attach(tp); 314 tp = cy->cy_tty; 315 tp->t_oproc = cystart; 316 tp->t_param = cyparam; 317 tp->t_dev = dev; 318 319 if (!ISSET(tp->t_state, TS_ISOPEN)) { 320 SET(tp->t_state, TS_WOPEN); 321 ttychars(tp); 322 tp->t_iflag = TTYDEF_IFLAG; 323 tp->t_oflag = TTYDEF_OFLAG; 324 tp->t_cflag = TTYDEF_CFLAG; 325 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 326 SET(tp->t_cflag, CLOCAL); 327 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 328 SET(tp->t_cflag, CRTSCTS); 329 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 330 SET(tp->t_cflag, MDMBUF); 331 tp->t_lflag = TTYDEF_LFLAG; 332 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 333 334 s = spltty(); 335 336 /* 337 * Allocate input ring buffer if we don't already have one 338 */ 339 if (cy->cy_ibuf == NULL) { 340 cy->cy_ibuf = malloc(IBUF_SIZE, M_DEVBUF, M_NOWAIT); 341 if (cy->cy_ibuf == NULL) { 342 printf("%s: (port %d) can't allocate input buffer\n", 343 sc->sc_dev.dv_xname, port); 344 splx(s); 345 return (ENOMEM); 346 } 347 cy->cy_ibuf_end = cy->cy_ibuf + IBUF_SIZE; 348 } 349 350 /* mark the ring buffer as empty */ 351 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 352 353 /* select CD1400 channel */ 354 cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); 355 /* reset the channel */ 356 cd1400_channel_cmd(cy, CD1400_CCR_CMDRESET); 357 /* encode unit (port) number in LIVR */ 358 /* there is just enough space for 5 bits (32 ports) */ 359 cd_write_reg(cy, CD1400_LIVR, port << 3); 360 361 cy->cy_channel_control = 0; 362 363 if (!timeout_pending(&sc->sc_poll_to)) 364 timeout_add(&sc->sc_poll_to, 1); 365 366 /* this sets parameters and raises DTR */ 367 cyparam(tp, &tp->t_termios); 368 369 ttsetwater(tp); 370 371 /* raise RTS too */ 372 cy_modem_control(cy, TIOCM_RTS, DMBIS); 373 374 cy->cy_carrier_stat = cd_read_reg(cy, CD1400_MSVR2); 375 376 /* enable receiver and modem change interrupts */ 377 cd_write_reg(cy, CD1400_SRER, 378 CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 379 380 if (CY_DIALOUT(dev) || 381 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 382 ISSET(tp->t_cflag, MDMBUF) || 383 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 384 SET(tp->t_state, TS_CARR_ON); 385 else 386 CLR(tp->t_state, TS_CARR_ON); 387 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) { 388 return (EBUSY); 389 } else { 390 s = spltty(); 391 } 392 393 /* wait for carrier if necessary */ 394 if (!ISSET(flag, O_NONBLOCK)) { 395 while (!ISSET(tp->t_cflag, CLOCAL) && 396 !ISSET(tp->t_state, TS_CARR_ON)) { 397 SET(tp->t_state, TS_WOPEN); 398 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 399 "cydcd", 0); 400 if (error != 0) { 401 splx(s); 402 CLR(tp->t_state, TS_WOPEN); 403 return (error); 404 } 405 } 406 } 407 408 splx(s); 409 410 return (*linesw[tp->t_line].l_open)(dev, tp); 411 } 412 413 /* 414 * close routine. returns zero if successful, else error code 415 */ 416 int 417 cyclose(dev, flag, mode, p) 418 dev_t dev; 419 int flag, mode; 420 struct proc *p; 421 { 422 int card = CY_CARD(dev); 423 int port = CY_PORT(dev); 424 struct cy_softc *sc = cy_cd.cd_devs[card]; 425 struct cy_port *cy = &sc->sc_ports[port]; 426 struct tty *tp = cy->cy_tty; 427 int s; 428 429 #ifdef CY_DEBUG 430 printf("%s close port %d, flag 0x%x, mode 0x%x\n", sc->sc_dev.dv_xname, 431 port, flag, mode); 432 #endif 433 434 (*linesw[tp->t_line].l_close)(tp, flag); 435 s = spltty(); 436 437 if (ISSET(tp->t_cflag, HUPCL) && 438 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 439 /* drop DTR and RTS 440 (should we wait for output buffer to become empty first?) */ 441 cy_modem_control(cy, 0, DMSET); 442 } 443 444 /* 445 * XXX should we disable modem change and 446 * receive interrupts here or somewhere ? 447 */ 448 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 449 450 splx(s); 451 ttyclose(tp); 452 453 return (0); 454 } 455 456 /* 457 * Read routine 458 */ 459 int 460 cyread(dev, uio, flag) 461 dev_t dev; 462 struct uio *uio; 463 int flag; 464 { 465 int card = CY_CARD(dev); 466 int port = CY_PORT(dev); 467 struct cy_softc *sc = cy_cd.cd_devs[card]; 468 struct cy_port *cy = &sc->sc_ports[port]; 469 struct tty *tp = cy->cy_tty; 470 471 #ifdef CY_DEBUG 472 printf("%s read port %d uio 0x%x flag 0x%x\n", sc->sc_dev.dv_xname, 473 port, uio, flag); 474 #endif 475 476 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 477 } 478 479 /* 480 * Write routine 481 */ 482 int 483 cywrite(dev, uio, flag) 484 dev_t dev; 485 struct uio *uio; 486 int flag; 487 { 488 int card = CY_CARD(dev); 489 int port = CY_PORT(dev); 490 struct cy_softc *sc = cy_cd.cd_devs[card]; 491 struct cy_port *cy = &sc->sc_ports[port]; 492 struct tty *tp = cy->cy_tty; 493 494 #ifdef CY_DEBUG 495 printf("%s write port %d uio 0x%x flag 0x%x\n", sc->sc_dev.dv_xname, 496 port, uio, flag); 497 #endif 498 499 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 500 } 501 502 /* 503 * return tty pointer 504 */ 505 struct tty * 506 cytty(dev) 507 dev_t dev; 508 { 509 int card = CY_CARD(dev); 510 int port = CY_PORT(dev); 511 struct cy_softc *sc = cy_cd.cd_devs[card]; 512 struct cy_port *cy = &sc->sc_ports[port]; 513 struct tty *tp = cy->cy_tty; 514 515 return (tp); 516 } 517 518 /* 519 * ioctl routine 520 */ 521 int 522 cyioctl(dev, cmd, data, flag, p) 523 dev_t dev; 524 u_long cmd; 525 caddr_t data; 526 int flag; 527 struct proc *p; 528 { 529 int card = CY_CARD(dev); 530 int port = CY_PORT(dev); 531 struct cy_softc *sc = cy_cd.cd_devs[card]; 532 struct cy_port *cy = &sc->sc_ports[port]; 533 struct tty *tp = cy->cy_tty; 534 int error; 535 536 #ifdef CY_DEBUG 537 printf("%s port %d ioctl cmd 0x%x data 0x%x flag 0x%x\n", 538 sc->sc_dev.dv_xname, port, cmd, data, flag); 539 #endif 540 541 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 542 if (error >= 0) 543 return (error); 544 545 error = ttioctl(tp, cmd, data, flag, p); 546 if (error >= 0) 547 return (error); 548 549 /* XXX should not allow dropping DTR when dialin? */ 550 551 switch (cmd) { 552 case TIOCSBRK: /* start break */ 553 SET(cy->cy_flags, CYF_START_BREAK); 554 cy_enable_transmitter(cy); 555 break; 556 557 case TIOCCBRK: /* stop break */ 558 SET(cy->cy_flags, CYF_END_BREAK); 559 cy_enable_transmitter(cy); 560 break; 561 562 case TIOCSDTR: /* DTR on */ 563 cy_modem_control(cy, TIOCM_DTR, DMBIS); 564 break; 565 566 case TIOCCDTR: /* DTR off */ 567 cy_modem_control(cy, TIOCM_DTR, DMBIC); 568 break; 569 570 case TIOCMSET: /* set new modem control line values */ 571 cy_modem_control(cy, *((int *)data), DMSET); 572 break; 573 574 case TIOCMBIS: /* turn modem control bits on */ 575 cy_modem_control(cy, *((int *)data), DMBIS); 576 break; 577 578 case TIOCMBIC: /* turn modem control bits off */ 579 cy_modem_control(cy, *((int *)data), DMBIC); 580 break; 581 582 case TIOCMGET: /* get modem control/status line state */ 583 *((int *)data) = cy_modem_control(cy, 0, DMGET); 584 break; 585 586 case TIOCGFLAGS: 587 *((int *)data) = cy->cy_openflags | 588 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 589 break; 590 591 case TIOCSFLAGS: 592 error = suser(p->p_ucred, &p->p_acflag); 593 if (error != 0) 594 return (EPERM); 595 596 cy->cy_openflags = *((int *)data) & 597 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 598 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 599 break; 600 601 default: 602 return (ENOTTY); 603 } 604 605 return (0); 606 } 607 608 /* 609 * start output 610 */ 611 void 612 cystart(tp) 613 struct tty *tp; 614 { 615 int card = CY_CARD(tp->t_dev); 616 int port = CY_PORT(tp->t_dev); 617 struct cy_softc *sc = cy_cd.cd_devs[card]; 618 struct cy_port *cy = &sc->sc_ports[port]; 619 int s; 620 621 #ifdef CY_DEBUG 622 printf("%s port %d start, tty 0x%x\n", sc->sc_dev.dv_xname, port, tp); 623 #endif 624 625 s = spltty(); 626 627 #ifdef CY_DEBUG1 628 cy->cy_start_count++; 629 #endif 630 631 if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 632 if (tp->t_outq.c_cc <= tp->t_lowat) { 633 if (ISSET(tp->t_state, TS_ASLEEP)) { 634 CLR(tp->t_state, TS_ASLEEP); 635 wakeup(&tp->t_outq); 636 } 637 638 selwakeup(&tp->t_wsel); 639 640 if (tp->t_outq.c_cc == 0) 641 goto out; 642 } 643 644 SET(tp->t_state, TS_BUSY); 645 cy_enable_transmitter(cy); 646 } 647 out: 648 649 splx(s); 650 } 651 652 /* 653 * stop output 654 */ 655 int 656 cystop(tp, flag) 657 struct tty *tp; 658 int flag; 659 { 660 int card = CY_CARD(tp->t_dev); 661 int port = CY_PORT(tp->t_dev); 662 struct cy_softc *sc = cy_cd.cd_devs[card]; 663 struct cy_port *cy = &sc->sc_ports[port]; 664 int s; 665 666 #ifdef CY_DEBUG 667 printf("%s port %d stop tty 0x%x flag 0x%x\n", sc->sc_dev.dv_xname, 668 port, tp, flag); 669 #endif 670 671 s = spltty(); 672 673 if (ISSET(tp->t_state, TS_BUSY)) { 674 if (!ISSET(tp->t_state, TS_TTSTOP)) 675 SET(tp->t_state, TS_FLUSH); 676 677 /* 678 * the transmit interrupt routine will disable transmit when it 679 * notices that CYF_STOP has been set. 680 */ 681 SET(cy->cy_flags, CYF_STOP); 682 } 683 splx(s); 684 return (0); 685 } 686 687 /* 688 * parameter setting routine. 689 * returns 0 if successful, else returns error code 690 */ 691 int 692 cyparam(tp, t) 693 struct tty *tp; 694 struct termios *t; 695 { 696 int card = CY_CARD(tp->t_dev); 697 int port = CY_PORT(tp->t_dev); 698 struct cy_softc *sc = cy_cd.cd_devs[card]; 699 struct cy_port *cy = &sc->sc_ports[port]; 700 int ibpr, obpr, i_clk_opt, o_clk_opt; 701 int s, opt; 702 703 #ifdef CY_DEBUG 704 printf("%s port %d param tty 0x%x termios 0x%x\n", sc->sc_dev.dv_xname, 705 port, tp, t); 706 printf("ispeed %d ospeed %d\n", t->c_ispeed, t->c_ospeed); 707 #endif 708 709 if (t->c_ospeed != 0 && 710 cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 711 return (EINVAL); 712 713 if (t->c_ispeed != 0 && 714 cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 715 return (EINVAL); 716 717 s = spltty(); 718 719 /* hang up the line is ospeed is zero, else turn DTR on */ 720 cy_modem_control(cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 721 722 /* channel was selected by the above call to cy_modem_control() */ 723 /* cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); */ 724 725 /* set transmit speed */ 726 if (t->c_ospeed != 0) { 727 cd_write_reg(cy, CD1400_TCOR, o_clk_opt); 728 cd_write_reg(cy, CD1400_TBPR, obpr); 729 } 730 /* set receive speed */ 731 if (t->c_ispeed != 0) { 732 cd_write_reg(cy, CD1400_RCOR, i_clk_opt); 733 cd_write_reg(cy, CD1400_RBPR, ibpr); 734 } 735 736 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 737 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 738 739 if (opt != cy->cy_channel_control) { 740 cy->cy_channel_control = opt; 741 cd1400_channel_cmd(cy, opt); 742 } 743 744 /* compute COR1 contents */ 745 opt = 0; 746 if (ISSET(t->c_cflag, PARENB)) { 747 if (ISSET(t->c_cflag, PARODD)) 748 opt |= CD1400_COR1_PARODD; 749 opt |= CD1400_COR1_PARNORMAL; 750 } 751 752 if (!ISSET(t->c_iflag, INPCK)) 753 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 754 755 if (ISSET(t->c_cflag, CSTOPB)) 756 opt |= CD1400_COR1_STOP2; 757 758 switch (t->c_cflag & CSIZE) { 759 case CS5: 760 opt |= CD1400_COR1_CS5; 761 break; 762 763 case CS6: 764 opt |= CD1400_COR1_CS6; 765 break; 766 767 case CS7: 768 opt |= CD1400_COR1_CS7; 769 break; 770 771 default: 772 opt |= CD1400_COR1_CS8; 773 break; 774 } 775 776 cd_write_reg(cy, CD1400_COR1, opt); 777 778 #ifdef CY_DEBUG 779 printf("cor1 = 0x%x...", opt); 780 #endif 781 782 /* 783 * use the CD1400 automatic CTS flow control if CRTSCTS is set 784 * 785 * CD1400_COR2_ETC is used because breaks are generated with 786 * embedded transmit commands 787 */ 788 cd_write_reg(cy, CD1400_COR2, 789 CD1400_COR2_ETC | 790 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 791 792 cd_write_reg(cy, CD1400_COR3, RX_FIFO_THRESHOLD); 793 794 cd1400_channel_cmd(cy, 795 CD1400_CCR_CMDCORCHG | 796 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 797 798 cd_write_reg(cy, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 799 cd_write_reg(cy, CD1400_COR5, 0); 800 801 /* 802 * set modem change option registers to generate interrupts 803 * on carrier detect changes. 804 * 805 * if hardware RTS handshaking is used (CY_HW_RTS, DTR and RTS lines 806 * exchanged), also set the handshaking threshold. 807 */ 808 #ifdef CY_HW_RTS 809 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd | 810 (ISSET(t->c_cflag, CRTSCTS) ? RX_DTR_THRESHOLD : 0)); 811 #else 812 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd); 813 #endif /* CY_HW_RTS */ 814 815 cd_write_reg(cy, CD1400_MCOR2, CD1400_MCOR2_CDod); 816 817 /* 818 * set receive timeout to approx. 2ms 819 * could use more complex logic here... 820 * (but is it actually needed or even useful?) 821 */ 822 cd_write_reg(cy, CD1400_RTPR, 2); 823 824 /* 825 * should do anything else here? 826 * XXX check MDMBUF handshaking like in com.c? 827 */ 828 829 splx(s); 830 return (0); 831 } 832 833 /* 834 * set/get modem line status 835 * 836 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 837 * 838 * RTS and DTR are exchanged if CY_HW_RTS is set 839 * 840 */ 841 int 842 cy_modem_control(cy, bits, howto) 843 struct cy_port *cy; 844 int bits; 845 int howto; 846 { 847 int s, msvr; 848 849 s = spltty(); 850 851 /* select channel */ 852 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 853 854 /* does not manipulate RTS if it is used for flow control */ 855 switch (howto) { 856 case DMGET: 857 bits = 0; 858 if (cy->cy_channel_control & CD1400_CCR_RCVEN) 859 bits |= TIOCM_LE; 860 msvr = cd_read_reg(cy, CD1400_MSVR2); 861 #ifdef CY_HW_RTS 862 if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 863 bits |= TIOCM_DTR; 864 if (msvr & CD1400_MSVR2_DTR) 865 bits |= TIOCM_RTS; 866 #else 867 if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 868 bits |= TIOCM_RTS; 869 if (msvr & CD1400_MSVR2_DTR) 870 bits |= TIOCM_DTR; 871 #endif /* CY_HW_RTS */ 872 if (msvr & CD1400_MSVR2_CTS) 873 bits |= TIOCM_CTS; 874 if (msvr & CD1400_MSVR2_CD) 875 bits |= TIOCM_CD; 876 if (msvr & CD1400_MSVR2_DSR) /* not connected on some 877 Cyclom cards? */ 878 bits |= TIOCM_DSR; 879 if (msvr & CD1400_MSVR2_RI) /* not connected on 880 Cyclom-8Y cards? */ 881 bits |= TIOCM_RI; 882 splx(s); 883 return (bits); 884 885 case DMSET: /* replace old values with new ones */ 886 #ifdef CY_HW_RTS 887 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 888 cd_write_reg(cy, CD1400_MSVR2, 889 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 890 cd_write_reg(cy, CD1400_MSVR1, 891 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 892 #else 893 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 894 cd_write_reg(cy, CD1400_MSVR1, 895 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 896 cd_write_reg(cy, CD1400_MSVR2, 897 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 898 #endif /* CY_HW_RTS */ 899 break; 900 901 case DMBIS: /* set bits */ 902 #ifdef CY_HW_RTS 903 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 904 (bits & TIOCM_RTS) != 0) 905 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 906 if (bits & TIOCM_DTR) 907 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 908 #else 909 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 910 (bits & TIOCM_RTS) != 0) 911 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 912 if (bits & TIOCM_DTR) 913 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 914 #endif /* CY_HW_RTS */ 915 break; 916 917 case DMBIC: /* clear bits */ 918 #ifdef CY_HW_RTS 919 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 920 (bits & TIOCM_RTS)) 921 cd_write_reg(cy, CD1400_MSVR2, 0); 922 if (bits & TIOCM_DTR) 923 cd_write_reg(cy, CD1400_MSVR1, 0); 924 #else 925 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 926 (bits & TIOCM_RTS)) 927 cd_write_reg(cy, CD1400_MSVR1, 0); 928 if (bits & TIOCM_DTR) 929 cd_write_reg(cy, CD1400_MSVR2, 0); 930 #endif /* CY_HW_RTS */ 931 break; 932 } 933 splx(s); 934 return (0); 935 } 936 937 /* 938 * Upper-level handler loop (called from timer interrupt?) 939 * This routine is common for multiple cards 940 */ 941 void 942 cy_poll(void *arg) 943 { 944 int card, port; 945 struct cy_softc *sc = arg; 946 struct cy_port *cy; 947 struct tty *tp; 948 static int counter = 0; 949 #ifdef CY_DEBUG1 950 int did_something; 951 #endif 952 953 int s; 954 955 s = spltty(); 956 957 if (sc->sc_events == 0 && ++counter < 200) { 958 splx(s); 959 goto out; 960 } 961 962 sc->sc_events = 0; 963 splx(s); 964 965 #ifdef CY_DEBUG1 966 sc->sc_poll_count1++; 967 did_something = 0; 968 #endif 969 970 for (port = 0; port < sc->sc_nports; port++) { 971 cy = &sc->sc_ports[port]; 972 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 973 !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 974 continue; 975 976 /* 977 * handle received data 978 */ 979 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 980 u_char line_stat; 981 int chr; 982 983 line_stat = cy->cy_ibuf_rd_ptr[0]; 984 chr = cy->cy_ibuf_rd_ptr[1]; 985 986 if (line_stat & 987 (CD1400_RDSR_BREAK|CD1400_RDSR_FE)) 988 chr |= TTY_FE; 989 if (line_stat & CD1400_RDSR_PE) 990 chr |= TTY_PE; 991 992 /* 993 * on an overrun error the data is treated as 994 * good just as it should be. 995 */ 996 997 #ifdef CY_DEBUG 998 printf("%s port %d ttyinput 0x%x\n", 999 sc->sc_dev.dv_xname, port, chr); 1000 #endif 1001 1002 (*linesw[tp->t_line].l_rint)(chr, tp); 1003 1004 s = spltty(); /* really necessary? */ 1005 if ((cy->cy_ibuf_rd_ptr += 2) == 1006 cy->cy_ibuf_end) 1007 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 1008 splx(s); 1009 1010 #ifdef CY_DEBUG1 1011 did_something = 1; 1012 #endif 1013 } 1014 1015 #ifndef CY_HW_RTS 1016 /* 1017 * If we don't have any received data in ibuf and 1018 * CRTSCTS is on and RTS is turned off, it is time 1019 * to turn RTS back on 1020 */ 1021 if (ISSET(tp->t_cflag, CRTSCTS)) { 1022 /* we can't use cy_modem_control() here as it 1023 doesn't change RTS if RTSCTS is on */ 1024 cd_write_reg(cy, CD1400_CAR, 1025 port & CD1400_CAR_CHAN); 1026 1027 if ((cd_read_reg(cy, 1028 CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 1029 cd_write_reg(cy, CD1400_MSVR1, 1030 CD1400_MSVR1_RTS); 1031 #ifdef CY_DEBUG1 1032 did_something = 1; 1033 #endif 1034 } 1035 } 1036 #endif /* CY_HW_RTS */ 1037 1038 /* 1039 * handle carrier changes 1040 */ 1041 s = spltty(); 1042 if (ISSET(cy->cy_flags, CYF_CARRIER_CHANGED)) { 1043 int carrier; 1044 1045 CLR(cy->cy_flags, CYF_CARRIER_CHANGED); 1046 splx(s); 1047 1048 carrier = ((cy->cy_carrier_stat & 1049 CD1400_MSVR2_CD) != 0); 1050 1051 #ifdef CY_DEBUG 1052 printf("cy_poll: carrier change " 1053 "(card %d, port %d, carrier %d)\n", 1054 card, port, carrier); 1055 #endif 1056 if (CY_DIALIN(tp->t_dev) && 1057 !(*linesw[tp->t_line].l_modem)(tp, carrier)) 1058 cy_modem_control(cy, TIOCM_DTR, DMBIC); 1059 1060 #ifdef CY_DEBUG1 1061 did_something = 1; 1062 #endif 1063 } else { 1064 splx(s); 1065 } 1066 1067 s = spltty(); 1068 if (ISSET(cy->cy_flags, CYF_START)) { 1069 CLR(cy->cy_flags, CYF_START); 1070 splx(s); 1071 1072 (*linesw[tp->t_line].l_start)(tp); 1073 1074 #ifdef CY_DEBUG1 1075 did_something = 1; 1076 #endif 1077 } else { 1078 splx(s); 1079 } 1080 1081 /* could move this to even upper level... */ 1082 if (cy->cy_fifo_overruns) { 1083 cy->cy_fifo_overruns = 0; 1084 /* doesn't report overrun count, 1085 but shouldn't really matter */ 1086 log(LOG_WARNING, "cy%d port %d fifo overrun\n", 1087 card, port); 1088 } 1089 if (cy->cy_ibuf_overruns) { 1090 cy->cy_ibuf_overruns = 0; 1091 log(LOG_WARNING, "cy%d port %d ibuf overrun\n", 1092 card, port); 1093 } 1094 } /* for(port...) */ 1095 #ifdef CY_DEBUG1 1096 if (did_something && counter >= 200) 1097 sc->sc_poll_count2++; 1098 #endif 1099 1100 counter = 0; 1101 1102 out: 1103 timeout_add(&sc->sc_poll_to, 1); 1104 } 1105 1106 /* 1107 * hardware interrupt routine 1108 */ 1109 int 1110 cy_intr(arg) 1111 void *arg; 1112 { 1113 struct cy_softc *sc = arg; 1114 struct cy_port *cy; 1115 int cy_chip, stat; 1116 int int_serviced = -1; 1117 1118 /* 1119 * Check interrupt status of each CD1400 chip on this card 1120 * (multiple cards cannot share the same interrupt) 1121 */ 1122 for (cy_chip = 0; cy_chip < sc->sc_nr_cd1400s; cy_chip++) { 1123 1124 stat = cd_read_reg_sc(sc, cy_chip, CD1400_SVRR); 1125 if (stat == 0) 1126 continue; 1127 1128 if (ISSET(stat, CD1400_SVRR_RXRDY)) { 1129 u_char save_car, save_rir, serv_type; 1130 u_char line_stat, recv_data, n_chars; 1131 u_char *buf_p; 1132 1133 save_rir = cd_read_reg_sc(sc, cy_chip, CD1400_RIR); 1134 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1135 /* enter rx service */ 1136 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_rir); 1137 1138 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_RIVR); 1139 cy = &sc->sc_ports[serv_type >> 3]; 1140 1141 #ifdef CY_DEBUG1 1142 cy->cy_rx_int_count++; 1143 #endif 1144 1145 buf_p = cy->cy_ibuf_wr_ptr; 1146 1147 if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1148 line_stat = cd_read_reg(cy, CD1400_RDSR); 1149 recv_data = cd_read_reg(cy, CD1400_RDSR); 1150 1151 if (cy->cy_tty == NULL || 1152 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1153 goto end_rx_serv; 1154 1155 #ifdef CY_DEBUG 1156 printf("%s port %d recv exception, " 1157 "line_stat 0x%x, char 0x%x\n", 1158 sc->sc_dev.dv_xname, cy->cy_port_num, 1159 line_stat, recv_data); 1160 #endif 1161 if (ISSET(line_stat, CD1400_RDSR_OE)) 1162 cy->cy_fifo_overruns++; 1163 1164 *buf_p++ = line_stat; 1165 *buf_p++ = recv_data; 1166 if (buf_p == cy->cy_ibuf_end) 1167 buf_p = cy->cy_ibuf; 1168 1169 if (buf_p == cy->cy_ibuf_rd_ptr) { 1170 if (buf_p == cy->cy_ibuf) 1171 buf_p = cy->cy_ibuf_end; 1172 buf_p -= 2; 1173 cy->cy_ibuf_overruns++; 1174 } 1175 sc->sc_events = 1; 1176 } else { /* no exception, received data OK */ 1177 n_chars = cd_read_reg(cy, CD1400_RDCR); 1178 1179 /* If no tty or not open, discard data */ 1180 if (cy->cy_tty == NULL || 1181 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) { 1182 while (n_chars--) 1183 cd_read_reg(cy, CD1400_RDSR); 1184 goto end_rx_serv; 1185 } 1186 1187 #ifdef CY_DEBUG 1188 printf("%s port %d receive ok %d chars\n", 1189 sc->sc_dev.dv_xname, cy->cy_port_num, 1190 n_chars); 1191 #endif 1192 while (n_chars--) { 1193 *buf_p++ = 0; /* status: OK */ 1194 *buf_p++ = cd_read_reg(cy, 1195 CD1400_RDSR); /* data byte */ 1196 if (buf_p == cy->cy_ibuf_end) 1197 buf_p = cy->cy_ibuf; 1198 if (buf_p == cy->cy_ibuf_rd_ptr) { 1199 if (buf_p == cy->cy_ibuf) 1200 buf_p = cy->cy_ibuf_end; 1201 buf_p -= 2; 1202 cy->cy_ibuf_overruns++; 1203 break; 1204 } 1205 } 1206 sc->sc_events = 1; 1207 } 1208 1209 cy->cy_ibuf_wr_ptr = buf_p; 1210 1211 #ifndef CY_HW_RTS 1212 /* RTS handshaking for incoming data */ 1213 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1214 int bf; 1215 1216 bf = buf_p - cy->cy_ibuf_rd_ptr; 1217 if (bf < 0) 1218 bf += IBUF_SIZE; 1219 1220 if (bf > (IBUF_SIZE/2)) /* turn RTS off */ 1221 cd_write_reg(cy, CD1400_MSVR1, 0); 1222 } 1223 #endif /* CY_HW_RTS */ 1224 1225 end_rx_serv: 1226 /* terminate service context */ 1227 cd_write_reg(cy, CD1400_RIR, save_rir & 0x3f); 1228 cd_write_reg(cy, CD1400_CAR, save_car); 1229 int_serviced = 1; 1230 } /* if(rx_service...) */ 1231 1232 if (ISSET(stat, CD1400_SVRR_MDMCH)) { 1233 u_char save_car, save_mir, serv_type, modem_stat; 1234 1235 save_mir = cd_read_reg_sc(sc, cy_chip, CD1400_MIR); 1236 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1237 /* enter modem service */ 1238 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_mir); 1239 1240 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_MIVR); 1241 cy = &sc->sc_ports[serv_type >> 3]; 1242 1243 #ifdef CY_DEBUG1 1244 cy->cy_modem_int_count++; 1245 #endif 1246 1247 modem_stat = cd_read_reg(cy, CD1400_MSVR2); 1248 1249 #ifdef CY_DEBUG 1250 printf("%s port %d modem line change, new stat 0x%x\n", 1251 sc->sc_dev.dv_xname, cy->cy_port_num, modem_stat); 1252 #endif 1253 if (ISSET((cy->cy_carrier_stat ^ modem_stat), 1254 CD1400_MSVR2_CD)) { 1255 SET(cy->cy_flags, CYF_CARRIER_CHANGED); 1256 sc->sc_events = 1; 1257 } 1258 1259 cy->cy_carrier_stat = modem_stat; 1260 1261 /* terminate service context */ 1262 cd_write_reg(cy, CD1400_MIR, save_mir & 0x3f); 1263 cd_write_reg(cy, CD1400_CAR, save_car); 1264 int_serviced = 1; 1265 } /* if(modem_service...) */ 1266 1267 if (ISSET(stat, CD1400_SVRR_TXRDY)) { 1268 u_char save_car, save_tir, serv_type, count, ch; 1269 struct tty *tp; 1270 1271 save_tir = cd_read_reg_sc(sc, cy_chip, CD1400_TIR); 1272 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1273 /* enter tx service */ 1274 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_tir); 1275 1276 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_TIVR); 1277 cy = &sc->sc_ports[serv_type >> 3]; 1278 1279 #ifdef CY_DEBUG1 1280 cy->cy_tx_int_count++; 1281 #endif 1282 #ifdef CY_DEBUG 1283 printf("%s port %d tx service\n", sc->sc_dev.dv_xname, 1284 cy->cy_port_num); 1285 #endif 1286 1287 /* stop transmitting if no tty or CYF_STOP set */ 1288 tp = cy->cy_tty; 1289 if (tp == NULL || ISSET(cy->cy_flags, CYF_STOP)) 1290 goto txdone; 1291 1292 count = 0; 1293 if (ISSET(cy->cy_flags, CYF_SEND_NUL)) { 1294 cd_write_reg(cy, CD1400_TDR, 0); 1295 cd_write_reg(cy, CD1400_TDR, 0); 1296 count += 2; 1297 CLR(cy->cy_flags, CYF_SEND_NUL); 1298 } 1299 1300 if (tp->t_outq.c_cc > 0) { 1301 SET(tp->t_state, TS_BUSY); 1302 while (tp->t_outq.c_cc > 0 && 1303 count < CD1400_TX_FIFO_SIZE) { 1304 ch = getc(&tp->t_outq); 1305 /* remember to double NUL characters 1306 because embedded transmit commands 1307 are enabled */ 1308 if (ch == 0) { 1309 if (count >= 1310 CD1400_TX_FIFO_SIZE-2) { 1311 SET(cy->cy_flags, 1312 CYF_SEND_NUL); 1313 break; 1314 } 1315 1316 cd_write_reg(cy, CD1400_TDR, ch); 1317 count++; 1318 } 1319 1320 cd_write_reg(cy, CD1400_TDR, ch); 1321 count++; 1322 } 1323 } else { 1324 /* no data to send -- check if we should 1325 start/stop a break */ 1326 /* XXX does this cause too much delay before 1327 breaks? */ 1328 if (ISSET(cy->cy_flags, CYF_START_BREAK)) { 1329 cd_write_reg(cy, CD1400_TDR, 0); 1330 cd_write_reg(cy, CD1400_TDR, 0x81); 1331 CLR(cy->cy_flags, CYF_START_BREAK); 1332 } 1333 if (ISSET(cy->cy_flags, CYF_END_BREAK)) { 1334 cd_write_reg(cy, CD1400_TDR, 0); 1335 cd_write_reg(cy, CD1400_TDR, 0x83); 1336 CLR(cy->cy_flags, CYF_END_BREAK); 1337 } 1338 } 1339 1340 if (tp->t_outq.c_cc == 0) { 1341 txdone: 1342 /* 1343 * No data to send or requested to stop. 1344 * Disable transmit interrupt 1345 */ 1346 cd_write_reg(cy, CD1400_SRER, 1347 cd_read_reg(cy, CD1400_SRER) 1348 & ~CD1400_SRER_TXRDY); 1349 CLR(cy->cy_flags, CYF_STOP); 1350 CLR(tp->t_state, TS_BUSY); 1351 } 1352 1353 if (tp->t_outq.c_cc <= tp->t_lowat) { 1354 SET(cy->cy_flags, CYF_START); 1355 sc->sc_events = 1; 1356 } 1357 1358 /* terminate service context */ 1359 cd_write_reg(cy, CD1400_TIR, save_tir & 0x3f); 1360 cd_write_reg(cy, CD1400_CAR, save_car); 1361 int_serviced = 1; 1362 } /* if(tx_service...) */ 1363 } /* for(...all CD1400s on a card) */ 1364 1365 /* ensure an edge for next interrupt */ 1366 bus_space_write_1(sc->sc_memt, sc->sc_memh, 1367 CY_CLEAR_INTR<<sc->sc_bustype, 0); 1368 return (int_serviced); 1369 } 1370 1371 /* 1372 * subroutine to enable CD1400 transmitter 1373 */ 1374 void 1375 cy_enable_transmitter(cy) 1376 struct cy_port *cy; 1377 { 1378 int s; 1379 s = spltty(); 1380 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 1381 cd_write_reg(cy, CD1400_SRER, cd_read_reg(cy, CD1400_SRER) 1382 | CD1400_SRER_TXRDY); 1383 splx(s); 1384 } 1385 1386 /* 1387 * Execute a CD1400 channel command 1388 */ 1389 void 1390 cd1400_channel_cmd(cy, cmd) 1391 struct cy_port *cy; 1392 int cmd; 1393 { 1394 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1395 1396 #ifdef CY_DEBUG 1397 printf("c1400_channel_cmd cy 0x%x command 0x%x\n", cy, cmd); 1398 #endif 1399 1400 /* wait until cd1400 is ready to process a new command */ 1401 while (cd_read_reg(cy, CD1400_CCR) != 0 && waitcnt-- > 0) 1402 ; 1403 1404 if (waitcnt == 0) 1405 log(LOG_ERR, "cy: channel command timeout\n"); 1406 1407 cd_write_reg(cy, CD1400_CCR, cmd); 1408 } 1409 1410 /* 1411 * Compute clock option register and baud rate register values 1412 * for a given speed. Return 0 on success, -1 on failure. 1413 * 1414 * The error between requested and actual speed seems 1415 * to be well within allowed limits (less than 3%) 1416 * with every speed value between 50 and 150000 bps. 1417 */ 1418 int 1419 cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock) 1420 { 1421 int c, co, br; 1422 1423 if (speed < 50 || speed > 150000) 1424 return (-1); 1425 1426 for (c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1427 br = (cy_clock + (co * speed) / 2) / (co * speed); 1428 if (br < 0x100) { 1429 *bpr = br; 1430 *cor = c; 1431 return (0); 1432 } 1433 } 1434 1435 return (-1); 1436 } 1437 1438 #endif /* NCY > 0 */ 1439