1 /* $OpenBSD: cy.c,v 1.33 2010/11/18 21:15:15 miod Exp $ */ 2 /* 3 * Copyright (c) 1996 Timo Rossi. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the author nor the names of contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * cy.c 33 * 34 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 35 * (currently not tested with Cyclom-32 cards) 36 * 37 * Timo Rossi, 1996 38 * 39 * Supports both ISA and PCI Cyclom cards 40 * 41 * Uses CD1400 automatic CTS flow control, and 42 * if CY_HW_RTS is defined, uses CD1400 automatic input flow control. 43 * This requires a special cable that exchanges the RTS and DTR lines. 44 * 45 * Lots of debug output can be enabled by defining CY_DEBUG 46 * Some debugging counters (number of receive/transmit interrupts etc.) 47 * can be enabled by defining CY_DEBUG1 48 * 49 * This version uses the bus_space/io_??() stuff 50 * 51 */ 52 53 #include <sys/types.h> 54 #include <sys/param.h> 55 #include <sys/ioctl.h> 56 #include <sys/syslog.h> 57 #include <sys/fcntl.h> 58 #include <sys/tty.h> 59 #include <sys/proc.h> 60 #include <sys/conf.h> 61 #include <sys/selinfo.h> 62 #include <sys/device.h> 63 #include <sys/malloc.h> 64 #include <sys/systm.h> 65 66 #include <machine/bus.h> 67 #include <machine/intr.h> 68 69 #if NCY_ISA > 0 70 #include <dev/isa/isavar.h> 71 #include <dev/isa/isareg.h> 72 #endif /* NCY_ISA > 0 */ 73 #if NCY_PCI > 0 74 #include <dev/pci/pcivar.h> 75 #include <dev/pci/pcireg.h> 76 #include <dev/pci/pcidevs.h> 77 #endif /* NCY_PCI > 0 */ 78 79 #include <dev/ic/cd1400reg.h> 80 #include <dev/ic/cyreg.h> 81 82 83 int cy_intr(void *); 84 int cyparam(struct tty *, struct termios *); 85 void cystart(struct tty *); 86 void cy_poll(void *); 87 int cy_modem_control(struct cy_port *, int, int); 88 void cy_enable_transmitter(struct cy_port *); 89 void cd1400_channel_cmd(struct cy_port *, int); 90 int cy_speed(speed_t, int *, int *, int); 91 92 struct cfdriver cy_cd = { 93 NULL, "cy", DV_TTY 94 }; 95 96 /* 97 * Common probe routine 98 * 99 * returns the number of chips found. 100 */ 101 int 102 cy_probe_common(bus_space_tag_t memt, bus_space_handle_t memh, int bustype) 103 { 104 int cy_chip, chip_offs; 105 u_char firmware_ver; 106 int nchips; 107 108 /* Cyclom card hardware reset */ 109 bus_space_write_1(memt, memh, CY16_RESET<<bustype, 0); 110 DELAY(500); /* wait for reset to complete */ 111 bus_space_write_1(memt, memh, CY_CLEAR_INTR<<bustype, 0); 112 113 #ifdef CY_DEBUG 114 printf("cy: card reset done\n"); 115 #endif 116 117 nchips = 0; 118 119 for (cy_chip = 0, chip_offs = 0; 120 cy_chip < CY_MAX_CD1400s; 121 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING << bustype)) { 122 int i; 123 124 /* the last 4 cd1400s are 'interleaved' 125 with the first 4 on 32-port boards */ 126 if (cy_chip == 4) 127 chip_offs -= (CY32_ADDR_FIX << bustype); 128 129 #ifdef CY_DEBUG 130 printf("cy: probe chip %d offset 0x%lx ... ", 131 cy_chip, chip_offs); 132 #endif 133 134 /* wait until the chip is ready for command */ 135 DELAY(1000); 136 if (bus_space_read_1(memt, memh, chip_offs + 137 ((CD1400_CCR << 1) << bustype)) != 0) { 138 #ifdef CY_DEBUG 139 printf("not ready for command\n"); 140 #endif 141 break; 142 } 143 144 /* clear the firmware version reg. */ 145 bus_space_write_1(memt, memh, chip_offs + 146 ((CD1400_GFRCR << 1) << bustype), 0); 147 148 /* 149 * On Cyclom-16 references to non-existent chip 4 150 * actually access chip 0 (address line 9 not decoded). 151 * Here we check if the clearing of chip 4 GFRCR actually 152 * cleared chip 0 GFRCR. In that case we have a 16 port card. 153 */ 154 if (cy_chip == 4 && 155 bus_space_read_1(memt, memh, chip_offs + 156 ((CD1400_GFRCR << 1) << bustype)) == 0) 157 break; 158 159 /* reset the chip */ 160 bus_space_write_1(memt, memh, chip_offs + 161 ((CD1400_CCR << 1) << bustype), 162 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 163 164 /* wait for the chip to initialize itself */ 165 for (i = 0; i < 200; i++) { 166 DELAY(50); 167 firmware_ver = bus_space_read_1(memt, memh, chip_offs + 168 ((CD1400_GFRCR << 1) << bustype)); 169 if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 170 break; 171 } 172 #ifdef CY_DEBUG 173 printf("firmware version 0x%x\n", firmware_ver); 174 #endif 175 176 if ((firmware_ver & 0xf0) != 0x40) 177 break; 178 179 /* firmware version OK, CD1400 found */ 180 nchips++; 181 } 182 183 if (nchips == 0) { 184 #ifdef CY_DEBUG 185 printf("no CD1400s found\n"); 186 #endif 187 return (0); 188 } 189 190 #ifdef CY_DEBUG 191 printf("found %d CD1400s\n", nchips); 192 #endif 193 194 return (nchips); 195 } 196 197 void 198 cy_attach(parent, self) 199 struct device *parent, *self; 200 { 201 int card, port, cy_chip, num_chips, cdu, chip_offs, cy_clock; 202 struct cy_softc *sc = (void *)self; 203 204 card = sc->sc_dev.dv_unit; 205 num_chips = sc->sc_nr_cd1400s; 206 if (num_chips == 0) 207 return; 208 209 timeout_set(&sc->sc_poll_to, cy_poll, sc); 210 bzero(sc->sc_ports, sizeof(sc->sc_ports)); 211 sc->sc_nports = num_chips * CD1400_NO_OF_CHANNELS; 212 213 port = 0; 214 for (cy_chip = 0, chip_offs = 0; 215 cy_chip < num_chips; 216 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING<<sc->sc_bustype)) { 217 if (cy_chip == 4) 218 chip_offs -= (CY32_ADDR_FIX<<sc->sc_bustype); 219 220 #ifdef CY_DEBUG 221 printf("attach CD1400 #%d offset 0x%x\n", cy_chip, chip_offs); 222 #endif 223 sc->sc_cd1400_offs[cy_chip] = chip_offs; 224 225 /* configure port 0 as serial port 226 (should already be after reset) */ 227 cd_write_reg_sc(sc, cy_chip, CD1400_GCR, 0); 228 229 /* Set cy_clock depending on firmware version */ 230 if (cd_read_reg_sc(sc, cy_chip, CD1400_GFRCR) <= 0x46) 231 cy_clock = CY_CLOCK; 232 else 233 cy_clock = CY_CLOCK_60; 234 235 /* set up a receive timeout period (1ms) */ 236 cd_write_reg_sc(sc, cy_chip, CD1400_PPR, 237 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 238 239 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 240 sc->sc_ports[port].cy_port_num = port; 241 sc->sc_ports[port].cy_memt = sc->sc_memt; 242 sc->sc_ports[port].cy_memh = sc->sc_memh; 243 sc->sc_ports[port].cy_chip_offs = chip_offs; 244 sc->sc_ports[port].cy_bustype = sc->sc_bustype; 245 sc->sc_ports[port].cy_clock = cy_clock; 246 247 /* should we initialize anything else here? */ 248 port++; 249 } /* for(each port on one CD1400...) */ 250 251 } /* for(each CD1400 on a card... ) */ 252 253 printf(": %d ports\n", port); 254 255 /* ensure an edge for the next interrupt */ 256 bus_space_write_1(sc->sc_memt, sc->sc_memh, 257 CY_CLEAR_INTR<<sc->sc_bustype, 0); 258 } 259 260 /* 261 * open routine. returns zero if successful, else error code 262 */ 263 int cyopen(dev_t, int, int, struct proc *); 264 int cyclose(dev_t, int, int, struct proc *); 265 int cyread(dev_t, struct uio *, int); 266 int cywrite(dev_t, struct uio *, int); 267 struct tty *cytty(dev_t); 268 int cyioctl(dev_t, u_long, caddr_t, int, struct proc *); 269 int cystop(struct tty *, int flag); 270 271 int 272 cyopen(dev, flag, mode, p) 273 dev_t dev; 274 int flag, mode; 275 struct proc *p; 276 { 277 int card = CY_CARD(dev); 278 int port = CY_PORT(dev); 279 struct cy_softc *sc; 280 struct cy_port *cy; 281 struct tty *tp; 282 int s, error; 283 284 if (card >= cy_cd.cd_ndevs || 285 (sc = cy_cd.cd_devs[card]) == NULL) { 286 return (ENXIO); 287 } 288 289 #ifdef CY_DEBUG 290 printf("%s open port %d flag 0x%x mode 0x%x\n", sc->sc_dev.dv_xname, 291 port, flag, mode); 292 #endif 293 294 cy = &sc->sc_ports[port]; 295 296 s = spltty(); 297 if (cy->cy_tty == NULL) { 298 cy->cy_tty = ttymalloc(0); 299 } 300 splx(s); 301 302 tp = cy->cy_tty; 303 tp->t_oproc = cystart; 304 tp->t_param = cyparam; 305 tp->t_dev = dev; 306 307 if (!ISSET(tp->t_state, TS_ISOPEN)) { 308 SET(tp->t_state, TS_WOPEN); 309 ttychars(tp); 310 tp->t_iflag = TTYDEF_IFLAG; 311 tp->t_oflag = TTYDEF_OFLAG; 312 tp->t_cflag = TTYDEF_CFLAG; 313 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 314 SET(tp->t_cflag, CLOCAL); 315 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 316 SET(tp->t_cflag, CRTSCTS); 317 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 318 SET(tp->t_cflag, MDMBUF); 319 tp->t_lflag = TTYDEF_LFLAG; 320 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 321 322 s = spltty(); 323 324 /* 325 * Allocate input ring buffer if we don't already have one 326 */ 327 if (cy->cy_ibuf == NULL) { 328 cy->cy_ibuf = malloc(IBUF_SIZE, M_DEVBUF, M_NOWAIT); 329 if (cy->cy_ibuf == NULL) { 330 printf("%s: (port %d) can't allocate input buffer\n", 331 sc->sc_dev.dv_xname, port); 332 splx(s); 333 return (ENOMEM); 334 } 335 cy->cy_ibuf_end = cy->cy_ibuf + IBUF_SIZE; 336 } 337 338 /* mark the ring buffer as empty */ 339 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 340 341 /* select CD1400 channel */ 342 cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); 343 /* reset the channel */ 344 cd1400_channel_cmd(cy, CD1400_CCR_CMDRESET); 345 /* encode unit (port) number in LIVR */ 346 /* there is just enough space for 5 bits (32 ports) */ 347 cd_write_reg(cy, CD1400_LIVR, port << 3); 348 349 cy->cy_channel_control = 0; 350 351 if (!timeout_pending(&sc->sc_poll_to)) 352 timeout_add(&sc->sc_poll_to, 1); 353 354 /* this sets parameters and raises DTR */ 355 cyparam(tp, &tp->t_termios); 356 357 ttsetwater(tp); 358 359 /* raise RTS too */ 360 cy_modem_control(cy, TIOCM_RTS, DMBIS); 361 362 cy->cy_carrier_stat = cd_read_reg(cy, CD1400_MSVR2); 363 364 /* enable receiver and modem change interrupts */ 365 cd_write_reg(cy, CD1400_SRER, 366 CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 367 368 if (CY_DIALOUT(dev) || 369 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 370 ISSET(tp->t_cflag, MDMBUF) || 371 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 372 SET(tp->t_state, TS_CARR_ON); 373 else 374 CLR(tp->t_state, TS_CARR_ON); 375 } else if (ISSET(tp->t_state, TS_XCLUDE) && suser(p, 0) != 0) { 376 return (EBUSY); 377 } else { 378 s = spltty(); 379 } 380 381 /* wait for carrier if necessary */ 382 if (!ISSET(flag, O_NONBLOCK)) { 383 while (!ISSET(tp->t_cflag, CLOCAL) && 384 !ISSET(tp->t_state, TS_CARR_ON)) { 385 SET(tp->t_state, TS_WOPEN); 386 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 387 "cydcd", 0); 388 if (error != 0) { 389 splx(s); 390 CLR(tp->t_state, TS_WOPEN); 391 return (error); 392 } 393 } 394 } 395 396 splx(s); 397 398 return (*linesw[tp->t_line].l_open)(dev, tp, p); 399 } 400 401 /* 402 * close routine. returns zero if successful, else error code 403 */ 404 int 405 cyclose(dev, flag, mode, p) 406 dev_t dev; 407 int flag, mode; 408 struct proc *p; 409 { 410 int card = CY_CARD(dev); 411 int port = CY_PORT(dev); 412 struct cy_softc *sc = cy_cd.cd_devs[card]; 413 struct cy_port *cy = &sc->sc_ports[port]; 414 struct tty *tp = cy->cy_tty; 415 int s; 416 417 #ifdef CY_DEBUG 418 printf("%s close port %d, flag 0x%x, mode 0x%x\n", sc->sc_dev.dv_xname, 419 port, flag, mode); 420 #endif 421 422 (*linesw[tp->t_line].l_close)(tp, flag, p); 423 s = spltty(); 424 425 if (ISSET(tp->t_cflag, HUPCL) && 426 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 427 /* drop DTR and RTS 428 (should we wait for output buffer to become empty first?) */ 429 cy_modem_control(cy, 0, DMSET); 430 } 431 432 /* 433 * XXX should we disable modem change and 434 * receive interrupts here or somewhere ? 435 */ 436 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 437 438 splx(s); 439 ttyclose(tp); 440 441 return (0); 442 } 443 444 /* 445 * Read routine 446 */ 447 int 448 cyread(dev, uio, flag) 449 dev_t dev; 450 struct uio *uio; 451 int flag; 452 { 453 int card = CY_CARD(dev); 454 int port = CY_PORT(dev); 455 struct cy_softc *sc = cy_cd.cd_devs[card]; 456 struct cy_port *cy = &sc->sc_ports[port]; 457 struct tty *tp = cy->cy_tty; 458 459 #ifdef CY_DEBUG 460 printf("%s read port %d uio 0x%x flag 0x%x\n", sc->sc_dev.dv_xname, 461 port, uio, flag); 462 #endif 463 464 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 465 } 466 467 /* 468 * Write routine 469 */ 470 int 471 cywrite(dev, uio, flag) 472 dev_t dev; 473 struct uio *uio; 474 int flag; 475 { 476 int card = CY_CARD(dev); 477 int port = CY_PORT(dev); 478 struct cy_softc *sc = cy_cd.cd_devs[card]; 479 struct cy_port *cy = &sc->sc_ports[port]; 480 struct tty *tp = cy->cy_tty; 481 482 #ifdef CY_DEBUG 483 printf("%s write port %d uio 0x%x flag 0x%x\n", sc->sc_dev.dv_xname, 484 port, uio, flag); 485 #endif 486 487 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 488 } 489 490 /* 491 * return tty pointer 492 */ 493 struct tty * 494 cytty(dev) 495 dev_t dev; 496 { 497 int card = CY_CARD(dev); 498 int port = CY_PORT(dev); 499 struct cy_softc *sc = cy_cd.cd_devs[card]; 500 struct cy_port *cy = &sc->sc_ports[port]; 501 struct tty *tp = cy->cy_tty; 502 503 return (tp); 504 } 505 506 /* 507 * ioctl routine 508 */ 509 int 510 cyioctl(dev, cmd, data, flag, p) 511 dev_t dev; 512 u_long cmd; 513 caddr_t data; 514 int flag; 515 struct proc *p; 516 { 517 int card = CY_CARD(dev); 518 int port = CY_PORT(dev); 519 struct cy_softc *sc = cy_cd.cd_devs[card]; 520 struct cy_port *cy = &sc->sc_ports[port]; 521 struct tty *tp = cy->cy_tty; 522 int error; 523 524 #ifdef CY_DEBUG 525 printf("%s port %d ioctl cmd 0x%x data 0x%x flag 0x%x\n", 526 sc->sc_dev.dv_xname, port, cmd, data, flag); 527 #endif 528 529 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 530 if (error >= 0) 531 return (error); 532 533 error = ttioctl(tp, cmd, data, flag, p); 534 if (error >= 0) 535 return (error); 536 537 /* XXX should not allow dropping DTR when dialin? */ 538 539 switch (cmd) { 540 case TIOCSBRK: /* start break */ 541 SET(cy->cy_flags, CYF_START_BREAK); 542 cy_enable_transmitter(cy); 543 break; 544 545 case TIOCCBRK: /* stop break */ 546 SET(cy->cy_flags, CYF_END_BREAK); 547 cy_enable_transmitter(cy); 548 break; 549 550 case TIOCSDTR: /* DTR on */ 551 cy_modem_control(cy, TIOCM_DTR, DMBIS); 552 break; 553 554 case TIOCCDTR: /* DTR off */ 555 cy_modem_control(cy, TIOCM_DTR, DMBIC); 556 break; 557 558 case TIOCMSET: /* set new modem control line values */ 559 cy_modem_control(cy, *((int *)data), DMSET); 560 break; 561 562 case TIOCMBIS: /* turn modem control bits on */ 563 cy_modem_control(cy, *((int *)data), DMBIS); 564 break; 565 566 case TIOCMBIC: /* turn modem control bits off */ 567 cy_modem_control(cy, *((int *)data), DMBIC); 568 break; 569 570 case TIOCMGET: /* get modem control/status line state */ 571 *((int *)data) = cy_modem_control(cy, 0, DMGET); 572 break; 573 574 case TIOCGFLAGS: 575 *((int *)data) = cy->cy_openflags | 576 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 577 break; 578 579 case TIOCSFLAGS: 580 error = suser(p, 0); 581 if (error != 0) 582 return (EPERM); 583 584 cy->cy_openflags = *((int *)data) & 585 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 586 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 587 break; 588 589 default: 590 return (ENOTTY); 591 } 592 593 return (0); 594 } 595 596 /* 597 * start output 598 */ 599 void 600 cystart(tp) 601 struct tty *tp; 602 { 603 int card = CY_CARD(tp->t_dev); 604 int port = CY_PORT(tp->t_dev); 605 struct cy_softc *sc = cy_cd.cd_devs[card]; 606 struct cy_port *cy = &sc->sc_ports[port]; 607 int s; 608 609 #ifdef CY_DEBUG 610 printf("%s port %d start, tty 0x%x\n", sc->sc_dev.dv_xname, port, tp); 611 #endif 612 613 s = spltty(); 614 615 #ifdef CY_DEBUG1 616 cy->cy_start_count++; 617 #endif 618 619 if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 620 ttwakeupwr(tp); 621 if (tp->t_outq.c_cc == 0) 622 goto out; 623 624 SET(tp->t_state, TS_BUSY); 625 cy_enable_transmitter(cy); 626 } 627 out: 628 629 splx(s); 630 } 631 632 /* 633 * stop output 634 */ 635 int 636 cystop(tp, flag) 637 struct tty *tp; 638 int flag; 639 { 640 int card = CY_CARD(tp->t_dev); 641 int port = CY_PORT(tp->t_dev); 642 struct cy_softc *sc = cy_cd.cd_devs[card]; 643 struct cy_port *cy = &sc->sc_ports[port]; 644 int s; 645 646 #ifdef CY_DEBUG 647 printf("%s port %d stop tty 0x%x flag 0x%x\n", sc->sc_dev.dv_xname, 648 port, tp, flag); 649 #endif 650 651 s = spltty(); 652 653 if (ISSET(tp->t_state, TS_BUSY)) { 654 if (!ISSET(tp->t_state, TS_TTSTOP)) 655 SET(tp->t_state, TS_FLUSH); 656 657 /* 658 * the transmit interrupt routine will disable transmit when it 659 * notices that CYF_STOP has been set. 660 */ 661 SET(cy->cy_flags, CYF_STOP); 662 } 663 splx(s); 664 return (0); 665 } 666 667 /* 668 * parameter setting routine. 669 * returns 0 if successful, else returns error code 670 */ 671 int 672 cyparam(tp, t) 673 struct tty *tp; 674 struct termios *t; 675 { 676 int card = CY_CARD(tp->t_dev); 677 int port = CY_PORT(tp->t_dev); 678 struct cy_softc *sc = cy_cd.cd_devs[card]; 679 struct cy_port *cy = &sc->sc_ports[port]; 680 int ibpr, obpr, i_clk_opt, o_clk_opt; 681 int s, opt; 682 683 #ifdef CY_DEBUG 684 printf("%s port %d param tty 0x%x termios 0x%x\n", sc->sc_dev.dv_xname, 685 port, tp, t); 686 printf("ispeed %d ospeed %d\n", t->c_ispeed, t->c_ospeed); 687 #endif 688 689 if (t->c_ospeed != 0 && 690 cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 691 return (EINVAL); 692 693 if (t->c_ispeed != 0 && 694 cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 695 return (EINVAL); 696 697 s = spltty(); 698 699 /* hang up the line is ospeed is zero, else turn DTR on */ 700 cy_modem_control(cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 701 702 /* channel was selected by the above call to cy_modem_control() */ 703 /* cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); */ 704 705 /* set transmit speed */ 706 if (t->c_ospeed != 0) { 707 cd_write_reg(cy, CD1400_TCOR, o_clk_opt); 708 cd_write_reg(cy, CD1400_TBPR, obpr); 709 } 710 /* set receive speed */ 711 if (t->c_ispeed != 0) { 712 cd_write_reg(cy, CD1400_RCOR, i_clk_opt); 713 cd_write_reg(cy, CD1400_RBPR, ibpr); 714 } 715 716 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 717 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 718 719 if (opt != cy->cy_channel_control) { 720 cy->cy_channel_control = opt; 721 cd1400_channel_cmd(cy, opt); 722 } 723 724 /* compute COR1 contents */ 725 opt = 0; 726 if (ISSET(t->c_cflag, PARENB)) { 727 if (ISSET(t->c_cflag, PARODD)) 728 opt |= CD1400_COR1_PARODD; 729 opt |= CD1400_COR1_PARNORMAL; 730 } 731 732 if (!ISSET(t->c_iflag, INPCK)) 733 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 734 735 if (ISSET(t->c_cflag, CSTOPB)) 736 opt |= CD1400_COR1_STOP2; 737 738 switch (t->c_cflag & CSIZE) { 739 case CS5: 740 opt |= CD1400_COR1_CS5; 741 break; 742 743 case CS6: 744 opt |= CD1400_COR1_CS6; 745 break; 746 747 case CS7: 748 opt |= CD1400_COR1_CS7; 749 break; 750 751 default: 752 opt |= CD1400_COR1_CS8; 753 break; 754 } 755 756 cd_write_reg(cy, CD1400_COR1, opt); 757 758 #ifdef CY_DEBUG 759 printf("cor1 = 0x%x...", opt); 760 #endif 761 762 /* 763 * use the CD1400 automatic CTS flow control if CRTSCTS is set 764 * 765 * CD1400_COR2_ETC is used because breaks are generated with 766 * embedded transmit commands 767 */ 768 cd_write_reg(cy, CD1400_COR2, 769 CD1400_COR2_ETC | 770 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 771 772 cd_write_reg(cy, CD1400_COR3, RX_FIFO_THRESHOLD); 773 774 cd1400_channel_cmd(cy, 775 CD1400_CCR_CMDCORCHG | 776 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 777 778 cd_write_reg(cy, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 779 cd_write_reg(cy, CD1400_COR5, 0); 780 781 /* 782 * set modem change option registers to generate interrupts 783 * on carrier detect changes. 784 * 785 * if hardware RTS handshaking is used (CY_HW_RTS, DTR and RTS lines 786 * exchanged), also set the handshaking threshold. 787 */ 788 #ifdef CY_HW_RTS 789 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd | 790 (ISSET(t->c_cflag, CRTSCTS) ? RX_DTR_THRESHOLD : 0)); 791 #else 792 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd); 793 #endif /* CY_HW_RTS */ 794 795 cd_write_reg(cy, CD1400_MCOR2, CD1400_MCOR2_CDod); 796 797 /* 798 * set receive timeout to approx. 2ms 799 * could use more complex logic here... 800 * (but is it actually needed or even useful?) 801 */ 802 cd_write_reg(cy, CD1400_RTPR, 2); 803 804 /* 805 * should do anything else here? 806 * XXX check MDMBUF handshaking like in com.c? 807 */ 808 809 splx(s); 810 return (0); 811 } 812 813 /* 814 * set/get modem line status 815 * 816 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 817 * 818 * RTS and DTR are exchanged if CY_HW_RTS is set 819 * 820 */ 821 int 822 cy_modem_control(cy, bits, howto) 823 struct cy_port *cy; 824 int bits; 825 int howto; 826 { 827 int s, msvr; 828 829 s = spltty(); 830 831 /* select channel */ 832 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 833 834 /* does not manipulate RTS if it is used for flow control */ 835 switch (howto) { 836 case DMGET: 837 bits = 0; 838 if (cy->cy_channel_control & CD1400_CCR_RCVEN) 839 bits |= TIOCM_LE; 840 msvr = cd_read_reg(cy, CD1400_MSVR2); 841 #ifdef CY_HW_RTS 842 if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 843 bits |= TIOCM_DTR; 844 if (msvr & CD1400_MSVR2_DTR) 845 bits |= TIOCM_RTS; 846 #else 847 if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 848 bits |= TIOCM_RTS; 849 if (msvr & CD1400_MSVR2_DTR) 850 bits |= TIOCM_DTR; 851 #endif /* CY_HW_RTS */ 852 if (msvr & CD1400_MSVR2_CTS) 853 bits |= TIOCM_CTS; 854 if (msvr & CD1400_MSVR2_CD) 855 bits |= TIOCM_CD; 856 if (msvr & CD1400_MSVR2_DSR) /* not connected on some 857 Cyclom cards? */ 858 bits |= TIOCM_DSR; 859 if (msvr & CD1400_MSVR2_RI) /* not connected on 860 Cyclom-8Y cards? */ 861 bits |= TIOCM_RI; 862 splx(s); 863 return (bits); 864 865 case DMSET: /* replace old values with new ones */ 866 #ifdef CY_HW_RTS 867 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 868 cd_write_reg(cy, CD1400_MSVR2, 869 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 870 cd_write_reg(cy, CD1400_MSVR1, 871 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 872 #else 873 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 874 cd_write_reg(cy, CD1400_MSVR1, 875 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 876 cd_write_reg(cy, CD1400_MSVR2, 877 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 878 #endif /* CY_HW_RTS */ 879 break; 880 881 case DMBIS: /* set bits */ 882 #ifdef CY_HW_RTS 883 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 884 (bits & TIOCM_RTS) != 0) 885 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 886 if (bits & TIOCM_DTR) 887 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 888 #else 889 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 890 (bits & TIOCM_RTS) != 0) 891 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 892 if (bits & TIOCM_DTR) 893 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 894 #endif /* CY_HW_RTS */ 895 break; 896 897 case DMBIC: /* clear bits */ 898 #ifdef CY_HW_RTS 899 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 900 (bits & TIOCM_RTS)) 901 cd_write_reg(cy, CD1400_MSVR2, 0); 902 if (bits & TIOCM_DTR) 903 cd_write_reg(cy, CD1400_MSVR1, 0); 904 #else 905 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 906 (bits & TIOCM_RTS)) 907 cd_write_reg(cy, CD1400_MSVR1, 0); 908 if (bits & TIOCM_DTR) 909 cd_write_reg(cy, CD1400_MSVR2, 0); 910 #endif /* CY_HW_RTS */ 911 break; 912 } 913 splx(s); 914 return (0); 915 } 916 917 /* 918 * Upper-level handler loop (called from timer interrupt?) 919 * This routine is common for multiple cards 920 */ 921 void 922 cy_poll(void *arg) 923 { 924 int port; 925 struct cy_softc *sc = arg; 926 struct cy_port *cy; 927 struct tty *tp; 928 static int counter = 0; 929 #ifdef CY_DEBUG1 930 int did_something; 931 #endif 932 933 int s; 934 935 s = spltty(); 936 937 if (sc->sc_events == 0 && ++counter < 200) { 938 splx(s); 939 goto out; 940 } 941 942 sc->sc_events = 0; 943 splx(s); 944 945 #ifdef CY_DEBUG1 946 sc->sc_poll_count1++; 947 did_something = 0; 948 #endif 949 950 for (port = 0; port < sc->sc_nports; port++) { 951 cy = &sc->sc_ports[port]; 952 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 953 !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 954 continue; 955 956 /* 957 * handle received data 958 */ 959 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 960 u_char line_stat; 961 int chr; 962 963 line_stat = cy->cy_ibuf_rd_ptr[0]; 964 chr = cy->cy_ibuf_rd_ptr[1]; 965 966 if (line_stat & 967 (CD1400_RDSR_BREAK|CD1400_RDSR_FE)) 968 chr |= TTY_FE; 969 if (line_stat & CD1400_RDSR_PE) 970 chr |= TTY_PE; 971 972 /* 973 * on an overrun error the data is treated as 974 * good just as it should be. 975 */ 976 977 #ifdef CY_DEBUG 978 printf("%s port %d ttyinput 0x%x\n", 979 sc->sc_dev.dv_xname, port, chr); 980 #endif 981 982 (*linesw[tp->t_line].l_rint)(chr, tp); 983 984 s = spltty(); /* really necessary? */ 985 if ((cy->cy_ibuf_rd_ptr += 2) == 986 cy->cy_ibuf_end) 987 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 988 splx(s); 989 990 #ifdef CY_DEBUG1 991 did_something = 1; 992 #endif 993 } 994 995 #ifndef CY_HW_RTS 996 /* 997 * If we don't have any received data in ibuf and 998 * CRTSCTS is on and RTS is turned off, it is time 999 * to turn RTS back on 1000 */ 1001 if (ISSET(tp->t_cflag, CRTSCTS)) { 1002 /* we can't use cy_modem_control() here as it 1003 doesn't change RTS if RTSCTS is on */ 1004 cd_write_reg(cy, CD1400_CAR, 1005 port & CD1400_CAR_CHAN); 1006 1007 if ((cd_read_reg(cy, 1008 CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 1009 cd_write_reg(cy, CD1400_MSVR1, 1010 CD1400_MSVR1_RTS); 1011 #ifdef CY_DEBUG1 1012 did_something = 1; 1013 #endif 1014 } 1015 } 1016 #endif /* CY_HW_RTS */ 1017 1018 /* 1019 * handle carrier changes 1020 */ 1021 s = spltty(); 1022 if (ISSET(cy->cy_flags, CYF_CARRIER_CHANGED)) { 1023 int carrier; 1024 1025 CLR(cy->cy_flags, CYF_CARRIER_CHANGED); 1026 splx(s); 1027 1028 carrier = ((cy->cy_carrier_stat & 1029 CD1400_MSVR2_CD) != 0); 1030 1031 #ifdef CY_DEBUG 1032 printf("%s: cy_poll: carrier change " 1033 "(port %d, carrier %d)\n", 1034 sc->sc_dev.dv_xname, port, carrier); 1035 #endif 1036 if (CY_DIALIN(tp->t_dev) && 1037 !(*linesw[tp->t_line].l_modem)(tp, carrier)) 1038 cy_modem_control(cy, TIOCM_DTR, DMBIC); 1039 1040 #ifdef CY_DEBUG1 1041 did_something = 1; 1042 #endif 1043 } else { 1044 splx(s); 1045 } 1046 1047 s = spltty(); 1048 if (ISSET(cy->cy_flags, CYF_START)) { 1049 CLR(cy->cy_flags, CYF_START); 1050 splx(s); 1051 1052 (*linesw[tp->t_line].l_start)(tp); 1053 1054 #ifdef CY_DEBUG1 1055 did_something = 1; 1056 #endif 1057 } else { 1058 splx(s); 1059 } 1060 1061 /* could move this to even upper level... */ 1062 if (cy->cy_fifo_overruns) { 1063 cy->cy_fifo_overruns = 0; 1064 /* doesn't report overrun count, 1065 but shouldn't really matter */ 1066 log(LOG_WARNING, "%s: port %d fifo overrun\n", 1067 sc->sc_dev.dv_xname, port); 1068 } 1069 if (cy->cy_ibuf_overruns) { 1070 cy->cy_ibuf_overruns = 0; 1071 log(LOG_WARNING, "%s: port %d ibuf overrun\n", 1072 sc->sc_dev.dv_xname, port); 1073 } 1074 } /* for(port...) */ 1075 #ifdef CY_DEBUG1 1076 if (did_something && counter >= 200) 1077 sc->sc_poll_count2++; 1078 #endif 1079 1080 counter = 0; 1081 1082 out: 1083 timeout_add(&sc->sc_poll_to, 1); 1084 } 1085 1086 /* 1087 * hardware interrupt routine 1088 */ 1089 int 1090 cy_intr(arg) 1091 void *arg; 1092 { 1093 struct cy_softc *sc = arg; 1094 struct cy_port *cy; 1095 int cy_chip, stat; 1096 int int_serviced = -1; 1097 1098 /* 1099 * Check interrupt status of each CD1400 chip on this card 1100 * (multiple cards cannot share the same interrupt) 1101 */ 1102 for (cy_chip = 0; cy_chip < sc->sc_nr_cd1400s; cy_chip++) { 1103 1104 stat = cd_read_reg_sc(sc, cy_chip, CD1400_SVRR); 1105 if (stat == 0) 1106 continue; 1107 1108 if (ISSET(stat, CD1400_SVRR_RXRDY)) { 1109 u_char save_car, save_rir, serv_type; 1110 u_char line_stat, recv_data, n_chars; 1111 u_char *buf_p; 1112 1113 save_rir = cd_read_reg_sc(sc, cy_chip, CD1400_RIR); 1114 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1115 /* enter rx service */ 1116 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_rir); 1117 1118 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_RIVR); 1119 cy = &sc->sc_ports[serv_type >> 3]; 1120 1121 #ifdef CY_DEBUG1 1122 cy->cy_rx_int_count++; 1123 #endif 1124 1125 buf_p = cy->cy_ibuf_wr_ptr; 1126 1127 if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1128 line_stat = cd_read_reg(cy, CD1400_RDSR); 1129 recv_data = cd_read_reg(cy, CD1400_RDSR); 1130 1131 if (cy->cy_tty == NULL || 1132 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1133 goto end_rx_serv; 1134 1135 #ifdef CY_DEBUG 1136 printf("%s port %d recv exception, " 1137 "line_stat 0x%x, char 0x%x\n", 1138 sc->sc_dev.dv_xname, cy->cy_port_num, 1139 line_stat, recv_data); 1140 #endif 1141 if (ISSET(line_stat, CD1400_RDSR_OE)) 1142 cy->cy_fifo_overruns++; 1143 1144 *buf_p++ = line_stat; 1145 *buf_p++ = recv_data; 1146 if (buf_p == cy->cy_ibuf_end) 1147 buf_p = cy->cy_ibuf; 1148 1149 if (buf_p == cy->cy_ibuf_rd_ptr) { 1150 if (buf_p == cy->cy_ibuf) 1151 buf_p = cy->cy_ibuf_end; 1152 buf_p -= 2; 1153 cy->cy_ibuf_overruns++; 1154 } 1155 sc->sc_events = 1; 1156 } else { /* no exception, received data OK */ 1157 n_chars = cd_read_reg(cy, CD1400_RDCR); 1158 1159 /* If no tty or not open, discard data */ 1160 if (cy->cy_tty == NULL || 1161 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) { 1162 while (n_chars--) 1163 cd_read_reg(cy, CD1400_RDSR); 1164 goto end_rx_serv; 1165 } 1166 1167 #ifdef CY_DEBUG 1168 printf("%s port %d receive ok %d chars\n", 1169 sc->sc_dev.dv_xname, cy->cy_port_num, 1170 n_chars); 1171 #endif 1172 while (n_chars--) { 1173 *buf_p++ = 0; /* status: OK */ 1174 *buf_p++ = cd_read_reg(cy, 1175 CD1400_RDSR); /* data byte */ 1176 if (buf_p == cy->cy_ibuf_end) 1177 buf_p = cy->cy_ibuf; 1178 if (buf_p == cy->cy_ibuf_rd_ptr) { 1179 if (buf_p == cy->cy_ibuf) 1180 buf_p = cy->cy_ibuf_end; 1181 buf_p -= 2; 1182 cy->cy_ibuf_overruns++; 1183 break; 1184 } 1185 } 1186 sc->sc_events = 1; 1187 } 1188 1189 cy->cy_ibuf_wr_ptr = buf_p; 1190 1191 #ifndef CY_HW_RTS 1192 /* RTS handshaking for incoming data */ 1193 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1194 int bf; 1195 1196 bf = buf_p - cy->cy_ibuf_rd_ptr; 1197 if (bf < 0) 1198 bf += IBUF_SIZE; 1199 1200 if (bf > (IBUF_SIZE/2)) /* turn RTS off */ 1201 cd_write_reg(cy, CD1400_MSVR1, 0); 1202 } 1203 #endif /* CY_HW_RTS */ 1204 1205 end_rx_serv: 1206 /* terminate service context */ 1207 cd_write_reg(cy, CD1400_RIR, save_rir & 0x3f); 1208 cd_write_reg(cy, CD1400_CAR, save_car); 1209 int_serviced = 1; 1210 } /* if(rx_service...) */ 1211 1212 if (ISSET(stat, CD1400_SVRR_MDMCH)) { 1213 u_char save_car, save_mir, serv_type, modem_stat; 1214 1215 save_mir = cd_read_reg_sc(sc, cy_chip, CD1400_MIR); 1216 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1217 /* enter modem service */ 1218 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_mir); 1219 1220 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_MIVR); 1221 cy = &sc->sc_ports[serv_type >> 3]; 1222 1223 #ifdef CY_DEBUG1 1224 cy->cy_modem_int_count++; 1225 #endif 1226 1227 modem_stat = cd_read_reg(cy, CD1400_MSVR2); 1228 1229 #ifdef CY_DEBUG 1230 printf("%s port %d modem line change, new stat 0x%x\n", 1231 sc->sc_dev.dv_xname, cy->cy_port_num, modem_stat); 1232 #endif 1233 if (ISSET((cy->cy_carrier_stat ^ modem_stat), 1234 CD1400_MSVR2_CD)) { 1235 SET(cy->cy_flags, CYF_CARRIER_CHANGED); 1236 sc->sc_events = 1; 1237 } 1238 1239 cy->cy_carrier_stat = modem_stat; 1240 1241 /* terminate service context */ 1242 cd_write_reg(cy, CD1400_MIR, save_mir & 0x3f); 1243 cd_write_reg(cy, CD1400_CAR, save_car); 1244 int_serviced = 1; 1245 } /* if(modem_service...) */ 1246 1247 if (ISSET(stat, CD1400_SVRR_TXRDY)) { 1248 u_char save_car, save_tir, serv_type, count, ch; 1249 struct tty *tp; 1250 1251 save_tir = cd_read_reg_sc(sc, cy_chip, CD1400_TIR); 1252 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1253 /* enter tx service */ 1254 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_tir); 1255 1256 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_TIVR); 1257 cy = &sc->sc_ports[serv_type >> 3]; 1258 1259 #ifdef CY_DEBUG1 1260 cy->cy_tx_int_count++; 1261 #endif 1262 #ifdef CY_DEBUG 1263 printf("%s port %d tx service\n", sc->sc_dev.dv_xname, 1264 cy->cy_port_num); 1265 #endif 1266 1267 /* stop transmitting if no tty or CYF_STOP set */ 1268 tp = cy->cy_tty; 1269 if (tp == NULL || ISSET(cy->cy_flags, CYF_STOP)) 1270 goto txdone; 1271 1272 count = 0; 1273 if (ISSET(cy->cy_flags, CYF_SEND_NUL)) { 1274 cd_write_reg(cy, CD1400_TDR, 0); 1275 cd_write_reg(cy, CD1400_TDR, 0); 1276 count += 2; 1277 CLR(cy->cy_flags, CYF_SEND_NUL); 1278 } 1279 1280 if (tp->t_outq.c_cc > 0) { 1281 SET(tp->t_state, TS_BUSY); 1282 while (tp->t_outq.c_cc > 0 && 1283 count < CD1400_TX_FIFO_SIZE) { 1284 ch = getc(&tp->t_outq); 1285 /* remember to double NUL characters 1286 because embedded transmit commands 1287 are enabled */ 1288 if (ch == 0) { 1289 if (count >= 1290 CD1400_TX_FIFO_SIZE-2) { 1291 SET(cy->cy_flags, 1292 CYF_SEND_NUL); 1293 break; 1294 } 1295 1296 cd_write_reg(cy, CD1400_TDR, ch); 1297 count++; 1298 } 1299 1300 cd_write_reg(cy, CD1400_TDR, ch); 1301 count++; 1302 } 1303 } else { 1304 /* no data to send -- check if we should 1305 start/stop a break */ 1306 /* XXX does this cause too much delay before 1307 breaks? */ 1308 if (ISSET(cy->cy_flags, CYF_START_BREAK)) { 1309 cd_write_reg(cy, CD1400_TDR, 0); 1310 cd_write_reg(cy, CD1400_TDR, 0x81); 1311 CLR(cy->cy_flags, CYF_START_BREAK); 1312 } 1313 if (ISSET(cy->cy_flags, CYF_END_BREAK)) { 1314 cd_write_reg(cy, CD1400_TDR, 0); 1315 cd_write_reg(cy, CD1400_TDR, 0x83); 1316 CLR(cy->cy_flags, CYF_END_BREAK); 1317 } 1318 } 1319 1320 if (tp->t_outq.c_cc == 0) { 1321 txdone: 1322 /* 1323 * No data to send or requested to stop. 1324 * Disable transmit interrupt 1325 */ 1326 cd_write_reg(cy, CD1400_SRER, 1327 cd_read_reg(cy, CD1400_SRER) 1328 & ~CD1400_SRER_TXRDY); 1329 CLR(cy->cy_flags, CYF_STOP); 1330 CLR(tp->t_state, TS_BUSY); 1331 } 1332 1333 if (tp->t_outq.c_cc <= tp->t_lowat) { 1334 SET(cy->cy_flags, CYF_START); 1335 sc->sc_events = 1; 1336 } 1337 1338 /* terminate service context */ 1339 cd_write_reg(cy, CD1400_TIR, save_tir & 0x3f); 1340 cd_write_reg(cy, CD1400_CAR, save_car); 1341 int_serviced = 1; 1342 } /* if(tx_service...) */ 1343 } /* for(...all CD1400s on a card) */ 1344 1345 /* ensure an edge for next interrupt */ 1346 bus_space_write_1(sc->sc_memt, sc->sc_memh, 1347 CY_CLEAR_INTR<<sc->sc_bustype, 0); 1348 return (int_serviced); 1349 } 1350 1351 /* 1352 * subroutine to enable CD1400 transmitter 1353 */ 1354 void 1355 cy_enable_transmitter(cy) 1356 struct cy_port *cy; 1357 { 1358 int s; 1359 s = spltty(); 1360 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 1361 cd_write_reg(cy, CD1400_SRER, cd_read_reg(cy, CD1400_SRER) 1362 | CD1400_SRER_TXRDY); 1363 splx(s); 1364 } 1365 1366 /* 1367 * Execute a CD1400 channel command 1368 */ 1369 void 1370 cd1400_channel_cmd(cy, cmd) 1371 struct cy_port *cy; 1372 int cmd; 1373 { 1374 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1375 1376 #ifdef CY_DEBUG 1377 printf("c1400_channel_cmd cy 0x%x command 0x%x\n", cy, cmd); 1378 #endif 1379 1380 /* wait until cd1400 is ready to process a new command */ 1381 while (cd_read_reg(cy, CD1400_CCR) != 0 && waitcnt-- > 0) 1382 ; 1383 1384 if (waitcnt == 0) 1385 log(LOG_ERR, "cy: channel command timeout\n"); 1386 1387 cd_write_reg(cy, CD1400_CCR, cmd); 1388 } 1389 1390 /* 1391 * Compute clock option register and baud rate register values 1392 * for a given speed. Return 0 on success, -1 on failure. 1393 * 1394 * The error between requested and actual speed seems 1395 * to be well within allowed limits (less than 3%) 1396 * with every speed value between 50 and 150000 bps. 1397 */ 1398 int 1399 cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock) 1400 { 1401 int c, co, br; 1402 1403 if (speed < 50 || speed > 150000) 1404 return (-1); 1405 1406 for (c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1407 br = (cy_clock + (co * speed) / 2) / (co * speed); 1408 if (br < 0x100) { 1409 *bpr = br; 1410 *cor = c; 1411 return (0); 1412 } 1413 } 1414 1415 return (-1); 1416 } 1417