1 /* $OpenBSD: adw.c,v 1.20 2001/07/11 17:31:24 krw Exp $ */ 2 /* $NetBSD: adw.c,v 1.23 2000/05/27 18:24:50 dante Exp $ */ 3 4 /* 5 * Generic driver for the Advanced Systems Inc. SCSI controllers 6 * 7 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 8 * All rights reserved. 9 * 10 * Author: Baldassare Dante Profeta <dante@mclink.it> 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/errno.h> 46 #include <sys/ioctl.h> 47 #include <sys/device.h> 48 #include <sys/malloc.h> 49 #include <sys/buf.h> 50 #include <sys/proc.h> 51 #include <sys/user.h> 52 #include <sys/timeout.h> 53 54 #include <machine/bus.h> 55 #include <machine/intr.h> 56 57 #include <vm/vm.h> 58 59 #include <scsi/scsi_all.h> 60 #include <scsi/scsiconf.h> 61 62 #include <dev/ic/adwlib.h> 63 #include <dev/microcode/adw/adwmcode.h> 64 #include <dev/ic/adw.h> 65 66 #ifndef DDB 67 #define Debugger() panic("should call debugger here (adw.c)") 68 #endif /* ! DDB */ 69 70 /******************************************************************************/ 71 72 73 void adw_enqueue __P((ADW_SOFTC *, struct scsi_xfer *, int)); 74 struct scsi_xfer *adw_dequeue __P((ADW_SOFTC *)); 75 76 int adw_alloc_controls __P((ADW_SOFTC *)); 77 int adw_alloc_carriers __P((ADW_SOFTC *)); 78 int adw_create_ccbs __P((ADW_SOFTC *, ADW_CCB *, int)); 79 void adw_free_ccb __P((ADW_SOFTC *, ADW_CCB *)); 80 void adw_reset_ccb __P((ADW_CCB *)); 81 int adw_init_ccb __P((ADW_SOFTC *, ADW_CCB *)); 82 ADW_CCB *adw_get_ccb __P((ADW_SOFTC *, int)); 83 int adw_queue_ccb __P((ADW_SOFTC *, ADW_CCB *, int)); 84 85 int adw_scsi_cmd __P((struct scsi_xfer *)); 86 int adw_build_req __P((struct scsi_xfer *, ADW_CCB *, int)); 87 void adw_build_sglist __P((ADW_CCB *, ADW_SCSI_REQ_Q *, ADW_SG_BLOCK *)); 88 void adw_minphys __P((struct buf *)); 89 void adw_isr_callback __P((ADW_SOFTC *, ADW_SCSI_REQ_Q *)); 90 void adw_async_callback __P((ADW_SOFTC *, u_int8_t)); 91 92 void adw_print_info __P((ADW_SOFTC *, int)); 93 94 int adw_poll __P((ADW_SOFTC *, struct scsi_xfer *, int)); 95 void adw_timeout __P((void *)); 96 void adw_reset_bus __P((ADW_SOFTC *)); 97 98 99 /******************************************************************************/ 100 101 102 struct cfdriver adw_cd = { 103 NULL, "adw", DV_DULL 104 }; 105 106 /* the below structure is so we have a default dev struct for our link struct */ 107 struct scsi_device adw_dev = 108 { 109 NULL, /* Use default error handler */ 110 NULL, /* have a queue, served by this */ 111 NULL, /* have no async handler */ 112 NULL, /* Use default 'done' routine */ 113 }; 114 115 116 /******************************************************************************/ 117 /* scsi_xfer queue routines */ 118 /******************************************************************************/ 119 120 /* 121 * Insert a scsi_xfer into the software queue. We overload xs->free_list 122 * to avoid having to allocate additional resources (since we're used 123 * only during resource shortages anyhow. 124 */ 125 void 126 adw_enqueue(sc, xs, infront) 127 ADW_SOFTC *sc; 128 struct scsi_xfer *xs; 129 int infront; 130 { 131 132 if (infront || sc->sc_queue.lh_first == NULL) { 133 if (sc->sc_queue.lh_first == NULL) 134 sc->sc_queuelast = xs; 135 LIST_INSERT_HEAD(&sc->sc_queue, xs, free_list); 136 return; 137 } 138 LIST_INSERT_AFTER(sc->sc_queuelast, xs, free_list); 139 sc->sc_queuelast = xs; 140 } 141 142 143 /* 144 * Pull a scsi_xfer off the front of the software queue. 145 */ 146 struct scsi_xfer * 147 adw_dequeue(sc) 148 ADW_SOFTC *sc; 149 { 150 struct scsi_xfer *xs; 151 152 xs = sc->sc_queue.lh_first; 153 LIST_REMOVE(xs, free_list); 154 155 if (sc->sc_queue.lh_first == NULL) 156 sc->sc_queuelast = NULL; 157 158 return (xs); 159 } 160 161 /******************************************************************************/ 162 /* DMA Mapping for Control Blocks */ 163 /******************************************************************************/ 164 165 166 int 167 adw_alloc_controls(sc) 168 ADW_SOFTC *sc; 169 { 170 bus_dma_segment_t seg; 171 int error, rseg; 172 173 /* 174 * Allocate the control structure. 175 */ 176 if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct adw_control), 177 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 178 printf("%s: unable to allocate control structures," 179 " error = %d\n", sc->sc_dev.dv_xname, error); 180 return (error); 181 } 182 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 183 sizeof(struct adw_control), (caddr_t *) & sc->sc_control, 184 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 185 printf("%s: unable to map control structures, error = %d\n", 186 sc->sc_dev.dv_xname, error); 187 return (error); 188 } 189 190 /* 191 * Create and load the DMA map used for the control blocks. 192 */ 193 if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct adw_control), 194 1, sizeof(struct adw_control), 0, BUS_DMA_NOWAIT, 195 &sc->sc_dmamap_control)) != 0) { 196 printf("%s: unable to create control DMA map, error = %d\n", 197 sc->sc_dev.dv_xname, error); 198 return (error); 199 } 200 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control, 201 sc->sc_control, sizeof(struct adw_control), NULL, 202 BUS_DMA_NOWAIT)) != 0) { 203 printf("%s: unable to load control DMA map, error = %d\n", 204 sc->sc_dev.dv_xname, error); 205 return (error); 206 } 207 208 return (0); 209 } 210 211 212 int 213 adw_alloc_carriers(sc) 214 ADW_SOFTC *sc; 215 { 216 bus_dma_segment_t seg; 217 int error, rseg; 218 219 /* 220 * Allocate the control structure. 221 */ 222 sc->sc_control->carriers = 223 malloc(sizeof(ADW_CARRIER) * ADW_MAX_CARRIER, M_DEVBUF, 224 M_NOWAIT); 225 if (sc->sc_control->carriers == NULL) 226 return (ENOMEM); 227 228 229 if ((error = bus_dmamem_alloc(sc->sc_dmat, 230 sizeof(ADW_CARRIER) * ADW_MAX_CARRIER, 231 0x10, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 232 printf("%s: unable to allocate carrier structures," 233 " error = %d\n", sc->sc_dev.dv_xname, error); 234 return (error); 235 } 236 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 237 sizeof(ADW_CARRIER) * ADW_MAX_CARRIER, 238 (caddr_t *) &sc->sc_control->carriers, 239 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 240 printf("%s: unable to map carrier structures," 241 " error = %d\n", sc->sc_dev.dv_xname, error); 242 return (error); 243 } 244 245 /* 246 * Create and load the DMA map used for the control blocks. 247 */ 248 if ((error = bus_dmamap_create(sc->sc_dmat, 249 sizeof(ADW_CARRIER) * ADW_MAX_CARRIER, 1, 250 sizeof(ADW_CARRIER) * ADW_MAX_CARRIER, 0,BUS_DMA_NOWAIT, 251 &sc->sc_dmamap_carrier)) != 0) { 252 printf("%s: unable to create carriers DMA map," 253 " error = %d\n", sc->sc_dev.dv_xname, error); 254 return (error); 255 } 256 if ((error = bus_dmamap_load(sc->sc_dmat, 257 sc->sc_dmamap_carrier, sc->sc_control->carriers, 258 sizeof(ADW_CARRIER) * ADW_MAX_CARRIER, NULL, 259 BUS_DMA_NOWAIT)) != 0) { 260 printf("%s: unable to load carriers DMA map," 261 " error = %d\n", sc->sc_dev.dv_xname, error); 262 return (error); 263 } 264 265 return (0); 266 } 267 268 269 /******************************************************************************/ 270 /* Control Blocks routines */ 271 /******************************************************************************/ 272 273 274 /* 275 * Create a set of ccbs and add them to the free list. Called once 276 * by adw_init(). We return the number of CCBs successfully created. 277 */ 278 int 279 adw_create_ccbs(sc, ccbstore, count) 280 ADW_SOFTC *sc; 281 ADW_CCB *ccbstore; 282 int count; 283 { 284 ADW_CCB *ccb; 285 int i, error; 286 287 for (i = 0; i < count; i++) { 288 ccb = &ccbstore[i]; 289 if ((error = adw_init_ccb(sc, ccb)) != 0) { 290 printf("%s: unable to initialize ccb, error = %d\n", 291 sc->sc_dev.dv_xname, error); 292 return (i); 293 } 294 TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain); 295 } 296 297 return (i); 298 } 299 300 301 /* 302 * A ccb is put onto the free list. 303 */ 304 void 305 adw_free_ccb(sc, ccb) 306 ADW_SOFTC *sc; 307 ADW_CCB *ccb; 308 { 309 int s; 310 311 s = splbio(); 312 313 adw_reset_ccb(ccb); 314 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain); 315 316 /* 317 * If there were none, wake anybody waiting for one to come free, 318 * starting with queued entries. 319 */ 320 if (ccb->chain.tqe_next == 0) 321 wakeup(&sc->sc_free_ccb); 322 323 splx(s); 324 } 325 326 327 void 328 adw_reset_ccb(ccb) 329 ADW_CCB *ccb; 330 { 331 332 ccb->flags = 0; 333 } 334 335 336 int 337 adw_init_ccb(sc, ccb) 338 ADW_SOFTC *sc; 339 ADW_CCB *ccb; 340 { 341 int hashnum, error; 342 343 /* 344 * Create the DMA map for this CCB. 345 */ 346 error = bus_dmamap_create(sc->sc_dmat, 347 (ADW_MAX_SG_LIST - 1) * PAGE_SIZE, 348 ADW_MAX_SG_LIST, (ADW_MAX_SG_LIST - 1) * PAGE_SIZE, 349 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->dmamap_xfer); 350 if (error) { 351 printf("%s: unable to create CCB DMA map, error = %d\n", 352 sc->sc_dev.dv_xname, error); 353 return (error); 354 } 355 356 /* 357 * put in the phystokv hash table 358 * Never gets taken out. 359 */ 360 ccb->hashkey = sc->sc_dmamap_control->dm_segs[0].ds_addr + 361 ADW_CCB_OFF(ccb); 362 hashnum = CCB_HASH(ccb->hashkey); 363 ccb->nexthash = sc->sc_ccbhash[hashnum]; 364 sc->sc_ccbhash[hashnum] = ccb; 365 adw_reset_ccb(ccb); 366 return (0); 367 } 368 369 370 /* 371 * Get a free ccb 372 * 373 * If there are none, see if we can allocate a new one 374 */ 375 ADW_CCB * 376 adw_get_ccb(sc, flags) 377 ADW_SOFTC *sc; 378 int flags; 379 { 380 ADW_CCB *ccb = 0; 381 int s; 382 383 s = splbio(); 384 385 /* 386 * If we can and have to, sleep waiting for one to come free 387 * but only if we can't allocate a new one. 388 */ 389 for (;;) { 390 ccb = sc->sc_free_ccb.tqh_first; 391 if (ccb) { 392 TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain); 393 break; 394 } 395 if ((flags & SCSI_NOSLEEP) != 0) 396 goto out; 397 398 tsleep(&sc->sc_free_ccb, PRIBIO, "adwccb", 0); 399 } 400 401 ccb->flags |= CCB_ALLOC; 402 403 out: 404 splx(s); 405 return (ccb); 406 } 407 408 409 /* 410 * Given a physical address, find the ccb that it corresponds to. 411 */ 412 ADW_CCB * 413 adw_ccb_phys_kv(sc, ccb_phys) 414 ADW_SOFTC *sc; 415 u_int32_t ccb_phys; 416 { 417 int hashnum = CCB_HASH(ccb_phys); 418 ADW_CCB *ccb = sc->sc_ccbhash[hashnum]; 419 420 while (ccb) { 421 if (ccb->hashkey == ccb_phys) 422 break; 423 ccb = ccb->nexthash; 424 } 425 return (ccb); 426 } 427 428 429 /* 430 * Queue a CCB to be sent to the controller, and send it if possible. 431 */ 432 int 433 adw_queue_ccb(sc, ccb, retry) 434 ADW_SOFTC *sc; 435 ADW_CCB *ccb; 436 int retry; 437 { 438 int errcode = ADW_SUCCESS; 439 440 if(!retry) { 441 TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain); 442 } 443 444 while ((ccb = sc->sc_waiting_ccb.tqh_first) != NULL) { 445 446 errcode = AdwExeScsiQueue(sc, &ccb->scsiq); 447 switch(errcode) { 448 case ADW_SUCCESS: 449 break; 450 451 case ADW_BUSY: 452 printf("ADW_BUSY\n"); 453 return(ADW_BUSY); 454 455 case ADW_ERROR: 456 printf("ADW_ERROR\n"); 457 TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain); 458 return(ADW_ERROR); 459 } 460 461 TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain); 462 TAILQ_INSERT_TAIL(&sc->sc_pending_ccb, ccb, chain); 463 464 /* ALWAYS initialize stimeout, lest it contain garbage! */ 465 timeout_set(&ccb->xs->stimeout, adw_timeout, ccb); 466 if ((ccb->xs->flags & SCSI_POLL) == 0) 467 timeout_add(&ccb->xs->stimeout, (ccb->timeout * hz) / 1000); 468 } 469 470 return(errcode); 471 } 472 473 474 /******************************************************************************/ 475 /* SCSI layer interfacing routines */ 476 /******************************************************************************/ 477 478 479 int 480 adw_init(sc) 481 ADW_SOFTC *sc; 482 { 483 u_int16_t warn_code; 484 485 486 sc->cfg.lib_version = (ADW_LIB_VERSION_MAJOR << 8) | 487 ADW_LIB_VERSION_MINOR; 488 sc->cfg.chip_version = 489 ADW_GET_CHIP_VERSION(sc->sc_iot, sc->sc_ioh, sc->bus_type); 490 491 /* 492 * Reset the chip to start and allow register writes. 493 */ 494 if (ADW_FIND_SIGNATURE(sc->sc_iot, sc->sc_ioh) == 0) { 495 panic("adw_init: adw_find_signature failed"); 496 } else { 497 AdwResetChip(sc->sc_iot, sc->sc_ioh); 498 499 warn_code = AdwInitFromEEPROM(sc); 500 501 if (warn_code & ADW_WARN_EEPROM_CHKSUM) 502 printf("%s: Bad checksum found. " 503 "Setting default values\n", 504 sc->sc_dev.dv_xname); 505 if (warn_code & ADW_WARN_EEPROM_TERMINATION) 506 printf("%s: Bad bus termination setting." 507 "Using automatic termination.\n", 508 sc->sc_dev.dv_xname); 509 } 510 511 sc->isr_callback = (ADW_CALLBACK) adw_isr_callback; 512 sc->async_callback = (ADW_CALLBACK) adw_async_callback; 513 514 return 0; 515 } 516 517 518 void 519 adw_attach(sc) 520 ADW_SOFTC *sc; 521 { 522 int i, error; 523 524 525 TAILQ_INIT(&sc->sc_free_ccb); 526 TAILQ_INIT(&sc->sc_waiting_ccb); 527 TAILQ_INIT(&sc->sc_pending_ccb); 528 LIST_INIT(&sc->sc_queue); 529 530 531 /* 532 * Allocate the Control Blocks. 533 */ 534 error = adw_alloc_controls(sc); 535 if (error) 536 return; /* (error) */ ; 537 538 bzero(sc->sc_control, sizeof(struct adw_control)); 539 540 /* 541 * Create and initialize the Control Blocks. 542 */ 543 i = adw_create_ccbs(sc, sc->sc_control->ccbs, ADW_MAX_CCB); 544 if (i == 0) { 545 printf("%s: unable to create Control Blocks\n", 546 sc->sc_dev.dv_xname); 547 return; /* (ENOMEM) */ ; 548 } else if (i != ADW_MAX_CCB) { 549 printf("%s: WARNING: only %d of %d Control Blocks" 550 " created\n", 551 sc->sc_dev.dv_xname, i, ADW_MAX_CCB); 552 } 553 554 /* 555 * Create and initialize the Carriers. 556 */ 557 error = adw_alloc_carriers(sc); 558 if (error) 559 return; /* (error) */ ; 560 561 /* 562 * Zero's the freeze_device status 563 */ 564 bzero(sc->sc_freeze_dev, sizeof(sc->sc_freeze_dev)); 565 566 /* 567 * Initialize the adapter 568 */ 569 switch (AdwInitDriver(sc)) { 570 case ADW_IERR_BIST_PRE_TEST: 571 panic("%s: BIST pre-test error", 572 sc->sc_dev.dv_xname); 573 break; 574 575 case ADW_IERR_BIST_RAM_TEST: 576 panic("%s: BIST RAM test error", 577 sc->sc_dev.dv_xname); 578 break; 579 580 case ADW_IERR_MCODE_CHKSUM: 581 panic("%s: Microcode checksum error", 582 sc->sc_dev.dv_xname); 583 break; 584 585 case ADW_IERR_ILLEGAL_CONNECTION: 586 panic("%s: All three connectors are in use", 587 sc->sc_dev.dv_xname); 588 break; 589 590 case ADW_IERR_REVERSED_CABLE: 591 panic("%s: Cable is reversed", 592 sc->sc_dev.dv_xname); 593 break; 594 595 case ADW_IERR_HVD_DEVICE: 596 panic("%s: HVD attached to LVD connector", 597 sc->sc_dev.dv_xname); 598 break; 599 600 case ADW_IERR_SINGLE_END_DEVICE: 601 panic("%s: single-ended device is attached to" 602 " one of the connectors", 603 sc->sc_dev.dv_xname); 604 break; 605 606 case ADW_IERR_NO_CARRIER: 607 panic("%s: unable to create Carriers", 608 sc->sc_dev.dv_xname); 609 break; 610 611 case ADW_WARN_BUSRESET_ERROR: 612 printf("%s: WARNING: Bus Reset Error\n", 613 sc->sc_dev.dv_xname); 614 break; 615 } 616 617 /* 618 * Fill in the adapter. 619 */ 620 sc->sc_adapter.scsi_cmd = adw_scsi_cmd; 621 sc->sc_adapter.scsi_minphys = adw_minphys; 622 623 /* 624 * fill in the prototype scsi_link. 625 */ 626 sc->sc_link.adapter_softc = sc; 627 sc->sc_link.adapter_target = sc->chip_scsi_id; 628 sc->sc_link.adapter = &sc->sc_adapter; 629 sc->sc_link.device = &adw_dev; 630 sc->sc_link.openings = 4; 631 sc->sc_link.adapter_buswidth = ADW_MAX_TID+1; 632 633 config_found(&sc->sc_dev, &sc->sc_link, scsiprint); 634 } 635 636 637 void 638 adw_minphys(bp) 639 struct buf *bp; 640 { 641 642 if (bp->b_bcount > ((ADW_MAX_SG_LIST - 1) * PAGE_SIZE)) 643 bp->b_bcount = ((ADW_MAX_SG_LIST - 1) * PAGE_SIZE); 644 minphys(bp); 645 } 646 647 648 /* 649 * start a scsi operation given the command and the data address. 650 * Also needs the unit, target and lu. 651 */ 652 int 653 adw_scsi_cmd(xs) 654 struct scsi_xfer *xs; 655 { 656 struct scsi_link *sc_link = xs->sc_link; 657 ADW_SOFTC *sc = sc_link->adapter_softc; 658 ADW_CCB *ccb; 659 int s, fromqueue = 1, dontqueue = 0, nowait = 0, retry = 0; 660 int flags; 661 662 s = splbio(); /* protect the queue */ 663 664 /* 665 * If we're running the queue from adw_done(), we've been 666 * called with the first queue entry as our argument. 667 */ 668 if (xs == sc->sc_queue.lh_first) { 669 if(sc->sc_freeze_dev[xs->sc_link->target]) { 670 splx(s); 671 return (TRY_AGAIN_LATER); 672 } 673 xs = adw_dequeue(sc); 674 fromqueue = 1; 675 nowait = 1; 676 } else { 677 if(sc->sc_freeze_dev[xs->sc_link->target]) { 678 splx(s); 679 xs->error = XS_DRIVER_STUFFUP; 680 return (TRY_AGAIN_LATER); 681 } 682 683 /* Polled requests can't be queued for later. */ 684 dontqueue = xs->flags & SCSI_POLL; 685 686 /* 687 * If there are jobs in the queue, run them first. 688 */ 689 if (sc->sc_queue.lh_first != NULL) { 690 /* 691 * If we can't queue, we have to abort, since 692 * we have to preserve order. 693 */ 694 if (dontqueue) { 695 splx(s); 696 xs->error = XS_DRIVER_STUFFUP; 697 return (TRY_AGAIN_LATER); 698 } 699 /* 700 * Swap with the first queue entry. 701 */ 702 adw_enqueue(sc, xs, 0); 703 xs = adw_dequeue(sc); 704 fromqueue = 1; 705 } 706 } 707 708 709 /* 710 * get a ccb to use. If the transfer 711 * is from a buf (possibly from interrupt time) 712 * then we can't allow it to sleep 713 */ 714 715 flags = xs->flags; 716 if (nowait) 717 flags |= SCSI_NOSLEEP; 718 if ((ccb = adw_get_ccb(sc, flags)) == NULL) { 719 /* 720 * If we can't queue, we lose. 721 */ 722 if (dontqueue) { 723 splx(s); 724 xs->error = XS_DRIVER_STUFFUP; 725 return (TRY_AGAIN_LATER); 726 } 727 /* 728 * Stuff ourselves into the queue, in front 729 * if we came off in the first place. 730 */ 731 adw_enqueue(sc, xs, fromqueue); 732 splx(s); 733 return (SUCCESSFULLY_QUEUED); 734 } 735 splx(s); /* done playing with the queue */ 736 737 ccb->xs = xs; 738 ccb->timeout = xs->timeout; 739 740 if (adw_build_req(xs, ccb, flags)) { 741 retryagain: 742 s = splbio(); 743 retry = adw_queue_ccb(sc, ccb, retry); 744 splx(s); 745 746 switch(retry) { 747 case ADW_BUSY: 748 goto retryagain; 749 750 case ADW_ERROR: 751 xs->error = XS_DRIVER_STUFFUP; 752 return (COMPLETE); 753 } 754 755 /* 756 * Usually return SUCCESSFULLY QUEUED 757 */ 758 if ((xs->flags & SCSI_POLL) == 0) 759 return (SUCCESSFULLY_QUEUED); 760 761 /* 762 * If we can't use interrupts, poll on completion 763 */ 764 if (adw_poll(sc, xs, ccb->timeout)) { 765 adw_timeout(ccb); 766 if (adw_poll(sc, xs, ccb->timeout)) 767 adw_timeout(ccb); 768 } 769 } 770 return (COMPLETE); 771 } 772 773 774 /* 775 * Build a request structure for the Wide Boards. 776 */ 777 int 778 adw_build_req(xs, ccb, flags) 779 struct scsi_xfer *xs; 780 ADW_CCB *ccb; 781 int flags; 782 { 783 struct scsi_link *sc_link = xs->sc_link; 784 ADW_SOFTC *sc = sc_link->adapter_softc; 785 bus_dma_tag_t dmat = sc->sc_dmat; 786 ADW_SCSI_REQ_Q *scsiqp; 787 int error; 788 789 scsiqp = &ccb->scsiq; 790 bzero(scsiqp, sizeof(ADW_SCSI_REQ_Q)); 791 792 /* 793 * Set the ADW_SCSI_REQ_Q 'ccb_ptr' to point to the 794 * physical CCB structure. 795 */ 796 scsiqp->ccb_ptr = ccb->hashkey; 797 798 /* 799 * Build the ADW_SCSI_REQ_Q request. 800 */ 801 802 /* 803 * Set CDB length and copy it to the request structure. 804 * For wide boards a CDB length maximum of 16 bytes 805 * is supported. 806 */ 807 bcopy(xs->cmd, &scsiqp->cdb, ((scsiqp->cdb_len = xs->cmdlen) <= 12)? 808 xs->cmdlen : 12 ); 809 if(xs->cmdlen > 12) 810 bcopy(&(xs->cmd[12]), &scsiqp->cdb16, xs->cmdlen - 12); 811 812 scsiqp->target_id = sc_link->target; 813 scsiqp->target_lun = sc_link->lun; 814 815 scsiqp->vsense_addr = &ccb->scsi_sense; 816 scsiqp->sense_addr = sc->sc_dmamap_control->dm_segs[0].ds_addr + 817 ADW_CCB_OFF(ccb) + offsetof(struct adw_ccb, scsi_sense); 818 scsiqp->sense_len = sizeof(struct scsi_sense_data); 819 820 /* 821 * Build ADW_SCSI_REQ_Q for a scatter-gather buffer command. 822 */ 823 if (xs->datalen) { 824 /* 825 * Map the DMA transfer. 826 */ 827 #ifdef TFS 828 if (xs->flags & SCSI_DATA_UIO) { 829 error = bus_dmamap_load_uio(dmat, 830 ccb->dmamap_xfer, (struct uio *) xs->data, 831 (flags & SCSI_NOSLEEP) ? 832 BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 833 } else 834 #endif /* TFS */ 835 { 836 error = bus_dmamap_load(dmat, 837 ccb->dmamap_xfer, xs->data, xs->datalen, NULL, 838 (flags & SCSI_NOSLEEP) ? 839 BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 840 } 841 842 if (error) { 843 if (error == EFBIG) { 844 printf("%s: adw_scsi_cmd, more than %d dma" 845 " segments\n", 846 sc->sc_dev.dv_xname, ADW_MAX_SG_LIST); 847 } else { 848 printf("%s: adw_scsi_cmd, error %d loading" 849 " dma map\n", 850 sc->sc_dev.dv_xname, error); 851 } 852 853 xs->error = XS_DRIVER_STUFFUP; 854 adw_free_ccb(sc, ccb); 855 return (0); 856 } 857 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 858 (xs->flags & SCSI_DATA_IN) ? 859 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 860 861 /* 862 * Build scatter-gather list. 863 */ 864 scsiqp->data_cnt = xs->datalen; 865 scsiqp->vdata_addr = xs->data; 866 scsiqp->data_addr = ccb->dmamap_xfer->dm_segs[0].ds_addr; 867 bzero(ccb->sg_block, sizeof(ADW_SG_BLOCK) * ADW_NUM_SG_BLOCK); 868 adw_build_sglist(ccb, scsiqp, ccb->sg_block); 869 } else { 870 /* 871 * No data xfer, use non S/G values. 872 */ 873 scsiqp->data_cnt = 0; 874 scsiqp->vdata_addr = 0; 875 scsiqp->data_addr = 0; 876 } 877 878 return (1); 879 } 880 881 882 /* 883 * Build scatter-gather list for Wide Boards. 884 */ 885 void 886 adw_build_sglist(ccb, scsiqp, sg_block) 887 ADW_CCB *ccb; 888 ADW_SCSI_REQ_Q *scsiqp; 889 ADW_SG_BLOCK *sg_block; 890 { 891 u_long sg_block_next_addr; /* block and its next */ 892 u_int32_t sg_block_physical_addr; 893 int i; /* how many SG entries */ 894 bus_dma_segment_t *sg_list = &ccb->dmamap_xfer->dm_segs[0]; 895 int sg_elem_cnt = ccb->dmamap_xfer->dm_nsegs; 896 897 898 sg_block_next_addr = (u_long) sg_block; /* allow math operation */ 899 sg_block_physical_addr = ccb->hashkey + 900 offsetof(struct adw_ccb, sg_block[0]); 901 scsiqp->sg_real_addr = sg_block_physical_addr; 902 903 /* 904 * If there are more than NO_OF_SG_PER_BLOCK dma segments (hw sg-list) 905 * then split the request into multiple sg-list blocks. 906 */ 907 908 do { 909 for (i = 0; i < NO_OF_SG_PER_BLOCK; i++) { 910 sg_block->sg_list[i].sg_addr = sg_list->ds_addr; 911 sg_block->sg_list[i].sg_count = sg_list->ds_len; 912 913 if (--sg_elem_cnt == 0) { 914 /* last entry, get out */ 915 sg_block->sg_cnt = i + 1; 916 sg_block->sg_ptr = NULL; /* next link = NULL */ 917 return; 918 } 919 sg_list++; 920 } 921 sg_block_next_addr += sizeof(ADW_SG_BLOCK); 922 sg_block_physical_addr += sizeof(ADW_SG_BLOCK); 923 924 sg_block->sg_cnt = NO_OF_SG_PER_BLOCK; 925 sg_block->sg_ptr = sg_block_physical_addr; 926 sg_block = (ADW_SG_BLOCK *) sg_block_next_addr; /* virt. addr */ 927 } while (1); 928 } 929 930 931 /******************************************************************************/ 932 /* Interrupts and TimeOut routines */ 933 /******************************************************************************/ 934 935 936 int 937 adw_intr(arg) 938 void *arg; 939 { 940 ADW_SOFTC *sc = arg; 941 struct scsi_xfer *xs; 942 943 944 if(AdwISR(sc) != ADW_FALSE) { 945 /* 946 * If there are queue entries in the software queue, try to 947 * run the first one. We should be more or less guaranteed 948 * to succeed, since we just freed a CCB. 949 * 950 * NOTE: adw_scsi_cmd() relies on our calling it with 951 * the first entry in the queue. 952 */ 953 if ((xs = sc->sc_queue.lh_first) != NULL) 954 (void) adw_scsi_cmd(xs); 955 956 return (1); 957 } 958 959 return (0); 960 } 961 962 963 /* 964 * Poll a particular unit, looking for a particular xs 965 */ 966 int 967 adw_poll(sc, xs, count) 968 ADW_SOFTC *sc; 969 struct scsi_xfer *xs; 970 int count; 971 { 972 973 /* timeouts are in msec, so we loop in 1000 usec cycles */ 974 while (count > 0) { 975 adw_intr(sc); 976 if (xs->flags & ITSDONE) { 977 if ((xs->cmd->opcode == INQUIRY) 978 && (xs->sc_link->lun == 0) 979 && (xs->error == XS_NOERROR)) 980 adw_print_info(sc, xs->sc_link->target); 981 return (0); 982 } 983 delay(1000); /* only happens in boot so ok */ 984 count--; 985 } 986 return (1); 987 } 988 989 990 void 991 adw_timeout(arg) 992 void *arg; 993 { 994 ADW_CCB *ccb = arg; 995 struct scsi_xfer *xs = ccb->xs; 996 struct scsi_link *sc_link = xs->sc_link; 997 ADW_SOFTC *sc = sc_link->adapter_softc; 998 int s; 999 1000 sc_print_addr(sc_link); 1001 printf("timed out"); 1002 1003 s = splbio(); 1004 1005 if (ccb->flags & CCB_ABORTED) { 1006 /* 1007 * Abort Timed Out 1008 * 1009 * No more opportunities. Lets try resetting the bus and 1010 * reinitialize the host adapter. 1011 */ 1012 timeout_del(&xs->stimeout); 1013 printf(" AGAIN. Resetting SCSI Bus\n"); 1014 adw_reset_bus(sc); 1015 splx(s); 1016 return; 1017 } else if (ccb->flags & CCB_ABORTING) { 1018 /* 1019 * Abort the operation that has timed out. 1020 * 1021 * Second opportunity. 1022 */ 1023 printf("\n"); 1024 xs->error = XS_TIMEOUT; 1025 ccb->flags |= CCB_ABORTED; 1026 #if 0 1027 /* 1028 * - XXX - 3.3a microcode is BROKEN!!! 1029 * 1030 * We cannot abort a CCB, so we can only hope the command 1031 * get completed before the next timeout, otherwise a 1032 * Bus Reset will arrive inexorably. 1033 */ 1034 /* 1035 * ADW_ABORT_CCB() makes the board to generate an interrupt 1036 * 1037 * - XXX - The above assertion MUST be verified (and this 1038 * code changed as well [callout_*()]), when the 1039 * ADW_ABORT_CCB will be working again 1040 */ 1041 ADW_ABORT_CCB(sc, ccb); 1042 #endif 1043 /* 1044 * waiting for multishot callout_reset() let's restart it 1045 * by hand so the next time a timeout event will occour 1046 * we will reset the bus. 1047 */ 1048 timeout_add(&xs->stimeout, (ccb->timeout * hz) / 1000); 1049 } else { 1050 /* 1051 * Abort the operation that has timed out. 1052 * 1053 * First opportunity. 1054 */ 1055 printf("\n"); 1056 xs->error = XS_TIMEOUT; 1057 ccb->flags |= CCB_ABORTING; 1058 #if 0 1059 /* 1060 * - XXX - 3.3a microcode is BROKEN!!! 1061 * 1062 * We cannot abort a CCB, so we can only hope the command 1063 * get completed before the next 2 timeout, otherwise a 1064 * Bus Reset will arrive inexorably. 1065 */ 1066 /* 1067 * ADW_ABORT_CCB() makes the board to generate an interrupt 1068 * 1069 * - XXX - The above assertion MUST be verified (and this 1070 * code changed as well [callout_*()]), when the 1071 * ADW_ABORT_CCB will be working again 1072 */ 1073 ADW_ABORT_CCB(sc, ccb); 1074 #endif 1075 /* 1076 * waiting for multishot callout_reset() let's restart it 1077 * by hand so to give a second opportunity to the command 1078 * which timed-out. 1079 */ 1080 timeout_add(&xs->stimeout, (ccb->timeout * hz) / 1000); 1081 } 1082 1083 splx(s); 1084 } 1085 1086 1087 void 1088 adw_reset_bus(sc) 1089 ADW_SOFTC *sc; 1090 { 1091 ADW_CCB *ccb; 1092 int s; 1093 1094 s = splbio(); 1095 AdwResetSCSIBus(sc); /* XXX - should check return value? */ 1096 while((ccb = TAILQ_LAST(&sc->sc_pending_ccb, 1097 adw_pending_ccb)) != NULL) { 1098 timeout_del(&ccb->xs->stimeout); 1099 TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain); 1100 TAILQ_INSERT_HEAD(&sc->sc_waiting_ccb, ccb, chain); 1101 } 1102 1103 bzero(sc->sc_freeze_dev, sizeof(sc->sc_freeze_dev)); 1104 adw_queue_ccb(sc, TAILQ_FIRST(&sc->sc_waiting_ccb), 1); 1105 1106 splx(s); 1107 } 1108 1109 1110 /******************************************************************************/ 1111 /* Host Adapter and Peripherals Information Routines */ 1112 /******************************************************************************/ 1113 1114 1115 void 1116 adw_print_info(sc, tid) 1117 ADW_SOFTC *sc; 1118 int tid; 1119 { 1120 bus_space_handle_t ioh = sc->sc_ioh; 1121 bus_space_tag_t iot = sc->sc_iot; 1122 u_int16_t hshk_cfg, able_mask, period = 0; 1123 1124 /* hshk/HSHK means 'handskake' */ 1125 1126 ADW_READ_WORD_LRAM(iot, ioh, 1127 ADW_MC_DEVICE_HSHK_CFG_TABLE + (2 * tid), hshk_cfg); 1128 1129 ADW_READ_WORD_LRAM(iot, ioh, ADW_MC_WDTR_ABLE, able_mask); 1130 if ((able_mask & ADW_TID_TO_TIDMASK(tid)) == 0) 1131 hshk_cfg &= ~HSHK_CFG_WIDE_XFR; 1132 1133 ADW_READ_WORD_LRAM(iot, ioh, ADW_MC_SDTR_ABLE, able_mask); 1134 if ((able_mask & ADW_TID_TO_TIDMASK(tid)) == 0) 1135 hshk_cfg &= ~HSHK_CFG_OFFSET; 1136 1137 printf("%s: target %d using %d bit ", sc->sc_dev.dv_xname, tid, 1138 (hshk_cfg & HSHK_CFG_WIDE_XFR) ? 16 : 8); 1139 1140 if ((hshk_cfg & HSHK_CFG_OFFSET) == 0) 1141 printf("async "); 1142 else { 1143 period = (hshk_cfg & 0x1f00) >> 8; 1144 switch (period) { 1145 case 0x11: 1146 printf("80.0 "); 1147 break; 1148 case 0x10: 1149 printf("40.0 "); 1150 break; 1151 default: 1152 period = (period * 25) + 50; 1153 printf("%d.%d ", 1000/period, ADW_TENTHS(1000, period)); 1154 break; 1155 } 1156 printf("MHz %d REQ/ACK offset ", hshk_cfg & HSHK_CFG_OFFSET); 1157 } 1158 1159 printf("xfers\n"); 1160 } 1161 1162 1163 /******************************************************************************/ 1164 /* WIDE boards Interrupt callbacks */ 1165 /******************************************************************************/ 1166 1167 1168 /* 1169 * adw_isr_callback() - Second Level Interrupt Handler called by AdwISR() 1170 * 1171 * Interrupt callback function for the Wide SCSI Adw Library. 1172 * 1173 * Notice: 1174 * Interrupts are disabled by the caller (AdwISR() function), and will be 1175 * enabled at the end of the caller. 1176 */ 1177 void 1178 adw_isr_callback(sc, scsiq) 1179 ADW_SOFTC *sc; 1180 ADW_SCSI_REQ_Q *scsiq; 1181 { 1182 bus_dma_tag_t dmat; 1183 ADW_CCB *ccb; 1184 struct scsi_xfer *xs; 1185 struct scsi_sense_data *s1, *s2; 1186 1187 1188 ccb = adw_ccb_phys_kv(sc, scsiq->ccb_ptr); 1189 TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain); 1190 1191 if ((ccb->flags & CCB_ALLOC) == 0) { 1192 printf("%s: unallocated ccb found on pending list!\n", 1193 sc->sc_dev.dv_xname); 1194 Debugger(); 1195 adw_free_ccb(sc, ccb); 1196 return; 1197 } 1198 1199 xs = ccb->xs; 1200 timeout_del(&xs->stimeout); 1201 1202 /* 1203 * If we were a data transfer, unload the map that described 1204 * the data buffer. 1205 */ 1206 dmat = sc->sc_dmat; 1207 if (xs->datalen) { 1208 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 1209 (xs->flags & SCSI_DATA_IN) ? 1210 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1211 bus_dmamap_unload(dmat, ccb->dmamap_xfer); 1212 } 1213 1214 /* 1215 * 'done_status' contains the command's ending status. 1216 * 'host_status' conatins the host adapter status. 1217 * 'scsi_status' contains the scsi peripheral status. 1218 */ 1219 1220 sc->sc_freeze_dev[scsiq->target_id] = 0; 1221 xs->status = scsiq->scsi_status; 1222 1223 switch (scsiq->done_status) { 1224 case QD_NO_ERROR: /* (scsi_status == 0) && (host_status == 0) */ 1225 NO_ERROR: 1226 xs->resid = scsiq->data_cnt; 1227 xs->error = XS_NOERROR; 1228 break; 1229 1230 case QD_WITH_ERROR: 1231 switch (scsiq->host_status) { 1232 case QHSTA_NO_ERROR: 1233 switch (scsiq->scsi_status) { 1234 case SCSI_STATUS_CONDITION_MET: 1235 case SCSI_STATUS_INTERMID: 1236 case SCSI_STATUS_INTERMID_COND_MET: 1237 /* 1238 * These non-zero status values are 1239 * not really error conditions. 1240 * 1241 * XXX - would it be too paranoid to 1242 * add SCSI_STATUS_GOOD here in 1243 * case the docs are wrong re 1244 * QD_NO_ERROR? 1245 */ 1246 goto NO_ERROR; 1247 1248 case SCSI_STATUS_CHECK_CONDITION: 1249 case SCSI_STATUS_CMD_TERMINATED: 1250 case SCSI_STATUS_ACA_ACTIVE: 1251 s1 = &ccb->scsi_sense; 1252 s2 = &xs->sense; 1253 *s2 = *s1; 1254 xs->error = XS_SENSE; 1255 break; 1256 1257 case SCSI_STATUS_TARGET_BUSY: 1258 case SCSI_STATUS_QUEUE_FULL: 1259 case SCSI_STATUS_RSERV_CONFLICT: 1260 sc->sc_freeze_dev[scsiq->target_id] = 1; 1261 xs->error = XS_BUSY; 1262 break; 1263 1264 default: /* scsiq->scsi_status value */ 1265 printf("%s: bad scsi_status: 0x%02x.\n" 1266 ,sc->sc_dev.dv_xname 1267 ,scsiq->scsi_status); 1268 xs->error = XS_DRIVER_STUFFUP; 1269 break; 1270 } 1271 break; 1272 1273 case QHSTA_M_SEL_TIMEOUT: 1274 xs->error = XS_SELTIMEOUT; 1275 break; 1276 1277 case QHSTA_M_DIRECTION_ERR: 1278 case QHSTA_M_SXFR_OFF_UFLW: 1279 case QHSTA_M_SXFR_OFF_OFLW: 1280 case QHSTA_M_SXFR_XFR_OFLW: 1281 case QHSTA_M_QUEUE_ABORTED: 1282 case QHSTA_M_INVALID_DEVICE: 1283 case QHSTA_M_SGBACKUP_ERROR: 1284 case QHSTA_M_SXFR_DESELECTED: 1285 case QHSTA_M_SXFR_XFR_PH_ERR: 1286 case QHSTA_M_BUS_DEVICE_RESET: 1287 case QHSTA_M_NO_AUTO_REQ_SENSE: 1288 case QHSTA_M_BAD_CMPL_STATUS_IN: 1289 case QHSTA_M_SXFR_UNKNOWN_ERROR: 1290 case QHSTA_M_AUTO_REQ_SENSE_FAIL: 1291 case QHSTA_M_UNEXPECTED_BUS_FREE: 1292 printf("%s: host adapter error 0x%02x." 1293 " See adw(4).\n" 1294 ,sc->sc_dev.dv_xname, scsiq->host_status); 1295 xs->error = XS_DRIVER_STUFFUP; 1296 break; 1297 1298 case QHSTA_M_RDMA_PERR: 1299 case QHSTA_M_SXFR_WD_TMO: 1300 case QHSTA_M_WTM_TIMEOUT: 1301 case QHSTA_M_FROZEN_TIDQ: 1302 case QHSTA_M_SXFR_SDMA_ERR: 1303 case QHSTA_M_SXFR_SXFR_PERR: 1304 case QHSTA_M_SCSI_BUS_RESET: 1305 case QHSTA_M_DIRECTION_ERR_HUNG: 1306 case QHSTA_M_SCSI_BUS_RESET_UNSOL: 1307 /* 1308 * XXX - are all these cases really asking 1309 * for a card reset? _BUS_RESET and 1310 * _BUS_RESET_UNSOL added just to make 1311 * sure the pending queue is cleared out 1312 * in case card has lost track of them. 1313 */ 1314 printf("%s: host adapter error 0x%02x," 1315 " resetting bus. See adw(4).\n" 1316 ,sc->sc_dev.dv_xname, scsiq->host_status); 1317 adw_reset_bus(sc); 1318 xs->error = XS_RESET; 1319 break; 1320 1321 default: /* scsiq->host_status value */ 1322 /* 1323 * XXX - is a panic really appropriate here? If 1324 * not, would it be better to make the 1325 * XS_DRIVER_STUFFUP case above the 1326 * default behaviour? Or XS_RESET? 1327 */ 1328 panic("%s: bad host_status: 0x%02x" 1329 ,sc->sc_dev.dv_xname, scsiq->host_status); 1330 break; 1331 } 1332 break; 1333 1334 case QD_ABORTED_BY_HOST: 1335 xs->error = XS_DRIVER_STUFFUP; 1336 break; 1337 1338 default: /* scsiq->done_status value */ 1339 /* 1340 * XXX - would QD_NO_STATUS really mean the I/O is not 1341 * done? and would that mean it should somehow be 1342 * put back as a pending I/O? 1343 */ 1344 printf("%s: bad done_status: 0x%02x" 1345 " (host_status: 0x%02x, scsi_status: 0x%02x)\n" 1346 ,sc->sc_dev.dv_xname 1347 ,scsiq->done_status 1348 ,scsiq->host_status 1349 ,scsiq->scsi_status); 1350 xs->error = XS_DRIVER_STUFFUP; 1351 break; 1352 } 1353 1354 adw_free_ccb(sc, ccb); 1355 1356 xs->flags |= ITSDONE; 1357 scsi_done(xs); 1358 } 1359 1360 1361 /* 1362 * adw_async_callback() - Adw Library asynchronous event callback function. 1363 */ 1364 void 1365 adw_async_callback(sc, code) 1366 ADW_SOFTC *sc; 1367 u_int8_t code; 1368 { 1369 switch (code) { 1370 case ADW_ASYNC_SCSI_BUS_RESET_DET: 1371 /* The firmware detected a SCSI Bus reset. */ 1372 printf("%s: SCSI Bus reset detected\n", sc->sc_dev.dv_xname); 1373 break; 1374 1375 case ADW_ASYNC_RDMA_FAILURE: 1376 /* 1377 * Handle RDMA failure by resetting the SCSI Bus and 1378 * possibly the chip if it is unresponsive. 1379 */ 1380 printf("%s: RDMA failure. Resetting the SCSI Bus and" 1381 " the adapter\n", sc->sc_dev.dv_xname); 1382 adw_reset_bus(sc); 1383 break; 1384 1385 case ADW_HOST_SCSI_BUS_RESET: 1386 /* Host generated SCSI bus reset occurred. */ 1387 printf("%s: Host generated SCSI bus reset occurred\n", 1388 sc->sc_dev.dv_xname); 1389 break; 1390 1391 1392 case ADW_ASYNC_CARRIER_READY_FAILURE: 1393 /* 1394 * Carrier Ready failure. 1395 * 1396 * A warning only - RISC too busy to realize it's been 1397 * tickled. Occurs in normal operation under heavy 1398 * load, so a message is printed only when ADW_DEBUG'ing 1399 */ 1400 #ifdef ADW_DEBUG 1401 printf("%s: Carrier Ready failure!\n", sc->sc_dev.dv_xname); 1402 #endif 1403 break; 1404 1405 default: 1406 printf("%s: Unknown Async callback code (ignored): 0x%02x\n" 1407 ,sc->sc_dev.dv_xname ); 1408 break; 1409 } 1410 } 1411