1 /* $OpenBSD: adv.c,v 1.42 2020/02/15 18:02:00 krw Exp $ */ 2 /* $NetBSD: adv.c,v 1.6 1998/10/28 20:39:45 dante Exp $ */ 3 4 /* 5 * Generic driver for the Advanced Systems Inc. Narrow SCSI controllers 6 * 7 * Copyright (c) 1998 The NetBSD Foundation, Inc. 8 * All rights reserved. 9 * 10 * Author: Baldassare Dante Profeta <dante@mclink.it> 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/errno.h> 38 #include <sys/ioctl.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 #include <sys/buf.h> 42 43 #include <machine/bus.h> 44 #include <machine/intr.h> 45 46 #include <scsi/scsi_all.h> 47 #include <scsi/scsiconf.h> 48 49 #include <dev/ic/adv.h> 50 #include <dev/ic/advlib.h> 51 52 /* #define ASC_DEBUG */ 53 54 /******************************************************************************/ 55 56 57 static int adv_alloc_ccbs(ASC_SOFTC *); 58 static int adv_create_ccbs(ASC_SOFTC *, ADV_CCB *, int); 59 void adv_ccb_free(void *, void *); 60 static void adv_reset_ccb(ADV_CCB *); 61 static int adv_init_ccb(ASC_SOFTC *, ADV_CCB *); 62 void *adv_ccb_alloc(void *); 63 static void adv_queue_ccb(ASC_SOFTC *, ADV_CCB *); 64 static void adv_start_ccbs(ASC_SOFTC *); 65 66 static u_int8_t *adv_alloc_overrunbuf(char *dvname, bus_dma_tag_t); 67 68 static void adv_scsi_cmd(struct scsi_xfer *); 69 static void adv_narrow_isr_callback(ASC_SOFTC *, ASC_QDONE_INFO *); 70 71 static int adv_poll(ASC_SOFTC *, struct scsi_xfer *, int); 72 static void adv_timeout(void *); 73 static void adv_watchdog(void *); 74 75 76 /******************************************************************************/ 77 78 79 struct cfdriver adv_cd = { 80 NULL, "adv", DV_DULL 81 }; 82 83 84 struct scsi_adapter adv_switch = { 85 adv_scsi_cmd, NULL, NULL, NULL, NULL 86 }; 87 88 89 #define ADV_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */ 90 #define ADV_WATCH_TIMEOUT 1000 /* time to wait for watchdog (mSec) */ 91 92 93 /******************************************************************************/ 94 /* Control Blocks routines */ 95 /******************************************************************************/ 96 97 98 static int 99 adv_alloc_ccbs(sc) 100 ASC_SOFTC *sc; 101 { 102 bus_dma_segment_t seg; 103 int error, rseg; 104 105 /* 106 * Allocate the control blocks. 107 */ 108 if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct adv_control), 109 NBPG, 0, &seg, 1, &rseg, 110 BUS_DMA_NOWAIT | BUS_DMA_ZERO)) != 0) { 111 printf("%s: unable to allocate control structures," 112 " error = %d\n", sc->sc_dev.dv_xname, error); 113 return (error); 114 } 115 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 116 sizeof(struct adv_control), (caddr_t *) & sc->sc_control, 117 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 118 printf("%s: unable to map control structures, error = %d\n", 119 sc->sc_dev.dv_xname, error); 120 return (error); 121 } 122 /* 123 * Create and load the DMA map used for the control blocks. 124 */ 125 if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct adv_control), 126 1, sizeof(struct adv_control), 0, BUS_DMA_NOWAIT, 127 &sc->sc_dmamap_control)) != 0) { 128 printf("%s: unable to create control DMA map, error = %d\n", 129 sc->sc_dev.dv_xname, error); 130 return (error); 131 } 132 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control, 133 sc->sc_control, sizeof(struct adv_control), NULL, 134 BUS_DMA_NOWAIT)) != 0) { 135 printf("%s: unable to load control DMA map, error = %d\n", 136 sc->sc_dev.dv_xname, error); 137 return (error); 138 } 139 return (0); 140 } 141 142 143 /* 144 * Create a set of ccbs and add them to the free list. Called once 145 * by adv_init(). We return the number of CCBs successfully created. 146 * CCB data is already zeroed on allocation. 147 */ 148 static int 149 adv_create_ccbs(sc, ccbstore, count) 150 ASC_SOFTC *sc; 151 ADV_CCB *ccbstore; 152 int count; 153 { 154 ADV_CCB *ccb; 155 int i, error; 156 157 for (i = 0; i < count; i++) { 158 ccb = &ccbstore[i]; 159 if ((error = adv_init_ccb(sc, ccb)) != 0) { 160 printf("%s: unable to initialize ccb, error = %d\n", 161 sc->sc_dev.dv_xname, error); 162 return (i); 163 } 164 TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain); 165 } 166 167 return (i); 168 } 169 170 171 /* 172 * A ccb is put onto the free list. 173 */ 174 void 175 adv_ccb_free(xsc, xccb) 176 void *xsc, *xccb; 177 { 178 ASC_SOFTC *sc = xsc; 179 ADV_CCB *ccb = xccb; 180 181 adv_reset_ccb(ccb); 182 183 mtx_enter(&sc->sc_ccb_mtx); 184 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain); 185 mtx_leave(&sc->sc_ccb_mtx); 186 } 187 188 189 static void 190 adv_reset_ccb(ccb) 191 ADV_CCB *ccb; 192 { 193 194 ccb->flags = 0; 195 } 196 197 198 static int 199 adv_init_ccb(sc, ccb) 200 ASC_SOFTC *sc; 201 ADV_CCB *ccb; 202 { 203 int error; 204 205 /* 206 * Create the DMA map for this CCB. 207 */ 208 error = bus_dmamap_create(sc->sc_dmat, 209 (ASC_MAX_SG_LIST - 1) * PAGE_SIZE, 210 ASC_MAX_SG_LIST, (ASC_MAX_SG_LIST - 1) * PAGE_SIZE, 211 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->dmamap_xfer); 212 if (error) { 213 printf("%s: unable to create DMA map, error = %d\n", 214 sc->sc_dev.dv_xname, error); 215 return (error); 216 } 217 adv_reset_ccb(ccb); 218 return (0); 219 } 220 221 222 /* 223 * Get a free ccb 224 */ 225 void * 226 adv_ccb_alloc(xsc) 227 void *xsc; 228 { 229 ASC_SOFTC *sc = xsc; 230 ADV_CCB *ccb; 231 232 mtx_enter(&sc->sc_ccb_mtx); 233 ccb = TAILQ_FIRST(&sc->sc_free_ccb); 234 if (ccb) { 235 TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain); 236 ccb->flags |= CCB_ALLOC; 237 } 238 mtx_leave(&sc->sc_ccb_mtx); 239 240 return (ccb); 241 } 242 243 /* 244 * Queue a CCB to be sent to the controller, and send it if possible. 245 */ 246 static void 247 adv_queue_ccb(sc, ccb) 248 ASC_SOFTC *sc; 249 ADV_CCB *ccb; 250 { 251 252 timeout_set(&ccb->xs->stimeout, adv_timeout, ccb); 253 TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain); 254 255 adv_start_ccbs(sc); 256 } 257 258 259 static void 260 adv_start_ccbs(sc) 261 ASC_SOFTC *sc; 262 { 263 ADV_CCB *ccb; 264 struct scsi_xfer *xs; 265 266 while ((ccb = TAILQ_FIRST(&sc->sc_waiting_ccb)) != NULL) { 267 268 xs = ccb->xs; 269 if (ccb->flags & CCB_WATCHDOG) 270 timeout_del(&xs->stimeout); 271 272 if (AscExeScsiQueue(sc, &ccb->scsiq) == ASC_BUSY) { 273 ccb->flags |= CCB_WATCHDOG; 274 timeout_set(&xs->stimeout, adv_watchdog, ccb); 275 timeout_add_msec(&xs->stimeout, ADV_WATCH_TIMEOUT); 276 break; 277 } 278 TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain); 279 280 if ((ccb->xs->flags & SCSI_POLL) == 0) { 281 timeout_set(&xs->stimeout, adv_timeout, ccb); 282 timeout_add_msec(&xs->stimeout, ccb->timeout); 283 } 284 } 285 } 286 287 288 /******************************************************************************/ 289 /* DMA able memory allocation routines */ 290 /******************************************************************************/ 291 292 293 /* 294 * Allocate a DMA able memory for overrun_buffer. 295 * This memory can be safely shared among all the AdvanSys boards. 296 */ 297 u_int8_t * 298 adv_alloc_overrunbuf(dvname, dmat) 299 char *dvname; 300 bus_dma_tag_t dmat; 301 { 302 static u_int8_t *overrunbuf = NULL; 303 304 bus_dmamap_t ovrbuf_dmamap; 305 bus_dma_segment_t seg; 306 int rseg, error; 307 308 309 /* 310 * if an overrun buffer has been already allocated don't allocate it 311 * again. Instead return the address of the allocated buffer. 312 */ 313 if (overrunbuf) 314 return (overrunbuf); 315 316 317 if ((error = bus_dmamem_alloc(dmat, ASC_OVERRUN_BSIZE, 318 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 319 printf("%s: unable to allocate overrun buffer, error = %d\n", 320 dvname, error); 321 return (0); 322 } 323 if ((error = bus_dmamem_map(dmat, &seg, rseg, ASC_OVERRUN_BSIZE, 324 (caddr_t *) & overrunbuf, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 325 printf("%s: unable to map overrun buffer, error = %d\n", 326 dvname, error); 327 328 bus_dmamem_free(dmat, &seg, 1); 329 return (0); 330 } 331 if ((error = bus_dmamap_create(dmat, ASC_OVERRUN_BSIZE, 1, 332 ASC_OVERRUN_BSIZE, 0, BUS_DMA_NOWAIT, &ovrbuf_dmamap)) != 0) { 333 printf("%s: unable to create overrun buffer DMA map," 334 " error = %d\n", dvname, error); 335 336 bus_dmamem_unmap(dmat, overrunbuf, ASC_OVERRUN_BSIZE); 337 bus_dmamem_free(dmat, &seg, 1); 338 return (0); 339 } 340 if ((error = bus_dmamap_load(dmat, ovrbuf_dmamap, overrunbuf, 341 ASC_OVERRUN_BSIZE, NULL, BUS_DMA_NOWAIT)) != 0) { 342 printf("%s: unable to load overrun buffer DMA map," 343 " error = %d\n", dvname, error); 344 345 bus_dmamap_destroy(dmat, ovrbuf_dmamap); 346 bus_dmamem_unmap(dmat, overrunbuf, ASC_OVERRUN_BSIZE); 347 bus_dmamem_free(dmat, &seg, 1); 348 return (0); 349 } 350 return (overrunbuf); 351 } 352 353 354 /******************************************************************************/ 355 /* SCSI layer interfacing routines */ 356 /******************************************************************************/ 357 358 359 int 360 adv_init(sc) 361 ASC_SOFTC *sc; 362 { 363 int warn; 364 365 if (!AscFindSignature(sc->sc_iot, sc->sc_ioh)) 366 panic("adv_init: adv_find_signature failed"); 367 368 /* 369 * Read the board configuration 370 */ 371 AscInitASC_SOFTC(sc); 372 warn = AscInitFromEEP(sc); 373 if (warn) { 374 printf("%s -get: ", sc->sc_dev.dv_xname); 375 switch (warn) { 376 case -1: 377 printf("Chip is not halted\n"); 378 break; 379 380 case -2: 381 printf("Couldn't get MicroCode Start" 382 " address\n"); 383 break; 384 385 case ASC_WARN_IO_PORT_ROTATE: 386 printf("I/O port address modified\n"); 387 break; 388 389 case ASC_WARN_AUTO_CONFIG: 390 printf("I/O port increment switch enabled\n"); 391 break; 392 393 case ASC_WARN_EEPROM_CHKSUM: 394 printf("EEPROM checksum error\n"); 395 break; 396 397 case ASC_WARN_IRQ_MODIFIED: 398 printf("IRQ modified\n"); 399 break; 400 401 case ASC_WARN_CMD_QNG_CONFLICT: 402 printf("tag queuing enabled w/o disconnects\n"); 403 break; 404 405 default: 406 printf("unknown warning %d\n", warn); 407 } 408 } 409 if (sc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT) 410 sc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT; 411 412 /* 413 * Modify the board configuration 414 */ 415 warn = AscInitFromASC_SOFTC(sc); 416 if (warn) { 417 printf("%s -set: ", sc->sc_dev.dv_xname); 418 switch (warn) { 419 case ASC_WARN_CMD_QNG_CONFLICT: 420 printf("tag queuing enabled w/o disconnects\n"); 421 break; 422 423 case ASC_WARN_AUTO_CONFIG: 424 printf("I/O port increment switch enabled\n"); 425 break; 426 427 default: 428 printf("unknown warning %d\n", warn); 429 } 430 } 431 sc->isr_callback = (ulong) adv_narrow_isr_callback; 432 433 if (!(sc->overrun_buf = adv_alloc_overrunbuf(sc->sc_dev.dv_xname, 434 sc->sc_dmat))) { 435 return (1); 436 } 437 438 return (0); 439 } 440 441 442 void 443 adv_attach(sc) 444 ASC_SOFTC *sc; 445 { 446 struct scsibus_attach_args saa; 447 int i, error; 448 449 /* 450 * Initialize board RISC chip and enable interrupts. 451 */ 452 switch (AscInitDriver(sc)) { 453 case 0: 454 /* AllOK */ 455 break; 456 457 case 1: 458 panic("%s: bad signature", sc->sc_dev.dv_xname); 459 break; 460 461 case 2: 462 panic("%s: unable to load MicroCode", 463 sc->sc_dev.dv_xname); 464 break; 465 466 case 3: 467 panic("%s: unable to initialize MicroCode", 468 sc->sc_dev.dv_xname); 469 break; 470 471 default: 472 panic("%s: unable to initialize board RISC chip", 473 sc->sc_dev.dv_xname); 474 } 475 476 TAILQ_INIT(&sc->sc_free_ccb); 477 TAILQ_INIT(&sc->sc_waiting_ccb); 478 479 mtx_init(&sc->sc_ccb_mtx, IPL_BIO); 480 scsi_iopool_init(&sc->sc_iopool, sc, adv_ccb_alloc, adv_ccb_free); 481 482 /* 483 * fill in the prototype scsi_link. 484 */ 485 sc->sc_link.adapter_softc = sc; 486 sc->sc_link.adapter_target = sc->chip_scsi_id; 487 sc->sc_link.adapter = &adv_switch; 488 sc->sc_link.openings = 4; 489 sc->sc_link.pool = &sc->sc_iopool; 490 sc->sc_link.adapter_buswidth = 7; 491 492 /* 493 * Allocate the Control Blocks. 494 */ 495 error = adv_alloc_ccbs(sc); 496 if (error) 497 return; /* (error) */ ; 498 499 /* 500 * Create and initialize the Control Blocks. 501 */ 502 i = adv_create_ccbs(sc, sc->sc_control->ccbs, ADV_MAX_CCB); 503 if (i == 0) { 504 printf("%s: unable to create control blocks\n", 505 sc->sc_dev.dv_xname); 506 return; /* (ENOMEM) */ ; 507 } else if (i != ADV_MAX_CCB) { 508 printf("%s: WARNING: only %d of %d control blocks created\n", 509 sc->sc_dev.dv_xname, i, ADV_MAX_CCB); 510 } 511 512 bzero(&saa, sizeof(saa)); 513 saa.saa_sc_link = &sc->sc_link; 514 config_found(&sc->sc_dev, &saa, scsiprint); 515 } 516 517 518 /* 519 * start a scsi operation given the command and the data address. Also needs 520 * the unit, target and lu. 521 */ 522 static void 523 adv_scsi_cmd(xs) 524 struct scsi_xfer *xs; 525 { 526 struct scsi_link *sc_link = xs->sc_link; 527 ASC_SOFTC *sc = sc_link->adapter_softc; 528 bus_dma_tag_t dmat = sc->sc_dmat; 529 ADV_CCB *ccb; 530 int flags, error, nsegs; 531 532 /* 533 * get a ccb to use. If the transfer 534 * is from a buf (possibly from interrupt time) 535 * then we can't allow it to sleep 536 */ 537 538 flags = xs->flags; 539 ccb = xs->io; 540 541 ccb->xs = xs; 542 ccb->timeout = xs->timeout; 543 544 /* 545 * Build up the request 546 */ 547 memset(&ccb->scsiq, 0, sizeof(ASC_SCSI_Q)); 548 549 ccb->scsiq.q2.ccb_ptr = (ulong) ccb; 550 551 ccb->scsiq.cdbptr = &xs->cmd->opcode; 552 ccb->scsiq.q2.cdb_len = xs->cmdlen; 553 ccb->scsiq.q1.target_id = ASC_TID_TO_TARGET_ID(sc_link->target); 554 ccb->scsiq.q1.target_lun = sc_link->lun; 555 ccb->scsiq.q2.target_ix = ASC_TIDLUN_TO_IX(sc_link->target, 556 sc_link->lun); 557 ccb->scsiq.q1.sense_addr = sc->sc_dmamap_control->dm_segs[0].ds_addr + 558 ADV_CCB_OFF(ccb) + offsetof(struct adv_ccb, scsi_sense); 559 ccb->scsiq.q1.sense_len = sizeof(struct scsi_sense_data); 560 561 /* 562 * If there are any outstanding requests for the current target, 563 * then every 255th request send an ORDERED request. This heuristic 564 * tries to retain the benefit of request sorting while preventing 565 * request starvation. 255 is the max number of tags or pending commands 566 * a device may have outstanding. 567 */ 568 sc->reqcnt[sc_link->target]++; 569 if ((sc->reqcnt[sc_link->target] > 0) && 570 (sc->reqcnt[sc_link->target] % 255) == 0) { 571 ccb->scsiq.q2.tag_code = M2_QTAG_MSG_ORDERED; 572 } else { 573 ccb->scsiq.q2.tag_code = M2_QTAG_MSG_SIMPLE; 574 } 575 576 577 if (xs->datalen) { 578 /* 579 * Map the DMA transfer. 580 */ 581 error = bus_dmamap_load(dmat, 582 ccb->dmamap_xfer, xs->data, xs->datalen, NULL, 583 (flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK); 584 585 if (error) { 586 if (error == EFBIG) { 587 printf("%s: adv_scsi_cmd, more than %d dma" 588 " segments\n", 589 sc->sc_dev.dv_xname, ASC_MAX_SG_LIST); 590 } else { 591 printf("%s: adv_scsi_cmd, error %d loading" 592 " dma map\n", 593 sc->sc_dev.dv_xname, error); 594 } 595 596 xs->error = XS_DRIVER_STUFFUP; 597 scsi_done(xs); 598 return; 599 } 600 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 601 0, ccb->dmamap_xfer->dm_mapsize, 602 ((flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD : 603 BUS_DMASYNC_PREWRITE)); 604 605 606 memset(&ccb->sghead, 0, sizeof(ASC_SG_HEAD)); 607 608 for (nsegs = 0; nsegs < ccb->dmamap_xfer->dm_nsegs; nsegs++) { 609 610 ccb->sghead.sg_list[nsegs].addr = 611 ccb->dmamap_xfer->dm_segs[nsegs].ds_addr; 612 ccb->sghead.sg_list[nsegs].bytes = 613 ccb->dmamap_xfer->dm_segs[nsegs].ds_len; 614 } 615 616 ccb->sghead.entry_cnt = ccb->scsiq.q1.sg_queue_cnt = 617 ccb->dmamap_xfer->dm_nsegs; 618 619 ccb->scsiq.q1.cntl |= ASC_QC_SG_HEAD; 620 ccb->scsiq.sg_head = &ccb->sghead; 621 ccb->scsiq.q1.data_addr = 0; 622 ccb->scsiq.q1.data_cnt = 0; 623 } else { 624 /* 625 * No data xfer, use non S/G values. 626 */ 627 ccb->scsiq.q1.data_addr = 0; 628 ccb->scsiq.q1.data_cnt = 0; 629 } 630 631 #ifdef ASC_DEBUG 632 printf("id = %d, lun = %d, cmd = %d, ccb = 0x%lX \n", 633 sc_link->scsipi_scsi.target, 634 sc_link->scsipi_scsi.lun, xs->cmd->opcode, 635 (unsigned long)ccb); 636 #endif 637 /* 638 * Usually return SUCCESSFULLY QUEUED 639 */ 640 if ((flags & SCSI_POLL) == 0) 641 return; 642 643 /* 644 * If we can't use interrupts, poll on completion 645 */ 646 if (adv_poll(sc, xs, ccb->timeout)) { 647 adv_timeout(ccb); 648 if (adv_poll(sc, xs, ccb->timeout)) 649 adv_timeout(ccb); 650 } 651 } 652 653 654 int 655 adv_intr(arg) 656 void *arg; 657 { 658 ASC_SOFTC *sc = arg; 659 660 #ifdef ASC_DEBUG 661 int int_pend = FALSE; 662 663 if(ASC_IS_INT_PENDING(sc->sc_iot, sc->sc_ioh)) 664 { 665 int_pend = TRUE; 666 printf("ISR - "); 667 } 668 #endif 669 AscISR(sc); 670 #ifdef ASC_DEBUG 671 if(int_pend) 672 printf("\n"); 673 #endif 674 675 return (1); 676 } 677 678 679 /* 680 * Poll a particular unit, looking for a particular xs 681 */ 682 static int 683 adv_poll(sc, xs, count) 684 ASC_SOFTC *sc; 685 struct scsi_xfer *xs; 686 int count; 687 { 688 int s; 689 690 /* timeouts are in msec, so we loop in 1000 usec cycles */ 691 while (count) { 692 s = splbio(); 693 adv_intr(sc); 694 splx(s); 695 if (xs->flags & ITSDONE) 696 return (0); 697 delay(1000); /* only happens in boot so ok */ 698 count--; 699 } 700 return (1); 701 } 702 703 704 static void 705 adv_timeout(arg) 706 void *arg; 707 { 708 ADV_CCB *ccb = arg; 709 struct scsi_xfer *xs = ccb->xs; 710 struct scsi_link *sc_link = xs->sc_link; 711 ASC_SOFTC *sc = sc_link->adapter_softc; 712 int s; 713 714 sc_print_addr(sc_link); 715 printf("timed out"); 716 717 s = splbio(); 718 719 /* 720 * If it has been through before, then a previous abort has failed, 721 * don't try abort again, reset the bus instead. 722 */ 723 if (ccb->flags & CCB_ABORT) { 724 /* abort timed out */ 725 printf(" AGAIN. Resetting Bus\n"); 726 /* Lets try resetting the bus! */ 727 if (AscResetBus(sc) == ASC_ERROR) { 728 ccb->timeout = sc->scsi_reset_wait; 729 adv_queue_ccb(sc, ccb); 730 } 731 } else { 732 /* abort the operation that has timed out */ 733 printf("\n"); 734 AscAbortCCB(sc, (u_int32_t) ccb); 735 ccb->xs->error = XS_TIMEOUT; 736 ccb->timeout = ADV_ABORT_TIMEOUT; 737 ccb->flags |= CCB_ABORT; 738 adv_queue_ccb(sc, ccb); 739 } 740 741 splx(s); 742 } 743 744 745 static void 746 adv_watchdog(arg) 747 void *arg; 748 { 749 ADV_CCB *ccb = arg; 750 struct scsi_xfer *xs = ccb->xs; 751 struct scsi_link *sc_link = xs->sc_link; 752 ASC_SOFTC *sc = sc_link->adapter_softc; 753 int s; 754 755 s = splbio(); 756 757 ccb->flags &= ~CCB_WATCHDOG; 758 adv_start_ccbs(sc); 759 760 splx(s); 761 } 762 763 764 /******************************************************************************/ 765 /* NARROW and WIDE boards Interrupt callbacks */ 766 /******************************************************************************/ 767 768 769 /* 770 * adv_narrow_isr_callback() - Second Level Interrupt Handler called by AscISR() 771 * 772 * Interrupt callback function for the Narrow SCSI Asc Library. 773 */ 774 static void 775 adv_narrow_isr_callback(sc, qdonep) 776 ASC_SOFTC *sc; 777 ASC_QDONE_INFO *qdonep; 778 { 779 bus_dma_tag_t dmat = sc->sc_dmat; 780 ADV_CCB *ccb = (ADV_CCB *) qdonep->d2.ccb_ptr; 781 struct scsi_xfer *xs = ccb->xs; 782 struct scsi_sense_data *s1, *s2; 783 784 785 #ifdef ASC_DEBUG 786 printf(" - ccb=0x%lx, id=%d, lun=%d, cmd=%d, ", 787 (unsigned long)ccb, 788 xs->sc_link->scsipi_scsi.target, 789 xs->sc_link->scsipi_scsi.lun, xs->cmd->opcode); 790 #endif 791 timeout_del(&xs->stimeout); 792 793 /* 794 * If we were a data transfer, unload the map that described 795 * the data buffer. 796 */ 797 if (xs->datalen) { 798 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 799 0, ccb->dmamap_xfer->dm_mapsize, 800 ((xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_POSTREAD : 801 BUS_DMASYNC_POSTWRITE)); 802 bus_dmamap_unload(dmat, ccb->dmamap_xfer); 803 } 804 if ((ccb->flags & CCB_ALLOC) == 0) { 805 panic("%s: exiting ccb not allocated!", sc->sc_dev.dv_xname); 806 return; 807 } 808 /* 809 * 'qdonep' contains the command's ending status. 810 */ 811 #ifdef ASC_DEBUG 812 printf("d_s=%d, h_s=%d", qdonep->d3.done_stat, qdonep->d3.host_stat); 813 #endif 814 switch (qdonep->d3.done_stat) { 815 case ASC_QD_NO_ERROR: 816 switch (qdonep->d3.host_stat) { 817 case ASC_QHSTA_NO_ERROR: 818 xs->error = XS_NOERROR; 819 xs->resid = 0; 820 break; 821 822 default: 823 /* QHSTA error occurred */ 824 xs->error = XS_DRIVER_STUFFUP; 825 break; 826 } 827 828 /* 829 * If an INQUIRY command completed successfully, then call 830 * the AscInquiryHandling() function to patch bugged boards. 831 */ 832 if ((xs->cmd->opcode == SCSICMD_Inquiry) && 833 (xs->sc_link->lun == 0) && 834 (xs->datalen - qdonep->remain_bytes) >= 8) { 835 AscInquiryHandling(sc, 836 xs->sc_link->target & 0x7, 837 (ASC_SCSI_INQUIRY *) xs->data); 838 } 839 break; 840 841 case ASC_QD_WITH_ERROR: 842 switch (qdonep->d3.host_stat) { 843 case ASC_QHSTA_NO_ERROR: 844 if (qdonep->d3.scsi_stat == SS_CHK_CONDITION) { 845 s1 = &ccb->scsi_sense; 846 s2 = &xs->sense; 847 *s2 = *s1; 848 xs->error = XS_SENSE; 849 } else { 850 xs->error = XS_DRIVER_STUFFUP; 851 } 852 break; 853 854 default: 855 /* QHSTA error occurred */ 856 xs->error = XS_DRIVER_STUFFUP; 857 break; 858 } 859 break; 860 861 case ASC_QD_ABORTED_BY_HOST: 862 default: 863 xs->error = XS_DRIVER_STUFFUP; 864 break; 865 } 866 867 scsi_done(xs); 868 } 869