xref: /openbsd-src/sys/dev/i2c/pcf85063.c (revision c1a45aed656e7d5627c30c92421893a76f370ccb)
1 /*	$OpenBSD: pcf85063.c,v 1.2 2022/04/06 18:59:28 naddy Exp $	*/
2 
3 /*
4  * Copyright (c) 2005 Kimihiro Nonaka
5  * Copyright (c) 2016, 2021 Mark Kettenis
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
21  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  * POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/device.h>
33 
34 #include <dev/clock_subr.h>
35 
36 #include <dev/i2c/i2cvar.h>
37 
38 /*
39  * PCF85063A/TP Real-Time Clock
40  */
41 
42 #define PCF85063_CONTROL1	0x00
43 #define PCF85063_SECONDS	0x04
44 #define PCF85063_MINUTES	0x05
45 #define PCF85063_HOURS		0x06
46 #define PCF85063_DAY		0x07
47 #define PCF85063_WDAY		0x08
48 #define PCF85063_MONTH		0x09
49 #define PCF85063_YEAR		0x0a
50 
51 #define	PCF85063_NRTC_REGS	7
52 
53 /*
54  * Bit definitions.
55  */
56 #define	PCF85063_CONTROL1_12_24	(1 << 1)
57 #define	PCF85063_CONTROL1_STOP	(1 << 5)
58 #define	PCF85063_SECONDS_MASK	0x7f
59 #define	PCF85063_SECONDS_OS	(1 << 7)
60 #define	PCF85063_MINUTES_MASK	0x7f
61 #define	PCF85063_HOURS_12HRS_PM	(1 << 5)	/* If 12 hr mode, set = PM */
62 #define	PCF85063_HOURS_12MASK	0x1f
63 #define	PCF85063_HOURS_24MASK	0x3f
64 #define	PCF85063_DAY_MASK	0x3f
65 #define	PCF85063_WDAY_MASK	0x07
66 #define	PCF85063_MONTH_MASK	0x1f
67 
68 struct pcyrtc_softc {
69 	struct device sc_dev;
70 	i2c_tag_t sc_tag;
71 	int sc_address;
72 	struct todr_chip_handle sc_todr;
73 };
74 
75 int pcyrtc_match(struct device *, void *, void *);
76 void pcyrtc_attach(struct device *, struct device *, void *);
77 
78 const struct cfattach pcyrtc_ca = {
79 	sizeof(struct pcyrtc_softc), pcyrtc_match, pcyrtc_attach
80 };
81 
82 struct cfdriver pcyrtc_cd = {
83 	NULL, "pcyrtc", DV_DULL
84 };
85 
86 uint8_t pcyrtc_reg_read(struct pcyrtc_softc *, int);
87 void pcyrtc_reg_write(struct pcyrtc_softc *, int, uint8_t);
88 int pcyrtc_clock_read(struct pcyrtc_softc *, struct clock_ymdhms *);
89 int pcyrtc_clock_write(struct pcyrtc_softc *, struct clock_ymdhms *);
90 int pcyrtc_gettime(struct todr_chip_handle *, struct timeval *);
91 int pcyrtc_settime(struct todr_chip_handle *, struct timeval *);
92 
93 int
94 pcyrtc_match(struct device *parent, void *v, void *arg)
95 {
96 	struct i2c_attach_args *ia = arg;
97 
98 	if (strcmp(ia->ia_name, "nxp,pcf85063a") == 0)
99 		return (1);
100 
101 	return (0);
102 }
103 
104 void
105 pcyrtc_attach(struct device *parent, struct device *self, void *arg)
106 {
107 	struct pcyrtc_softc *sc = (struct pcyrtc_softc *)self;
108 	struct i2c_attach_args *ia = arg;
109 	uint8_t reg;
110 
111 	sc->sc_tag = ia->ia_tag;
112 	sc->sc_address = ia->ia_addr;
113 	sc->sc_todr.cookie = sc;
114 	sc->sc_todr.todr_gettime = pcyrtc_gettime;
115 	sc->sc_todr.todr_settime = pcyrtc_settime;
116 	todr_attach(&sc->sc_todr);
117 
118 	/*
119 	 * Switch to 24 hour mode.
120 	 */
121 	reg = pcyrtc_reg_read(sc, PCF85063_CONTROL1);
122 	reg &= ~PCF85063_CONTROL1_12_24;
123 	reg &= ~PCF85063_CONTROL1_STOP;
124 	pcyrtc_reg_write(sc, PCF85063_CONTROL1, reg);
125 
126 	printf("\n");
127 }
128 
129 int
130 pcyrtc_gettime(struct todr_chip_handle *ch, struct timeval *tv)
131 {
132 	struct pcyrtc_softc *sc = ch->cookie;
133 	struct clock_ymdhms dt;
134 
135 	memset(&dt, 0, sizeof(dt));
136 	if (pcyrtc_clock_read(sc, &dt) == 0)
137 		return (-1);
138 
139 	tv->tv_sec = clock_ymdhms_to_secs(&dt);
140 	tv->tv_usec = 0;
141 	return (0);
142 }
143 
144 int
145 pcyrtc_settime(struct todr_chip_handle *ch, struct timeval *tv)
146 {
147 	struct pcyrtc_softc *sc = ch->cookie;
148 	struct clock_ymdhms dt;
149 	uint8_t reg;
150 
151 	clock_secs_to_ymdhms(tv->tv_sec, &dt);
152 	if (pcyrtc_clock_write(sc, &dt) == 0)
153 		return (-1);
154 
155 	/* Clear OS flag. */
156 	reg = pcyrtc_reg_read(sc, PCF85063_SECONDS);
157 	if (reg & PCF85063_SECONDS_OS) {
158 		reg &= ~PCF85063_SECONDS_OS;
159 		pcyrtc_reg_write(sc, PCF85063_SECONDS, reg);
160 	}
161 
162 	return (0);
163 }
164 
165 uint8_t
166 pcyrtc_reg_read(struct pcyrtc_softc *sc, int reg)
167 {
168 	uint8_t cmd = reg;
169 	uint8_t val;
170 
171 	iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
172 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
173 	    NULL, 0, &cmd, sizeof cmd, I2C_F_POLL) ||
174 	    iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
175 	    NULL, 0, &val, sizeof val, I2C_F_POLL)) {
176 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
177 		printf("%s: pcyrtc_reg_read: failed to read reg%d\n",
178 		    sc->sc_dev.dv_xname, reg);
179 		return 0;
180 	}
181 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
182 	return val;
183 }
184 
185 void
186 pcyrtc_reg_write(struct pcyrtc_softc *sc, int reg, uint8_t val)
187 {
188 	uint8_t cmd = reg;
189 
190 	iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
191 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
192 	    &cmd, sizeof cmd, &val, sizeof val, I2C_F_POLL)) {
193 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
194 		printf("%s: pcyrtc_reg_write: failed to write reg%d\n",
195 		    sc->sc_dev.dv_xname, reg);
196 		return;
197 	}
198 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
199 }
200 
201 int
202 pcyrtc_clock_read(struct pcyrtc_softc *sc, struct clock_ymdhms *dt)
203 {
204 	uint8_t regs[PCF85063_NRTC_REGS];
205 	uint8_t cmd = PCF85063_SECONDS;
206 
207 	iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
208 	if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
209 	    &cmd, sizeof cmd, regs, PCF85063_NRTC_REGS, I2C_F_POLL)) {
210 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
211 		printf("%s: pcyrtc_clock_read: failed to read rtc\n",
212 		    sc->sc_dev.dv_xname);
213 		return (0);
214 	}
215 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
216 
217 	/*
218 	 * Convert the PCF85063's register values into something useable
219 	 */
220 	dt->dt_sec = FROMBCD(regs[0] & PCF85063_SECONDS_MASK);
221 	dt->dt_min = FROMBCD(regs[1] & PCF85063_MINUTES_MASK);
222 	dt->dt_hour = FROMBCD(regs[2] & PCF85063_HOURS_24MASK);
223 	dt->dt_day = FROMBCD(regs[3] & PCF85063_DAY_MASK);
224 	dt->dt_mon = FROMBCD(regs[5] & PCF85063_MONTH_MASK);
225 	dt->dt_year = FROMBCD(regs[6]) + 2000;
226 
227 	if (regs[0] & PCF85063_SECONDS_OS)
228 		return (0);
229 
230 	return (1);
231 }
232 
233 int
234 pcyrtc_clock_write(struct pcyrtc_softc *sc, struct clock_ymdhms *dt)
235 {
236 	uint8_t regs[PCF85063_NRTC_REGS];
237 	uint8_t cmd = PCF85063_SECONDS;
238 
239 	/*
240 	 * Convert our time representation into something the PCF85063
241 	 * can understand.
242 	 */
243 	regs[0] = TOBCD(dt->dt_sec);
244 	regs[1] = TOBCD(dt->dt_min);
245 	regs[2] = TOBCD(dt->dt_hour);
246 	regs[3] = TOBCD(dt->dt_day);
247 	regs[4] = TOBCD(dt->dt_wday);
248 	regs[5] = TOBCD(dt->dt_mon);
249 	regs[6] = TOBCD(dt->dt_year - 2000);
250 
251 	iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
252 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
253 	    &cmd, sizeof cmd, regs, PCF85063_NRTC_REGS, I2C_F_POLL)) {
254 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
255 		printf("%s: pcyrtc_clock_write: failed to write rtc\n",
256 		    sc->sc_dev.dv_xname);
257 		return (0);
258 	}
259 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
260 	return (1);
261 }
262