1 /* Public Domain */ 2 3 /* 4 * RK3288 clocks. 5 */ 6 7 #define RK3288_PLL_APLL 1 8 #define RK3288_PLL_CPLL 3 9 #define RK3288_PLL_GPLL 4 10 #define RK3288_ARMCLK 6 11 12 #define RK3288_CLK_SDMMC 68 13 #define RK3288_CLK_UART0 77 14 #define RK3288_CLK_UART1 78 15 #define RK3288_CLK_UART2 79 16 #define RK3288_CLK_UART3 80 17 #define RK3288_CLK_UART4 81 18 #define RK3288_CLK_MAC_RX 102 19 #define RK3288_CLK_MAC_TX 103 20 #define RK3288_CLK_SDMMC_DRV 114 21 #define RK3288_CLK_SDMMC_SAMPLE 118 22 #define RK3288_CLK_MAC 151 23 24 #define RK3288_ACLK_GMAC 196 25 26 #define RK3288_PCLK_I2C0 332 27 #define RK3288_PCLK_I2C1 333 28 #define RK3288_PCLK_I2C2 334 29 #define RK3288_PCLK_I2C3 335 30 #define RK3288_PCLK_I2C4 336 31 #define RK3288_PCLK_I2C5 337 32 #define RK3288_PCLK_GMAC 349 33 34 #define RK3288_HCLK_HOST0 450 35 #define RK3288_HCLK_SDMMC 456 36 37 /* 38 * RK3399 clocks. 39 */ 40 41 #define RK3399_PLL_ALPLL 1 42 #define RK3399_PLL_ABPLL 2 43 #define RK3399_PLL_DPLL 3 44 #define RK3399_PLL_CPLL 4 45 #define RK3399_PLL_GPLL 5 46 #define RK3399_PLL_NPLL 6 47 #define RK3399_ARMCLKL 8 48 #define RK3399_ARMCLKB 9 49 50 #define RK3399_CLK_I2C1 65 51 #define RK3399_CLK_I2C2 66 52 #define RK3399_CLK_I2C3 67 53 #define RK3399_CLK_I2C5 68 54 #define RK3399_CLK_I2C6 69 55 #define RK3399_CLK_I2C7 70 56 #define RK3399_CLK_SDMMC 76 57 #define RK3399_CLK_EMMC 78 58 #define RK3399_CLK_TSADC 79 59 #define RK3399_CLK_UART0 81 60 #define RK3399_CLK_UART1 82 61 #define RK3399_CLK_UART2 83 62 #define RK3399_CLK_UART3 84 63 #define RK3399_CLK_MAC_RX 103 64 #define RK3399_CLK_MAC_TX 104 65 #define RK3399_CLK_MAC 105 66 #define RK3399_CLK_USB3OTG0_REF 129 67 #define RK3399_CLK_USB3OTG1_REF 130 68 #define RK3399_CLK_USB3OTG0_SUSPEND 131 69 #define RK3399_CLK_USB3OTG1_SUSPEND 132 70 #define RK3399_CLK_SDMMC_DRV 154 71 #define RK3399_CLK_SDMMC_SAMPLE 155 72 73 #define RK3399_ACLK_GMAC 213 74 #define RK3399_ACLK_EMMC 240 75 #define RK3399_ACLK_USB3OTG0 246 76 #define RK3399_ACLK_USB3OTG1 247 77 #define RK3399_ACLK_USB3_GRF 249 78 79 #define RK3399_PCLK_I2C1 341 80 #define RK3399_PCLK_I2C2 342 81 #define RK3399_PCLK_I2C3 343 82 #define RK3399_PCLK_I2C5 344 83 #define RK3399_PCLK_I2C6 345 84 #define RK3399_PCLK_I2C7 346 85 #define RK3399_PCLK_TSADC 356 86 #define RK3399_PCLK_GMAC 358 87 88 #define RK3399_HCLK_HOST0 456 89 #define RK3399_HCLK_HOST0_ARB 457 90 #define RK3399_HCLK_HOST1 458 91 #define RK3399_HCLK_HOST1_ARB 459 92 #define RK3399_HCLK_SDMMC 462 93 94 /* PMUCRU */ 95 96 #define RK3399_PLL_PPLL 1 97 98 #define RK3399_CLK_I2C0 9 99 #define RK3399_CLK_I2C4 10 100 #define RK3399_CLK_I2C8 11 101 102 #define RK3399_PCLK_I2C0 27 103 #define RK3399_PCLK_I2C4 28 104 #define RK3399_PCLK_I2C8 29 105