1 /* $OpenBSD: mvmdio.c,v 1.1 2017/08/25 20:09:34 patrick Exp $ */ 2 /* $NetBSD: if_mvneta.c,v 1.41 2015/04/15 10:15:40 hsuenaga Exp $ */ 3 /* 4 * Copyright (c) 2007, 2008, 2013 KIYOHARA Takashi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/device.h> 32 #include <sys/socket.h> 33 #include <sys/sockio.h> 34 #include <sys/mutex.h> 35 36 #include <machine/bus.h> 37 #include <machine/fdt.h> 38 39 #include <dev/ofw/openfirm.h> 40 #include <dev/ofw/ofw_pinctrl.h> 41 #include <dev/ofw/fdt.h> 42 43 #include <dev/fdt/if_mvnetareg.h> 44 45 #include <net/if.h> 46 47 #define MVNETA_READ(sc, reg) \ 48 bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)) 49 #define MVNETA_WRITE(sc, reg, val) \ 50 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val)) 51 52 struct mvmdio_softc { 53 struct device sc_dev; 54 55 bus_space_tag_t sc_iot; 56 bus_space_handle_t sc_ioh; 57 58 struct mutex sc_mtx; 59 }; 60 61 struct mvmdio_softc *mvmdio_sc; 62 63 static int mvmdio_match(struct device *, void *, void *); 64 static void mvmdio_attach(struct device *, struct device *, void *); 65 66 int mvmdio_miibus_readreg(struct device *, int, int); 67 void mvmdio_miibus_writereg(struct device *, int, int, int); 68 69 struct cfdriver mvmdio_cd = { 70 NULL, "mvmdio", DV_DULL 71 }; 72 73 struct cfattach mvmdio_ca = { 74 sizeof (struct mvmdio_softc), mvmdio_match, mvmdio_attach, 75 }; 76 77 static int 78 mvmdio_match(struct device *parent, void *cfdata, void *aux) 79 { 80 struct fdt_attach_args *faa = aux; 81 82 return OF_is_compatible(faa->fa_node, "marvell,orion-mdio"); 83 } 84 85 static void 86 mvmdio_attach(struct device *parent, struct device *self, void *aux) 87 { 88 struct mvmdio_softc *sc = (struct mvmdio_softc *) self; 89 struct fdt_attach_args *faa = aux; 90 91 printf("\n"); 92 93 sc->sc_iot = faa->fa_iot; 94 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, 95 faa->fa_reg[0].size, 0, &sc->sc_ioh)) 96 panic("%s: cannot map registers", sc->sc_dev.dv_xname); 97 98 pinctrl_byname(faa->fa_node, "default"); 99 100 mtx_init(&sc->sc_mtx, IPL_NET); 101 102 mvmdio_sc = sc; 103 } 104 105 int 106 mvmdio_miibus_readreg(struct device *dev, int phy, int reg) 107 { 108 struct mvmdio_softc *sc = (struct mvmdio_softc *) dev; 109 uint32_t smi, val; 110 int i; 111 112 mtx_enter(&sc->sc_mtx); 113 114 for (i = 0; i < MVNETA_PHY_TIMEOUT; i++) { 115 DELAY(1); 116 if (!(MVNETA_READ(sc, 0) & MVNETA_SMI_BUSY)) 117 break; 118 } 119 if (i == MVNETA_PHY_TIMEOUT) { 120 printf("%s: SMI busy timeout\n", sc->sc_dev.dv_xname); 121 mtx_leave(&sc->sc_mtx); 122 return -1; 123 } 124 125 smi = MVNETA_SMI_PHYAD(phy) | MVNETA_SMI_REGAD(reg) 126 | MVNETA_SMI_OPCODE_READ; 127 MVNETA_WRITE(sc, 0, smi); 128 129 for (i = 0; i < MVNETA_PHY_TIMEOUT; i++) { 130 DELAY(1); 131 smi = MVNETA_READ(sc, 0); 132 if (smi & MVNETA_SMI_READVALID) 133 break; 134 } 135 136 mtx_leave(&sc->sc_mtx); 137 138 val = smi & MVNETA_SMI_DATA_MASK; 139 140 return val; 141 } 142 143 void 144 mvmdio_miibus_writereg(struct device *dev, int phy, int reg, int val) 145 { 146 struct mvmdio_softc *sc = (struct mvmdio_softc *) dev; 147 uint32_t smi; 148 int i; 149 150 mtx_enter(&sc->sc_mtx); 151 152 for (i = 0; i < MVNETA_PHY_TIMEOUT; i++) { 153 DELAY(1); 154 if (!(MVNETA_READ(sc, 0) & MVNETA_SMI_BUSY)) 155 break; 156 } 157 if (i == MVNETA_PHY_TIMEOUT) { 158 printf("%s: SMI busy timeout\n", sc->sc_dev.dv_xname); 159 mtx_leave(&sc->sc_mtx); 160 return; 161 } 162 163 smi = MVNETA_SMI_PHYAD(phy) | MVNETA_SMI_REGAD(reg) | 164 MVNETA_SMI_OPCODE_WRITE | (val & MVNETA_SMI_DATA_MASK); 165 MVNETA_WRITE(sc, 0, smi); 166 167 for (i = 0; i < MVNETA_PHY_TIMEOUT; i++) { 168 DELAY(1); 169 if (!(MVNETA_READ(sc, 0) & MVNETA_SMI_BUSY)) 170 break; 171 } 172 173 mtx_leave(&sc->sc_mtx); 174 175 if (i == MVNETA_PHY_TIMEOUT) 176 printf("%s: phy write timed out\n", sc->sc_dev.dv_xname); 177 } 178