1 /* $OpenBSD: imxiomuxc.c,v 1.4 2018/07/23 19:13:54 patrick Exp $ */ 2 /* 3 * Copyright (c) 2013 Patrick Wildt <patrick@blueri.se> 4 * Copyright (c) 2016 Mark Kettenis <kettenis@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/param.h> 20 #include <sys/systm.h> 21 #include <sys/queue.h> 22 #include <sys/malloc.h> 23 #include <sys/device.h> 24 #include <sys/evcount.h> 25 #include <sys/socket.h> 26 #include <sys/timeout.h> 27 28 #include <machine/intr.h> 29 #include <machine/bus.h> 30 #include <machine/fdt.h> 31 32 #include <dev/ofw/openfirm.h> 33 #include <dev/ofw/ofw_pinctrl.h> 34 #include <dev/ofw/fdt.h> 35 36 #define IOMUX_CONFIG_SION (1 << 4) 37 38 #define IMX_PINCTRL_NO_PAD_CTL (1 << 31) 39 #define IMX_PINCTRL_SION (1 << 30) 40 41 struct imxiomuxc_softc { 42 struct device sc_dev; 43 bus_space_tag_t sc_iot; 44 bus_space_handle_t sc_ioh; 45 }; 46 47 struct imxiomuxc_softc *imxiomuxc_sc; 48 49 int imxiomuxc_match(struct device *, void *, void *); 50 void imxiomuxc_attach(struct device *, struct device *, void *); 51 52 struct cfattach imxiomuxc_ca = { 53 sizeof (struct imxiomuxc_softc), imxiomuxc_match, imxiomuxc_attach 54 }; 55 56 struct cfdriver imxiomuxc_cd = { 57 NULL, "imxiomuxc", DV_DULL 58 }; 59 60 int imxiomuxc_pinctrl(uint32_t, void *); 61 62 int 63 imxiomuxc_match(struct device *parent, void *match, void *aux) 64 { 65 struct fdt_attach_args *faa = aux; 66 67 return (OF_is_compatible(faa->fa_node, "fsl,imx6q-iomuxc") || 68 OF_is_compatible(faa->fa_node, "fsl,imx6dl-iomuxc") || 69 OF_is_compatible(faa->fa_node, "fsl,imx6sl-iomuxc") || 70 OF_is_compatible(faa->fa_node, "fsl,imx6sx-iomuxc") || 71 OF_is_compatible(faa->fa_node, "fsl,imx6ul-iomuxc") || 72 OF_is_compatible(faa->fa_node, "fsl,imx7d-iomuxc") || 73 OF_is_compatible(faa->fa_node, "fsl,imx8mq-iomuxc")); 74 } 75 76 void 77 imxiomuxc_attach(struct device *parent, struct device *self, void *aux) 78 { 79 struct imxiomuxc_softc *sc = (struct imxiomuxc_softc *)self; 80 struct fdt_attach_args *faa = aux; 81 82 KASSERT(faa->fa_nreg >= 1); 83 84 sc->sc_iot = faa->fa_iot; 85 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, 86 faa->fa_reg[0].size, 0, &sc->sc_ioh)) 87 panic("%s: bus_space_map failed!", __func__); 88 89 pinctrl_register(faa->fa_node, imxiomuxc_pinctrl, sc); 90 pinctrl_byname(faa->fa_node, "default"); 91 imxiomuxc_sc = sc; 92 printf("\n"); 93 } 94 95 int 96 imxiomuxc_pinctrl(uint32_t phandle, void *cookie) 97 { 98 struct imxiomuxc_softc *sc = cookie; 99 char name[31]; 100 uint32_t *pins; 101 int npins; 102 int node; 103 int len; 104 int i; 105 106 node = OF_getnodebyphandle(phandle); 107 if (node == 0) 108 return -1; 109 110 OF_getprop(node, "name", name, sizeof(name)); 111 name[sizeof(name) - 1] = 0; 112 113 len = OF_getproplen(node, "fsl,pins"); 114 if (len <= 0) 115 return -1; 116 117 pins = malloc(len, M_TEMP, M_WAITOK); 118 OF_getpropintarray(node, "fsl,pins", pins, len); 119 npins = len / (6 * sizeof(uint32_t)); 120 121 for (i = 0; i < npins; i++) { 122 uint32_t mux_reg = pins[6 * i + 0]; 123 uint32_t conf_reg = pins[6 * i + 1]; 124 uint32_t input_reg = pins[6 * i + 2]; 125 uint32_t mux_val = pins[6 * i + 3]; 126 uint32_t conf_val = pins[6 * i + 5]; 127 uint32_t input_val = pins[6 * i + 4]; 128 uint32_t val; 129 130 /* Set MUX mode. */ 131 if (conf_val & IMX_PINCTRL_SION) 132 mux_val |= IOMUX_CONFIG_SION; 133 bus_space_write_4(sc->sc_iot, sc->sc_ioh, mux_reg, mux_val); 134 135 /* Set PAD config. */ 136 if ((conf_val & IMX_PINCTRL_NO_PAD_CTL) == 0) 137 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 138 conf_reg, conf_val); 139 140 /* Set input select. */ 141 if ((input_val >> 24) == 0xff) { 142 /* 143 * Magic value used to clear or set specific 144 * bits in the general purpose registers. 145 */ 146 uint8_t shift = (input_val >> 16) & 0xff; 147 uint8_t width = (input_val >> 8) & 0xff; 148 uint32_t clr = ((1 << width) - 1) << shift; 149 uint32_t set = (input_val & 0xff) << shift; 150 151 val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 152 input_reg); 153 val &= ~clr; 154 val |= set; 155 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 156 input_reg, val); 157 } else if (input_reg != 0) { 158 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 159 input_reg, input_val); 160 } 161 } 162 163 free(pins, M_TEMP, len); 164 return 0; 165 } 166