1 /* $OpenBSD: imxiomuxc.c,v 1.2 2018/04/02 17:49:58 patrick Exp $ */ 2 /* 3 * Copyright (c) 2013 Patrick Wildt <patrick@blueri.se> 4 * Copyright (c) 2016 Mark Kettenis <kettenis@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/param.h> 20 #include <sys/systm.h> 21 #include <sys/queue.h> 22 #include <sys/malloc.h> 23 #include <sys/device.h> 24 #include <sys/evcount.h> 25 #include <sys/socket.h> 26 #include <sys/timeout.h> 27 28 #include <machine/intr.h> 29 #include <machine/bus.h> 30 #include <machine/fdt.h> 31 32 #include <dev/ofw/openfirm.h> 33 #include <dev/ofw/ofw_pinctrl.h> 34 #include <dev/ofw/fdt.h> 35 36 #define IOMUX_CONFIG_SION (1 << 4) 37 38 #define IMX_PINCTRL_NO_PAD_CTL (1 << 31) 39 #define IMX_PINCTRL_SION (1 << 30) 40 41 struct imxiomuxc_softc { 42 struct device sc_dev; 43 bus_space_tag_t sc_iot; 44 bus_space_handle_t sc_ioh; 45 }; 46 47 struct imxiomuxc_softc *imxiomuxc_sc; 48 49 int imxiomuxc_match(struct device *, void *, void *); 50 void imxiomuxc_attach(struct device *, struct device *, void *); 51 52 struct cfattach imxiomuxc_ca = { 53 sizeof (struct imxiomuxc_softc), imxiomuxc_match, imxiomuxc_attach 54 }; 55 56 struct cfdriver imxiomuxc_cd = { 57 NULL, "imxiomuxc", DV_DULL 58 }; 59 60 int imxiomuxc_pinctrl(uint32_t, void *); 61 62 int 63 imxiomuxc_match(struct device *parent, void *match, void *aux) 64 { 65 struct fdt_attach_args *faa = aux; 66 67 return (OF_is_compatible(faa->fa_node, "fsl,imx6q-iomuxc") || 68 OF_is_compatible(faa->fa_node, "fsl,imx6dl-iomuxc") || 69 OF_is_compatible(faa->fa_node, "fsl,imx6sl-iomuxc") || 70 OF_is_compatible(faa->fa_node, "fsl,imx6sx-iomuxc") || 71 OF_is_compatible(faa->fa_node, "fsl,imx6ul-iomuxc") || 72 OF_is_compatible(faa->fa_node, "fsl,imx8mq-iomuxc")); 73 } 74 75 void 76 imxiomuxc_attach(struct device *parent, struct device *self, void *aux) 77 { 78 struct imxiomuxc_softc *sc = (struct imxiomuxc_softc *)self; 79 struct fdt_attach_args *faa = aux; 80 81 KASSERT(faa->fa_nreg >= 1); 82 83 sc->sc_iot = faa->fa_iot; 84 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, 85 faa->fa_reg[0].size, 0, &sc->sc_ioh)) 86 panic("%s: bus_space_map failed!", __func__); 87 88 pinctrl_register(faa->fa_node, imxiomuxc_pinctrl, sc); 89 imxiomuxc_sc = sc; 90 printf("\n"); 91 } 92 93 int 94 imxiomuxc_pinctrl(uint32_t phandle, void *cookie) 95 { 96 struct imxiomuxc_softc *sc = cookie; 97 char name[31]; 98 uint32_t *pins; 99 int npins; 100 int node; 101 int len; 102 int i; 103 104 node = OF_getnodebyphandle(phandle); 105 if (node == 0) 106 return -1; 107 108 OF_getprop(node, "name", name, sizeof(name)); 109 name[sizeof(name) - 1] = 0; 110 111 len = OF_getproplen(node, "fsl,pins"); 112 if (len <= 0) 113 return -1; 114 115 pins = malloc(len, M_TEMP, M_WAITOK); 116 OF_getpropintarray(node, "fsl,pins", pins, len); 117 npins = len / (6 * sizeof(uint32_t)); 118 119 for (i = 0; i < npins; i++) { 120 uint32_t mux_reg = pins[6 * i + 0]; 121 uint32_t conf_reg = pins[6 * i + 1]; 122 uint32_t input_reg = pins[6 * i + 2]; 123 uint32_t mux_val = pins[6 * i + 3]; 124 uint32_t conf_val = pins[6 * i + 5]; 125 uint32_t input_val = pins[6 * i + 4]; 126 uint32_t val; 127 128 /* Set MUX mode. */ 129 if (conf_val & IMX_PINCTRL_SION) 130 mux_val |= IOMUX_CONFIG_SION; 131 bus_space_write_4(sc->sc_iot, sc->sc_ioh, mux_reg, mux_val); 132 133 /* Set PAD config. */ 134 if ((conf_val & IMX_PINCTRL_NO_PAD_CTL) == 0) 135 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 136 conf_reg, conf_val); 137 138 /* Set input select. */ 139 if ((input_val >> 24) == 0xff) { 140 /* 141 * Magic value used to clear or set specific 142 * bits in the general purpose registers. 143 */ 144 uint8_t shift = (input_val >> 16) & 0xff; 145 uint8_t width = (input_val >> 8) & 0xff; 146 uint32_t clr = ((1 << width) - 1) << shift; 147 uint32_t set = (input_val & 0xff) << shift; 148 149 val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 150 input_reg); 151 val &= ~clr; 152 val |= set; 153 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 154 input_reg, val); 155 } else if (input_reg != 0) { 156 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 157 input_reg, input_val); 158 } 159 } 160 161 free(pins, M_TEMP, len); 162 return 0; 163 } 164