1 /* $OpenBSD: amlreset.c,v 1.2 2021/10/24 17:52:26 mpi Exp $ */ 2 /* 3 * Copyright (c) 2019 Mark Kettenis <kettenis@openbsd.org> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <sys/param.h> 19 #include <sys/systm.h> 20 #include <sys/device.h> 21 22 #include <machine/intr.h> 23 #include <machine/bus.h> 24 #include <machine/fdt.h> 25 26 #include <dev/ofw/openfirm.h> 27 #include <dev/ofw/ofw_clock.h> 28 #include <dev/ofw/ofw_misc.h> 29 #include <dev/ofw/fdt.h> 30 31 #define RESET0_REGISTER 0x0000 32 #define RESET0_MASK 0x003c 33 #define RESET0_LEVEL 0x007c 34 35 #define HREAD4(sc, reg) \ 36 (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))) 37 #define HWRITE4(sc, reg, val) \ 38 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val)) 39 #define HSET4(sc, reg, bits) \ 40 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits)) 41 #define HCLR4(sc, reg, bits) \ 42 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits)) 43 44 struct amlreset_softc { 45 struct device sc_dev; 46 bus_space_tag_t sc_iot; 47 bus_space_handle_t sc_ioh; 48 49 struct reset_device sc_rd; 50 }; 51 52 int amlreset_match(struct device *, void *, void *); 53 void amlreset_attach(struct device *, struct device *, void *); 54 55 const struct cfattach amlreset_ca = { 56 sizeof (struct amlreset_softc), amlreset_match, amlreset_attach 57 }; 58 59 struct cfdriver amlreset_cd = { 60 NULL, "amlreset", DV_DULL 61 }; 62 63 void amlreset_reset(void *, uint32_t *, int); 64 65 int 66 amlreset_match(struct device *parent, void *match, void *aux) 67 { 68 struct fdt_attach_args *faa = aux; 69 70 return OF_is_compatible(faa->fa_node, "amlogic,meson-axg-reset"); 71 } 72 73 void 74 amlreset_attach(struct device *parent, struct device *self, void *aux) 75 { 76 struct amlreset_softc *sc = (struct amlreset_softc *)self; 77 struct fdt_attach_args *faa = aux; 78 79 if (faa->fa_nreg < 1) { 80 printf(": no registers\n"); 81 return; 82 } 83 84 sc->sc_iot = faa->fa_iot; 85 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, 86 faa->fa_reg[0].size, 0, &sc->sc_ioh)) { 87 printf(": can't map registers\n"); 88 return; 89 } 90 91 printf("\n"); 92 93 sc->sc_rd.rd_node = faa->fa_node; 94 sc->sc_rd.rd_cookie = sc; 95 sc->sc_rd.rd_reset = amlreset_reset; 96 reset_register(&sc->sc_rd); 97 } 98 99 void 100 amlreset_reset(void *cookie, uint32_t *cells, int assert) 101 { 102 struct amlreset_softc *sc = cookie; 103 uint32_t bank = cells[0] / 32; 104 uint32_t bit = cells[0] % 32; 105 106 if (assert) 107 HCLR4(sc, RESET0_LEVEL + bank * 4, (1 << bit)); 108 else 109 HSET4(sc, RESET0_LEVEL + bank * 4, (1 << bit)); 110 } 111