1 /* $OpenBSD: if_dc_cardbus.c,v 1.27 2008/09/11 06:49:14 brad Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/mbuf.h> 40 #include <sys/socket.h> 41 #include <sys/ioctl.h> 42 #include <sys/errno.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/proc.h> 46 #include <sys/device.h> 47 48 #include <net/if.h> 49 #include <net/if_dl.h> 50 #include <net/if_types.h> 51 #include <net/if_media.h> 52 53 #include <netinet/in.h> 54 #include <netinet/if_ether.h> 55 56 #include <dev/mii/mii.h> 57 #include <dev/mii/miivar.h> 58 59 #include <machine/bus.h> 60 61 #include <dev/pci/pcivar.h> 62 #include <dev/pci/pcireg.h> 63 #include <dev/pci/pcidevs.h> 64 65 #include <dev/cardbus/cardbusvar.h> 66 67 #include <dev/ic/dcreg.h> 68 69 /* PCI configuration regs */ 70 #define PCI_CBIO 0x10 71 #define PCI_CBMEM 0x14 72 #define PCI_CFDA 0x40 73 74 #define DC_CFDA_SUSPEND 0x80000000 75 #define DC_CFDA_STANDBY 0x40000000 76 77 struct dc_cardbus_softc { 78 struct dc_softc sc_dc; 79 int sc_intrline; 80 81 cardbus_devfunc_t sc_ct; 82 cardbustag_t sc_tag; 83 bus_size_t sc_mapsize; 84 int sc_actype; 85 }; 86 87 int dc_cardbus_match(struct device *, void *, void *); 88 void dc_cardbus_attach(struct device *, struct device *,void *); 89 int dc_cardbus_detach(struct device *, int); 90 91 void dc_cardbus_setup(struct dc_cardbus_softc *csc); 92 93 struct cfattach dc_cardbus_ca = { 94 sizeof(struct dc_cardbus_softc), dc_cardbus_match, dc_cardbus_attach, 95 dc_cardbus_detach 96 }; 97 98 const struct cardbus_matchid dc_cardbus_devices[] = { 99 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 100 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143 }, 101 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985 }, 102 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 103 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500 }, 104 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500MX }, 105 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_PCM200 }, 106 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DRP32TXD }, 107 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCMPC200 }, 108 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCM200 }, 109 { PCI_VENDOR_HAWKING, PCI_PRODUCT_HAWKING_PN672TX }, 110 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN120 }, 111 }; 112 113 int 114 dc_cardbus_match(struct device *parent, void *match, void *aux) 115 { 116 return (cardbus_matchbyid((struct cardbus_attach_args *)aux, 117 dc_cardbus_devices, 118 sizeof(dc_cardbus_devices)/sizeof(dc_cardbus_devices[0]))); 119 } 120 121 void 122 dc_cardbus_attach(struct device *parent, struct device *self, void *aux) 123 { 124 struct dc_cardbus_softc *csc = (struct dc_cardbus_softc *)self; 125 struct dc_softc *sc = &csc->sc_dc; 126 struct cardbus_attach_args *ca = aux; 127 struct cardbus_devfunc *ct = ca->ca_ct; 128 cardbus_chipset_tag_t cc = ct->ct_cc; 129 cardbus_function_tag_t cf = ct->ct_cf; 130 cardbusreg_t reg; 131 bus_addr_t addr; 132 133 sc->sc_dmat = ca->ca_dmat; 134 csc->sc_ct = ct; 135 csc->sc_tag = ca->ca_tag; 136 137 Cardbus_function_enable(ct); 138 139 if (Cardbus_mapreg_map(ct, PCI_CBIO, 140 PCI_MAPREG_TYPE_IO, 0, &sc->dc_btag, &sc->dc_bhandle, &addr, 141 &csc->sc_mapsize) == 0) { 142 143 csc->sc_actype = CARDBUS_IO_ENABLE; 144 } else if (Cardbus_mapreg_map(ct, PCI_CBMEM, 145 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 146 &sc->dc_btag, &sc->dc_bhandle, &addr, &csc->sc_mapsize) == 0) { 147 csc->sc_actype = CARDBUS_MEM_ENABLE; 148 } else { 149 printf(": can't map device registers\n"); 150 return; 151 } 152 153 csc->sc_intrline = ca->ca_intrline; 154 155 sc->dc_cachesize = cardbus_conf_read(cc, cf, ca->ca_tag, DC_PCI_CFLT) 156 & 0xFF; 157 158 dc_cardbus_setup(csc); 159 160 /* Get the eeprom width, but XIRCOM has no eeprom */ 161 if (!(PCI_VENDOR(ca->ca_id) == PCI_VENDOR_XIRCOM && 162 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_XIRCOM_X3201_3_21143)) 163 dc_eeprom_width(sc); 164 165 switch (PCI_VENDOR(ca->ca_id)) { 166 case PCI_VENDOR_DEC: 167 if (PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_DEC_21142) { 168 sc->dc_type = DC_TYPE_21143; 169 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 170 sc->dc_flags |= DC_REDUCED_MII_POLL; 171 dc_read_srom(sc, sc->dc_romwidth); 172 dc_parse_21143_srom(sc); 173 } 174 break; 175 case PCI_VENDOR_XIRCOM: 176 if (PCI_PRODUCT(ca->ca_id) == 177 PCI_PRODUCT_XIRCOM_X3201_3_21143) { 178 sc->dc_type = DC_TYPE_XIRCOM; 179 sc->dc_flags |= DC_TX_INTR_ALWAYS|DC_TX_COALESCE | 180 DC_TX_ALIGN; 181 sc->dc_pmode = DC_PMODE_MII; 182 183 bcopy(ca->ca_cis.funce.network.netid, 184 &sc->sc_arpcom.ac_enaddr, 185 sizeof sc->sc_arpcom.ac_enaddr); 186 } 187 break; 188 case PCI_VENDOR_ADMTEK: 189 case PCI_VENDOR_ACCTON: 190 case PCI_VENDOR_ABOCOM: 191 case PCI_VENDOR_DLINK: 192 case PCI_VENDOR_LINKSYS: 193 case PCI_VENDOR_HAWKING: 194 case PCI_VENDOR_MICROSOFT: 195 if (PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ADMTEK_AN985 || 196 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ACCTON_EN2242 || 197 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ABOCOM_FE2500 || 198 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ABOCOM_FE2500MX || 199 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ABOCOM_PCM200 || 200 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_DLINK_DRP32TXD || 201 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_LINKSYS_PCMPC200 || 202 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_LINKSYS_PCM200 || 203 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_HAWKING_PN672TX || 204 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_MICROSOFT_MN120) { 205 sc->dc_type = DC_TYPE_AN983; 206 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_ADMTEK_WAR | 207 DC_64BIT_HASH; 208 sc->dc_pmode = DC_PMODE_MII; 209 /* Don't read SROM for - auto-loaded on reset */ 210 } 211 break; 212 default: 213 printf(": unknown device\n"); 214 return; 215 } 216 217 /* 218 * set latency timer, do we really need this? 219 */ 220 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG); 221 if (PCI_LATTIMER(reg) < 0x20) { 222 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 223 reg |= (0x20 << PCI_LATTIMER_SHIFT); 224 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg); 225 } 226 227 sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_NET, 228 dc_intr, csc, sc->sc_dev.dv_xname); 229 if (sc->sc_ih == NULL) { 230 printf(": can't establish interrupt at %d\n", 231 ca->ca_intrline); 232 return; 233 } 234 printf(": irq %d", ca->ca_intrline); 235 236 dc_reset(sc); 237 238 sc->dc_revision = PCI_REVISION(ca->ca_class); 239 dc_attach(sc); 240 } 241 242 int 243 dc_detach(struct dc_softc *sc) 244 { 245 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 246 247 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) 248 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 249 250 if (sc->dc_srom) 251 free(sc->dc_srom, M_DEVBUF); 252 253 timeout_del(&sc->dc_tick_tmo); 254 255 ether_ifdetach(ifp); 256 if_detach(ifp); 257 258 if (sc->sc_dhook != NULL) 259 shutdownhook_disestablish(sc->sc_dhook); 260 if (sc->sc_pwrhook != NULL) 261 powerhook_disestablish(sc->sc_pwrhook); 262 263 return (0); 264 } 265 266 int 267 dc_cardbus_detach(struct device *self, int flags) 268 { 269 struct dc_cardbus_softc *csc = (struct dc_cardbus_softc *)self; 270 struct dc_softc *sc = &csc->sc_dc; 271 struct cardbus_devfunc *ct = csc->sc_ct; 272 int rv = 0; 273 274 rv = dc_detach(sc); 275 if (rv) 276 return (rv); 277 278 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih); 279 280 /* unmap cardbus resources */ 281 Cardbus_mapreg_unmap(ct, 282 csc->sc_actype == CARDBUS_IO_ENABLE ? PCI_CBIO : PCI_CBMEM, 283 sc->dc_btag, sc->dc_bhandle, csc->sc_mapsize); 284 285 return (rv); 286 } 287 288 void 289 dc_cardbus_setup(struct dc_cardbus_softc *csc) 290 { 291 cardbus_devfunc_t ct = csc->sc_ct; 292 cardbus_chipset_tag_t cc = ct->ct_cc; 293 cardbus_function_tag_t cf = ct->ct_cf; 294 cardbusreg_t reg; 295 int r; 296 297 /* wakeup the card if needed */ 298 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_CFDA); 299 if (reg | (DC_CFDA_SUSPEND|DC_CFDA_STANDBY)) { 300 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_CFDA, 301 reg & ~(DC_CFDA_SUSPEND|DC_CFDA_STANDBY)); 302 } 303 304 if (cardbus_get_capability(cc, cf, csc->sc_tag, PCI_CAP_PWRMGMT, &r, 305 0)) { 306 r = cardbus_conf_read(cc, cf, csc->sc_tag, r + 4) & 3; 307 if (r) { 308 printf("%s: awakening from state D%d\n", 309 csc->sc_dc.sc_dev.dv_xname, r); 310 cardbus_conf_write(cc, cf, csc->sc_tag, r + 4, 0); 311 } 312 } 313 314 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_actype); 315 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 316 317 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG); 318 reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 319 PCI_COMMAND_MASTER_ENABLE; 320 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg); 321 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG); 322 } 323