1 /* $OpenBSD: param.h,v 1.12 2003/06/02 23:27:56 millert Exp $ */ 2 /* $NetBSD: param.h,v 1.25 2001/05/30 12:28:51 mrg Exp $ */ 3 4 /* 5 * Copyright (c) 1992, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This software was developed by the Computer Systems Engineering group 9 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 10 * contributed to Berkeley. 11 * 12 * All advertising materials mentioning features or use of this software 13 * must display the following acknowledgement: 14 * This product includes software developed by the University of 15 * California, Lawrence Berkeley Laboratory. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * @(#)param.h 8.1 (Berkeley) 6/11/93 42 */ 43 44 /* 45 * Copyright (c) 1996-1999 Eduardo Horvath 46 * 47 * Redistribution and use in source and binary forms, with or without 48 * modification, are permitted provided that the following conditions 49 * are met: 50 * 1. Redistributions of source code must retain the above copyright 51 * notice, this list of conditions and the following disclaimer. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 */ 66 67 #ifndef _SPARC64_PARAM_H_ 68 #define _SPARC64_PARAM_H_ 69 70 #define _MACHINE sparc64 71 #define MACHINE "sparc64" 72 #define _MACHINE_ARCH sparc64 73 #define MACHINE_ARCH "sparc64" 74 #define MID_MACHINE MID_SPARC64 75 76 #ifdef _KERNEL /* XXX */ 77 #ifndef _LOCORE /* XXX */ 78 #include <machine/cpu.h> /* XXX */ 79 #endif /* XXX */ 80 #endif /* XXX */ 81 82 /* 83 * Round p (pointer or byte index) up to a correctly-aligned value for 84 * the machine's strictest data type. The result is u_int and must be 85 * cast to any desired pointer type. 86 * 87 * ALIGNED_POINTER is a boolean macro that checks whether an address 88 * is valid to fetch data elements of type t from on this architecture. 89 * This does not reflect the optimal alignment, just the possibility 90 * (within reasonable limits). 91 * 92 */ 93 #define ALIGNBYTES 0xf 94 #define ALIGN(p) (((u_long)(p) + ALIGNBYTES) & ~ALIGNBYTES) 95 #define ALIGN32(p) (((u_long)(p) + ALIGNBYTES32) & ~ALIGNBYTES32) 96 #define ALIGNED_POINTER(p,t) ((((u_long)(p)) & (sizeof(t)-1)) == 0) 97 98 99 /* 100 * The following variables are always defined and initialized (in locore) 101 * so independently compiled modules (e.g. LKMs) can be used irrespective 102 * of the `options SUN4?' combination a particular kernel was configured with. 103 * See also the definitions of NBPG, PGOFSET and PGSHIFT below. 104 */ 105 #if (defined(_KERNEL) || defined(_STANDALONE)) && !defined(_LOCORE) 106 extern int nbpg, pgofset, pgshift; 107 #endif 108 109 #define DEV_BSIZE 512 110 #define DEV_BSHIFT 9 /* log2(DEV_BSIZE) */ 111 #define BLKDEV_IOSIZE 2048 112 #define MAXPHYS (64 * 1024) 113 114 /* We get stack overflows w/8K stacks in 64-bit mode */ 115 #define SSIZE 2 /* initial stack size in pages */ 116 #define USPACE (SSIZE*8192) 117 118 119 /* 120 * Here are all the magic kernel virtual addresses and how they're allocated. 121 * 122 * First, the PROM is usually a fixed-sized block from 0x00000000f0000000 to 123 * 0x00000000f0100000. It also uses some space around 0x00000000fff00000 to 124 * map in device registers. The rest is pretty much ours to play with. 125 * 126 * The kernel starts at KERNBASE. Here's they layout. We use macros to set 127 * the addresses so we can relocate everything easily. We use 4MB locked TTEs 128 * to map in the kernel text and data segments. Any extra pages are recycled, 129 * so they can potentially be double-mapped. This shouldn't really be a 130 * problem since they're unused, but wild pointers can cause silent data 131 * corruption if they are in those segments. 132 * 133 * 0x0000000000000000: 64K NFO page zero 134 * 0x0000000000010000: Userland or PROM 135 * KERNBASE: 4MB kernel text and read only data 136 * This is mapped in the ITLB and 137 * Read-Only in the DTLB 138 * KERNBASE+0x400000: 4MB kernel data and BSS -- not in ITLB 139 * Contains context table, kernel pmap, 140 * and other important structures. 141 * KERNBASE+0x800000: Unmapped page -- redzone 142 * KERNBASE+0x802000: Process 0 stack and u-area 143 * KERNBASE+0x806000: 2 pages for pmap_copy_page and /dev/mem 144 * KERNBASE+0x80a000: Start of kernel VA segment 145 * KERNEND: End of kernel VA segment 146 * KERNEND+0x02000: Auxreg_va (unused?) 147 * KERNEND+0x04000: TMPMAP_VA (unused?) 148 * KERNEND+0x06000: message buffer. 149 * KERNEND+0x010000: 64K locked TTE -- different for each CPU 150 * Contains interrupt stack, cpu_info structure, 151 * and 32KB kernel TSB. 152 * KERNEND+0x020000: IODEV_BASE -- begin mapping IO devices here. 153 * 0x00000000fe000000: IODEV_END -- end of device mapping space. 154 * 155 */ 156 #define KERNBASE 0x001000000 /* start of kernel virtual space */ 157 #define KERNEND 0x0e0000000 /* end of kernel virtual space */ 158 #define VM_MAX_KERNEL_BUF ((KERNEND-KERNBASE)/4) 159 160 #define _MAXNBPG 8192 /* fixed VAs, independent of actual NBPG */ 161 162 #define AUXREG_VA ( KERNEND + _MAXNBPG) /* 1 page REDZONE */ 163 #define TMPMAP_VA ( AUXREG_VA + _MAXNBPG) 164 #define MSGBUF_VA ( TMPMAP_VA + _MAXNBPG) 165 /* 166 * Here's the location of the interrupt stack and CPU structure. 167 */ 168 #define INTSTACK ( KERNEND + 8*_MAXNBPG)/* 64K after kernel end */ 169 #define EINTSTACK ( INTSTACK + 2*USPACE) /* 32KB */ 170 #define CPUINFO_VA ( EINTSTACK) 171 #define IODEV_BASE ( CPUINFO_VA + 8*_MAXNBPG)/* 64K long */ 172 #define IODEV_END 0x0f0000000UL /* 16 MB of iospace */ 173 174 /* 175 * Constants related to network buffer management. 176 * MCLBYTES must be no larger than NBPG (the software page size), and, 177 * on machines that exchange pages of input or output buffers with mbuf 178 * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple 179 * of the hardware page size. 180 */ 181 #define MSIZE 256 /* size of an mbuf */ 182 #define MCLSHIFT 11 /* log2(MCLBYTES) */ 183 #define MCLBYTES (1 << MCLSHIFT) /* enough for whole Ethernet packet */ 184 #define MCLOFSET (MCLBYTES - 1) 185 186 #ifndef NMBCLUSTERS 187 #ifdef GATEWAY 188 #define NMBCLUSTERS 2048 /* map size, max cluster allocation */ 189 #else 190 #define NMBCLUSTERS 1024 /* map size, max cluster allocation */ 191 #endif 192 #endif 193 194 #define MSGBUFSIZE NBPG 195 196 /* 197 * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized 198 * logical pages. 199 */ 200 #define NKMEMPAGES_MIN_DEFAULT ((6 * 1024 * 1024) >> PAGE_SHIFT) 201 #define NKMEMPAGES_MAX_DEFAULT ((128 * 1024 * 1024) >> PAGE_SHIFT) 202 203 /* pages ("clicks") to disk blocks */ 204 #define ctod(x) ((x) << (PGSHIFT - DEV_BSHIFT)) 205 #define dtoc(x) ((x) >> (PGSHIFT - DEV_BSHIFT)) 206 207 /* pages to bytes */ 208 #define ctob(x) ((x) << PGSHIFT) 209 #define btoc(x) (((vsize_t)(x) + PGOFSET) >> PGSHIFT) 210 211 /* bytes to disk blocks */ 212 #define btodb(x) ((x) >> DEV_BSHIFT) 213 #define dbtob(x) ((x) << DEV_BSHIFT) 214 215 /* 216 * Map a ``block device block'' to a file system block. 217 * This should be device dependent, and should use the bsize 218 * field from the disk label. 219 * For now though just use DEV_BSIZE. 220 */ 221 #define bdbtofsb(bn) ((bn) / (BLKDEV_IOSIZE / DEV_BSIZE)) 222 223 /* 224 * dvmamap manages a range of DVMA addresses intended to create double 225 * mappings of physical memory. In a way, `dvmamap' is a submap of the 226 * VM map `phys_map'. The difference is the use of the `resource map' 227 * routines to manage page allocation, allowing DVMA addresses to be 228 * allocated and freed from within interrupt routines. 229 * 230 * Note that `phys_map' can still be used to allocate memory-backed pages 231 * in DVMA space. 232 */ 233 #ifdef _KERNEL 234 #ifndef _LOCORE 235 236 extern void delay(unsigned int); 237 #define DELAY(n) delay(n) 238 239 #endif /* _LOCORE */ 240 #endif /* _KERNEL */ 241 242 /* 243 * Values for the cputyp variable. 244 */ 245 #define CPU_SUN4 0 246 #define CPU_SUN4C 1 247 #define CPU_SUN4M 2 248 #define CPU_SUN4U 3 249 250 /* 251 * Shorthand CPU-type macros. Enumerate all eight cases. 252 * Let compiler optimize away code conditional on constants. 253 * 254 * On a sun4 machine, the page size is 8192, while on a sun4c and sun4m 255 * it is 4096. Therefore, in the (SUN4 && (SUN4C || SUN4M)) cases below, 256 * NBPG, PGOFSET and PGSHIFT are defined as variables which are initialized 257 * early in locore.s after the machine type has been detected. 258 * 259 * Note that whenever the macros defined below evaluate to expressions 260 * involving variables, the kernel will perform slighly worse due to the 261 * extra memory references they'll generate. 262 */ 263 264 #define CPU_ISSUN4U (1) 265 #define CPU_ISSUN4MOR4U (1) 266 #define CPU_ISSUN4M (0) 267 #define CPU_ISSUN4C (0) 268 #define CPU_ISSUN4 (0) 269 #define CPU_ISSUN4OR4C (0) 270 #define CPU_ISSUN4COR4M (0) 271 #define NBPG 8192 /* bytes/page */ 272 #define PGOFSET (NBPG-1) /* byte offset into page */ 273 #define PGSHIFT 13 /* log2(NBPG) */ 274 275 #define PAGE_SHIFT 13 276 #define PAGE_SIZE (1 << PAGE_SHIFT) 277 #define PAGE_MASK (PAGE_SIZE - 1) 278 279 #endif /* _SPARC64_PARAM_H_ */ 280