xref: /openbsd-src/sys/arch/sparc64/include/param.h (revision d13be5d47e4149db2549a9828e244d59dbc43f15)
1 /*	$OpenBSD: param.h,v 1.36 2011/09/08 03:40:32 guenther Exp $	*/
2 /*	$NetBSD: param.h,v 1.25 2001/05/30 12:28:51 mrg Exp $ */
3 
4 /*
5  * Copyright (c) 1992, 1993
6  *	The Regents of the University of California.  All rights reserved.
7  *
8  * This software was developed by the Computer Systems Engineering group
9  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10  * contributed to Berkeley.
11  *
12  * All advertising materials mentioning features or use of this software
13  * must display the following acknowledgement:
14  *	This product includes software developed by the University of
15  *	California, Lawrence Berkeley Laboratory.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions
19  * are met:
20  * 1. Redistributions of source code must retain the above copyright
21  *    notice, this list of conditions and the following disclaimer.
22  * 2. Redistributions in binary form must reproduce the above copyright
23  *    notice, this list of conditions and the following disclaimer in the
24  *    documentation and/or other materials provided with the distribution.
25  * 3. Neither the name of the University nor the names of its contributors
26  *    may be used to endorse or promote products derived from this software
27  *    without specific prior written permission.
28  *
29  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39  * SUCH DAMAGE.
40  *
41  *	@(#)param.h	8.1 (Berkeley) 6/11/93
42  */
43 
44 /*
45  * Copyright (c) 1996-1999 Eduardo Horvath
46  *
47  * Redistribution and use in source and binary forms, with or without
48  * modification, are permitted provided that the following conditions
49  * are met:
50  * 1. Redistributions of source code must retain the above copyright
51  *    notice, this list of conditions and the following disclaimer.
52  *
53  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR  ``AS IS'' AND
54  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR  BE LIABLE
57  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
58  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
59  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
61  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
62  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63  * SUCH DAMAGE.
64  *
65  */
66 
67 #ifndef _MACHINE_PARAM_H_
68 #define _MACHINE_PARAM_H_
69 
70 #define	_MACHINE	sparc64
71 #define	MACHINE		"sparc64"
72 #define	_MACHINE_ARCH	sparc64
73 #define	MACHINE_ARCH	"sparc64"
74 #define	MID_MACHINE	MID_SPARC64
75 
76 #define	ALIGNBYTES		_ALIGNBYTES
77 #define	ALIGN(p)		_ALIGN(p)
78 #define	ALIGNED_POINTER(p,t)	_ALIGNED_POINTER(p,t)
79 
80 #define	DEV_BSHIFT	9		/* log2(DEV_BSIZE) */
81 #define	DEV_BSIZE	(1 << DEV_BSHIFT)
82 #define	BLKDEV_IOSIZE	2048
83 #define	MAXPHYS		(64 * 1024)
84 
85 /* We get stack overflows w/8K stacks in 64-bit mode */
86 #define	UPAGES		2		/* initial stack size in pages */
87 #define	USPACE		(UPAGES*8192)
88 #define	USPACE_ALIGN	(0)		/* u-area alignment 0-none */
89 
90 
91 /*
92  * Here are all the magic kernel virtual addresses and how they're allocated.
93  *
94  * First, the PROM is usually a fixed-sized block from 0x00000000f0000000 to
95  * 0x00000000f0100000.  It also uses some space around 0x00000000fff00000 to
96  * map in device registers.  The rest is pretty much ours to play with.
97  *
98  * The kernel starts at KERNBASE.  Here's the layout.  We use macros to set
99  * the addresses so we can relocate everything easily.  We use 4MB locked TTEs
100  * to map in the kernel text and data segments.  Any extra pages are recycled,
101  * so they can potentially be double-mapped.  This shouldn't really be a
102  * problem since they're unused, but wild pointers can cause silent data
103  * corruption if they are in those segments.
104  *
105  * 0x0000000000000000:	64K NFO page zero
106  * 0x0000000000010000:	Userland or PROM
107  * KERNBASE:		4MB kernel text and read only data
108  *				This is mapped in the ITLB and
109  *				Read-Only in the DTLB
110  * KERNBASE+0x400000:	4MB kernel data and BSS -- not in ITLB
111  *				Contains context table, kernel pmap,
112  *				and other important structures.
113  * KERNBASE+0x800000:	Unmapped page -- redzone
114  * KERNBASE+0x802000:	Process 0 stack and u-area
115  * KERNBASE+0x806000:	2 pages for pmap_copy_page and /dev/mem
116  * KERNBASE+0x80a000:	Start of kernel VA segment
117  * KERNEND:		End of kernel VA segment
118  * KERNEND+0x02000:	Auxreg_va (unused?)
119  * KERNEND+0x04000:	TMPMAP_VA (unused?)
120  * KERNEND+0x06000:	message buffer.
121  * KERNEND+0x010000:	64K locked TTE -- different for each CPU
122  *			Contains interrupt stack, cpu_info structure,
123  *			and 32KB kernel TSB.
124  *
125  */
126 #define	KERNBASE	0x001000000	/* start of kernel virtual space */
127 #define	KERNEND		0x0e0000000	/* end of kernel virtual space */
128 
129 #define _MAXNBPG	8192	/* fixed VAs, independent of actual NBPG */
130 
131 #define	AUXREG_VA	(      KERNEND + _MAXNBPG) /* 1 page REDZONE */
132 #define	TMPMAP_VA	(    AUXREG_VA + _MAXNBPG)
133 #define	MSGBUF_VA	(    TMPMAP_VA + _MAXNBPG)
134 /*
135  * Here's the location of the interrupt stack and CPU structure.
136  */
137 #define INTSTACK	(      KERNEND + 8*_MAXNBPG)/* 64K after kernel end */
138 #define	EINTSTACK	(     INTSTACK + 2*USPACE)	/* 32KB */
139 #define	CPUINFO_VA	(    EINTSTACK)
140 
141 /*
142  * Constants related to network buffer management.
143  */
144 #define	NMBCLUSTERS	4096		/* map size, max cluster allocation */
145 
146 #define MSGBUFSIZE	NBPG
147 
148 /*
149  * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized
150  * logical pages.
151  */
152 #define	NKMEMPAGES_MIN_DEFAULT	((8 * 1024 * 1024) >> PAGE_SHIFT)
153 #define	NKMEMPAGES_MAX_DEFAULT	((128 * 1024 * 1024) >> PAGE_SHIFT)
154 
155 /* pages ("clicks") to disk blocks */
156 #define	ctod(x)		((x) << (PGSHIFT - DEV_BSHIFT))
157 #define	dtoc(x)		((x) >> (PGSHIFT - DEV_BSHIFT))
158 
159 /* bytes to disk blocks */
160 #define	btodb(x)	((x) >> DEV_BSHIFT)
161 #define	dbtob(x)	((x) << DEV_BSHIFT)
162 
163 #ifdef _KERNEL
164 #ifndef _LOCORE
165 
166 extern void	delay(unsigned int);
167 #define	DELAY(n)	delay(n)
168 
169 extern int cputyp;
170 
171 #if defined (SUN4US) || defined (SUN4V)
172 #define CPU_ISSUN4U	(cputyp == CPU_SUN4U)
173 #define CPU_ISSUN4US	(cputyp == CPU_SUN4US)
174 #define CPU_ISSUN4V	(cputyp == CPU_SUN4V)
175 #else
176 #define CPU_ISSUN4U	(1)
177 #define CPU_ISSUN4US	(0)
178 #define CPU_ISSUN4V	(0)
179 #endif
180 
181 #endif /* _LOCORE */
182 #endif /* _KERNEL */
183 
184 /*
185  * Values for the cputyp variable.
186  */
187 #define CPU_SUN4	0
188 #define CPU_SUN4C	1
189 #define CPU_SUN4M	2
190 #define CPU_SUN4U	3
191 #define CPU_SUN4US	4
192 #define CPU_SUN4V	5
193 
194 /*
195  * On a sun4u machine, the page size is 8192.
196  */
197 
198 #define	NBPG		8192		/* bytes/page */
199 #define	PGOFSET		(NBPG-1)	/* byte offset into page */
200 #define	PGSHIFT		13		/* log2(NBPG) */
201 
202 #define PAGE_SHIFT	13
203 #define PAGE_SIZE	(1 << PAGE_SHIFT)
204 #define PAGE_MASK	(PAGE_SIZE - 1)
205 
206 #ifdef _KERNEL
207 #ifndef _LOCORE
208 #include <machine/cpu.h>
209 #endif
210 #endif
211 
212 #endif	/* _MACHINE_PARAM_H_ */
213