xref: /openbsd-src/sys/arch/sparc64/include/param.h (revision a28daedfc357b214be5c701aa8ba8adb29a7f1c2)
1 /*	$OpenBSD: param.h,v 1.31 2008/05/21 19:23:15 kettenis Exp $	*/
2 /*	$NetBSD: param.h,v 1.25 2001/05/30 12:28:51 mrg Exp $ */
3 
4 /*
5  * Copyright (c) 1992, 1993
6  *	The Regents of the University of California.  All rights reserved.
7  *
8  * This software was developed by the Computer Systems Engineering group
9  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10  * contributed to Berkeley.
11  *
12  * All advertising materials mentioning features or use of this software
13  * must display the following acknowledgement:
14  *	This product includes software developed by the University of
15  *	California, Lawrence Berkeley Laboratory.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions
19  * are met:
20  * 1. Redistributions of source code must retain the above copyright
21  *    notice, this list of conditions and the following disclaimer.
22  * 2. Redistributions in binary form must reproduce the above copyright
23  *    notice, this list of conditions and the following disclaimer in the
24  *    documentation and/or other materials provided with the distribution.
25  * 3. Neither the name of the University nor the names of its contributors
26  *    may be used to endorse or promote products derived from this software
27  *    without specific prior written permission.
28  *
29  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39  * SUCH DAMAGE.
40  *
41  *	@(#)param.h	8.1 (Berkeley) 6/11/93
42  */
43 
44 /*
45  * Copyright (c) 1996-1999 Eduardo Horvath
46  *
47  * Redistribution and use in source and binary forms, with or without
48  * modification, are permitted provided that the following conditions
49  * are met:
50  * 1. Redistributions of source code must retain the above copyright
51  *    notice, this list of conditions and the following disclaimer.
52  *
53  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR  ``AS IS'' AND
54  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR  BE LIABLE
57  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
58  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
59  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
61  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
62  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63  * SUCH DAMAGE.
64  *
65  */
66 
67 #ifndef _SPARC64_PARAM_H_
68 #define _SPARC64_PARAM_H_
69 
70 #define	_MACHINE	sparc64
71 #define	MACHINE		"sparc64"
72 #define	_MACHINE_ARCH	sparc64
73 #define	MACHINE_ARCH	"sparc64"
74 #define	MID_MACHINE	MID_SPARC64
75 
76 /*
77  * Round p (pointer or byte index) up to a correctly-aligned value for
78  * the machine's strictest data type.  The result is u_int and must be
79  * cast to any desired pointer type.
80  *
81  * ALIGNED_POINTER is a boolean macro that checks whether an address
82  * is valid to fetch data elements of type t from on this architecture.
83  * This does not reflect the optimal alignment, just the possibility
84  * (within reasonable limits).
85  *
86  */
87 #define	ALIGNBYTES		0xf
88 #define	ALIGN(p)		(((u_long)(p) + ALIGNBYTES) & ~ALIGNBYTES)
89 #define ALIGNED_POINTER(p,t)	((((u_long)(p)) & (sizeof(t)-1)) == 0)
90 
91 #define	DEV_BSHIFT	9		/* log2(DEV_BSIZE) */
92 #define	DEV_BSIZE	(1 << DEV_BSHIFT)
93 #define	BLKDEV_IOSIZE	2048
94 #define	MAXPHYS		(64 * 1024)
95 
96 /* We get stack overflows w/8K stacks in 64-bit mode */
97 #define	UPAGES		2		/* initial stack size in pages */
98 #define	USPACE		(UPAGES*8192)
99 #define	USPACE_ALIGN	(0)		/* u-area alignment 0-none */
100 
101 
102 /*
103  * Here are all the magic kernel virtual addresses and how they're allocated.
104  *
105  * First, the PROM is usually a fixed-sized block from 0x00000000f0000000 to
106  * 0x00000000f0100000.  It also uses some space around 0x00000000fff00000 to
107  * map in device registers.  The rest is pretty much ours to play with.
108  *
109  * The kernel starts at KERNBASE.  Here's the layout.  We use macros to set
110  * the addresses so we can relocate everything easily.  We use 4MB locked TTEs
111  * to map in the kernel text and data segments.  Any extra pages are recycled,
112  * so they can potentially be double-mapped.  This shouldn't really be a
113  * problem since they're unused, but wild pointers can cause silent data
114  * corruption if they are in those segments.
115  *
116  * 0x0000000000000000:	64K NFO page zero
117  * 0x0000000000010000:	Userland or PROM
118  * KERNBASE:		4MB kernel text and read only data
119  *				This is mapped in the ITLB and
120  *				Read-Only in the DTLB
121  * KERNBASE+0x400000:	4MB kernel data and BSS -- not in ITLB
122  *				Contains context table, kernel pmap,
123  *				and other important structures.
124  * KERNBASE+0x800000:	Unmapped page -- redzone
125  * KERNBASE+0x802000:	Process 0 stack and u-area
126  * KERNBASE+0x806000:	2 pages for pmap_copy_page and /dev/mem
127  * KERNBASE+0x80a000:	Start of kernel VA segment
128  * KERNEND:		End of kernel VA segment
129  * KERNEND+0x02000:	Auxreg_va (unused?)
130  * KERNEND+0x04000:	TMPMAP_VA (unused?)
131  * KERNEND+0x06000:	message buffer.
132  * KERNEND+0x010000:	64K locked TTE -- different for each CPU
133  *			Contains interrupt stack, cpu_info structure,
134  *			and 32KB kernel TSB.
135  *
136  */
137 #define	KERNBASE	0x001000000	/* start of kernel virtual space */
138 #define	KERNEND		0x0e0000000	/* end of kernel virtual space */
139 #define	VM_MAX_KERNEL_BUF	((KERNEND-KERNBASE)/4)
140 
141 #define _MAXNBPG	8192	/* fixed VAs, independent of actual NBPG */
142 
143 #define	AUXREG_VA	(      KERNEND + _MAXNBPG) /* 1 page REDZONE */
144 #define	TMPMAP_VA	(    AUXREG_VA + _MAXNBPG)
145 #define	MSGBUF_VA	(    TMPMAP_VA + _MAXNBPG)
146 /*
147  * Here's the location of the interrupt stack and CPU structure.
148  */
149 #define INTSTACK	(      KERNEND + 8*_MAXNBPG)/* 64K after kernel end */
150 #define	EINTSTACK	(     INTSTACK + 2*USPACE)	/* 32KB */
151 #define	CPUINFO_VA	(    EINTSTACK)
152 
153 /*
154  * Constants related to network buffer management.
155  */
156 #define	NMBCLUSTERS	4096		/* map size, max cluster allocation */
157 
158 #define MSGBUFSIZE	NBPG
159 
160 /*
161  * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized
162  * logical pages.
163  */
164 #define	NKMEMPAGES_MIN_DEFAULT	((8 * 1024 * 1024) >> PAGE_SHIFT)
165 #define	NKMEMPAGES_MAX_DEFAULT	((128 * 1024 * 1024) >> PAGE_SHIFT)
166 
167 /* pages ("clicks") to disk blocks */
168 #define	ctod(x)		((x) << (PGSHIFT - DEV_BSHIFT))
169 #define	dtoc(x)		((x) >> (PGSHIFT - DEV_BSHIFT))
170 
171 /* bytes to disk blocks */
172 #define	btodb(x)	((x) >> DEV_BSHIFT)
173 #define	dbtob(x)	((x) << DEV_BSHIFT)
174 
175 /*
176  * dvmamap manages a range of DVMA addresses intended to create double
177  * mappings of physical memory. In a way, `dvmamap' is a submap of the
178  * VM map `phys_map'. The difference is the use of the `resource map'
179  * routines to manage page allocation, allowing DVMA addresses to be
180  * allocated and freed from within interrupt routines.
181  *
182  * Note that `phys_map' can still be used to allocate memory-backed pages
183  * in DVMA space.
184  */
185 #ifdef _KERNEL
186 #ifndef _LOCORE
187 
188 extern void	delay(unsigned int);
189 #define	DELAY(n)	delay(n)
190 
191 extern int cputyp;
192 
193 #if defined (SUN4US) || defined (SUN4V)
194 #define CPU_ISSUN4U	(cputyp == CPU_SUN4U)
195 #define CPU_ISSUN4US	(cputyp == CPU_SUN4US)
196 #define CPU_ISSUN4V	(cputyp == CPU_SUN4V)
197 #else
198 #define CPU_ISSUN4U	(1)
199 #define CPU_ISSUN4US	(0)
200 #define CPU_ISSUN4V	(0)
201 #endif
202 
203 #endif /* _LOCORE */
204 #endif /* _KERNEL */
205 
206 /*
207  * Values for the cputyp variable.
208  */
209 #define CPU_SUN4	0
210 #define CPU_SUN4C	1
211 #define CPU_SUN4M	2
212 #define CPU_SUN4U	3
213 #define CPU_SUN4US	4
214 #define CPU_SUN4V	5
215 
216 /*
217  * On a sun4u machine, the page size is 8192.
218  */
219 
220 #define	NBPG		8192		/* bytes/page */
221 #define	PGOFSET		(NBPG-1)	/* byte offset into page */
222 #define	PGSHIFT		13		/* log2(NBPG) */
223 
224 #define PAGE_SHIFT	13
225 #define PAGE_SIZE	(1 << PAGE_SHIFT)
226 #define PAGE_MASK	(PAGE_SIZE - 1)
227 
228 #ifdef _KERNEL
229 #ifndef _LOCORE
230 #include <machine/cpu.h>
231 #endif
232 #endif
233 
234 #endif	/* _SPARC64_PARAM_H_ */
235