1 /* $OpenBSD: cpu.h,v 1.72 2009/03/26 17:24:33 oga Exp $ */ 2 /* $NetBSD: cpu.h,v 1.28 2001/06/14 22:56:58 thorpej Exp $ */ 3 4 /* 5 * Copyright (c) 1992, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This software was developed by the Computer Systems Engineering group 9 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 10 * contributed to Berkeley. 11 * 12 * All advertising materials mentioning features or use of this software 13 * must display the following acknowledgement: 14 * This product includes software developed by the University of 15 * California, Lawrence Berkeley Laboratory. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 42 */ 43 44 #ifndef _CPU_H_ 45 #define _CPU_H_ 46 47 /* 48 * CTL_MACHDEP definitions. 49 */ 50 #define CPU_LED_BLINK 2 /* int: blink leds? */ 51 #define CPU_ALLOWAPERTURE 3 /* allow xf86 operations */ 52 #define CPU_CPUTYPE 4 /* cpu type */ 53 #define CPU_CECCERRORS 5 /* Correctable ECC errors */ 54 #define CPU_CECCLAST 6 /* Correctable ECC last fault addr */ 55 #define CPU_KBDRESET 7 /* soft reset via keyboard */ 56 #define CPU_MAXID 8 /* number of valid machdep ids */ 57 58 #define CTL_MACHDEP_NAMES { \ 59 { 0, 0 }, \ 60 { 0, 0 }, \ 61 { "led_blink", CTLTYPE_INT }, \ 62 { "allowaperture", CTLTYPE_INT }, \ 63 { "cputype", CTLTYPE_INT }, \ 64 { "ceccerrs", CTLTYPE_INT }, \ 65 { "cecclast", CTLTYPE_QUAD }, \ 66 { "kbdreset", CTLTYPE_INT }, \ 67 } 68 69 #ifdef _KERNEL 70 /* 71 * Exported definitions unique to SPARC cpu support. 72 */ 73 74 #include <machine/ctlreg.h> 75 #include <machine/psl.h> 76 #include <machine/reg.h> 77 #include <machine/intr.h> 78 79 #include <sys/sched.h> 80 81 /* 82 * The cpu_info structure is part of a 64KB structure mapped both the kernel 83 * pmap and a single locked TTE a CPUINFO_VA for that particular processor. 84 * Each processor's cpu_info is accessible at CPUINFO_VA only for that 85 * processor. Other processors can access that through an additional mapping 86 * in the kernel pmap. 87 * 88 * The 64KB page contains: 89 * 90 * cpu_info 91 * interrupt stack (all remaining space) 92 * idle PCB 93 * idle stack (STACKSPACE - sizeof(PCB)) 94 * 32KB TSB 95 */ 96 97 struct cpu_info { 98 /* 99 * SPARC cpu_info structures live at two VAs: one global 100 * VA (so each CPU can access any other CPU's cpu_info) 101 * and an alias VA CPUINFO_VA which is the same on each 102 * CPU and maps to that CPU's cpu_info. Since the alias 103 * CPUINFO_VA is how we locate our cpu_info, we have to 104 * self-reference the global VA so that we can return it 105 * in the curcpu() macro. 106 */ 107 struct cpu_info * volatile ci_self; 108 109 /* Most important fields first */ 110 struct proc *ci_curproc; 111 struct pcb *ci_cpcb; /* also initial stack */ 112 struct cpu_info *ci_next; 113 114 struct proc *ci_fpproc; 115 int ci_number; 116 int ci_flags; 117 int ci_upaid; 118 #ifdef MULTIPROCESSOR 119 int ci_itid; 120 #endif 121 int ci_node; 122 u_int32_t ci_randseed; 123 struct schedstate_percpu ci_schedstate; /* scheduler state */ 124 125 int ci_want_resched; 126 int ci_handled_intr_level; 127 void *ci_intrpending[16][8]; 128 u_int64_t ci_tick; 129 struct intrhand ci_tickintr; 130 131 /* DEBUG/DIAGNOSTIC stuff */ 132 u_long ci_spin_locks; /* # of spin locks held */ 133 u_long ci_simple_locks;/* # of simple locks held */ 134 135 /* Spinning up the CPU */ 136 void (*ci_spinup)(void); /* spinup routine */ 137 void *ci_initstack; 138 paddr_t ci_paddr; /* Phys addr of this structure. */ 139 140 #ifdef SUN4V 141 struct rwindow64 ci_rw; 142 u_int64_t ci_rwsp; 143 144 paddr_t ci_mmfsa; 145 paddr_t ci_cpumq; 146 paddr_t ci_devmq; 147 148 paddr_t ci_cpuset; 149 paddr_t ci_mondo; 150 #endif 151 }; 152 153 #define CPUF_RUNNING 0x0001 /* CPU is running */ 154 155 extern struct cpu_info *cpus; 156 157 #define curpcb curcpu()->ci_cpcb 158 #define fpproc curcpu()->ci_fpproc 159 160 #ifdef MULTIPROCESSOR 161 162 #define cpu_number() (curcpu()->ci_number) 163 164 extern __inline struct cpu_info *curcpu(void); 165 extern __inline struct cpu_info * 166 curcpu(void) 167 { 168 struct cpu_info *ci; 169 170 __asm __volatile("mov %%g7, %0" : "=r"(ci)); 171 return (ci->ci_self); 172 } 173 174 #define CPU_IS_PRIMARY(ci) ((ci)->ci_number == 0) 175 #define CPU_INFO_ITERATOR int 176 #define CPU_INFO_FOREACH(cii, ci) \ 177 for (cii = 0, ci = cpus; ci != NULL; ci = ci->ci_next) 178 #define CPU_INFO_UNIT(ci) ((ci)->ci_number) 179 #define MAXCPUS 256 180 181 void cpu_boot_secondary_processors(void); 182 183 void sparc64_send_ipi(int, void (*)(void), u_int64_t, u_int64_t); 184 void sparc64_broadcast_ipi(void (*)(void), u_int64_t, u_int64_t); 185 186 void cpu_unidle(struct cpu_info *); 187 188 #else 189 190 #define cpu_number() 0 191 #define curcpu() ((struct cpu_info *)CPUINFO_VA) 192 193 #define CPU_IS_PRIMARY(ci) 1 194 #define CPU_INFO_ITERATOR int 195 #define CPU_INFO_FOREACH(cii, ci) \ 196 for (cii = 0, ci = curcpu(); ci != NULL; ci = NULL) 197 #define CPU_INFO_UNIT(ci) 0 198 #define MAXCPUS 1 199 200 #define cpu_unidle(ci) 201 202 #endif 203 204 /* 205 * Arguments to hardclock, softclock and gatherstats encapsulate the 206 * previous machine state in an opaque clockframe. The ipl is here 207 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 208 */ 209 struct clockframe { 210 struct trapframe64 t; 211 int saved_intr_level; 212 }; 213 214 #define CLKF_USERMODE(framep) (((framep)->t.tf_tstate & TSTATE_PRIV) == 0) 215 #define CLKF_PC(framep) ((framep)->t.tf_pc) 216 #define CLKF_INTR(framep) ((framep)->saved_intr_level != 0) 217 218 extern void (*cpu_start_clock)(void); 219 220 void setsoftnet(void); 221 222 #define aston(p) ((p)->p_md.md_astpending = 1) 223 224 /* 225 * Preempt the current process if in interrupt from user mode, 226 * or after the current trap/syscall if in system mode. 227 */ 228 extern void need_resched(struct cpu_info *); 229 #define clear_resched(ci) (ci)->ci_want_resched = 0 230 231 /* 232 * This is used during profiling to integrate system time. 233 */ 234 #define PROC_PC(p) ((p)->p_md.md_tf->tf_pc) 235 236 /* 237 * Give a profiling tick to the current process when the user profiling 238 * buffer pages are invalid. On the sparc, request an ast to send us 239 * through trap(), marking the proc as needing a profiling tick. 240 */ 241 #define need_proftick(p) aston(p) 242 243 void signotify(struct proc *); 244 245 /* cpu.c */ 246 int cpu_myid(void); 247 /* machdep.c */ 248 int ldcontrolb(caddr_t); 249 void dumpconf(void); 250 caddr_t reserve_dumppages(caddr_t); 251 /* clock.c */ 252 struct timeval; 253 int clockintr(void *);/* level 10 (clock) interrupt code */ 254 int statintr(void *); /* level 14 (statclock) interrupt code */ 255 /* locore.s */ 256 struct fpstate64; 257 void savefpstate(struct fpstate64 *); 258 void loadfpstate(struct fpstate64 *); 259 void clearfpstate(void); 260 u_int64_t probeget(paddr_t, int, int); 261 #define write_all_windows() __asm __volatile("flushw" : : ) 262 void write_user_windows(void); 263 void proc_trampoline(void); 264 struct pcb; 265 void snapshot(struct pcb *); 266 struct frame *getfp(void); 267 int xldcontrolb(caddr_t, struct pcb *); 268 void copywords(const void *, void *, size_t); 269 void qcopy(const void *, void *, size_t); 270 void qzero(void *, size_t); 271 void switchtoctx(int); 272 /* trap.c */ 273 void pmap_unuse_final(struct proc *); 274 int rwindow_save(struct proc *); 275 /* vm_machdep.c */ 276 void fpusave_cpu(struct cpu_info *, int); 277 void fpusave_proc(struct proc *, int); 278 /* cons.c */ 279 int cnrom(void); 280 /* zs.c */ 281 void zsconsole(struct tty *, int, int, void (**)(struct tty *, int)); 282 /* fb.c */ 283 void fb_unblank(void); 284 /* tda.c */ 285 void tda_full_blast(void); 286 /* emul.c */ 287 int fixalign(struct proc *, struct trapframe64 *); 288 int emulinstr(vaddr_t, struct trapframe64 *); 289 int emul_qf(int32_t, struct proc *, union sigval, struct trapframe64 *); 290 int emul_popc(int32_t, struct proc *, union sigval, struct trapframe64 *); 291 292 /* 293 * 294 * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits 295 * of the trap vector table. The next eight bits are supplied by the 296 * hardware when the trap occurs, and the bottom four bits are always 297 * zero (so that we can shove up to 16 bytes of executable code---exactly 298 * four instructions---into each trap vector). 299 * 300 * The hardware allocates half the trap vectors to hardware and half to 301 * software. 302 * 303 * Traps have priorities assigned (lower number => higher priority). 304 */ 305 306 struct trapvec { 307 int tv_instr[8]; /* the eight instructions */ 308 }; 309 extern struct trapvec trapbase[]; /* the 256 vectors */ 310 311 extern void wzero(void *, u_int); 312 extern void wcopy(const void *, void *, u_int); 313 314 struct blink_led { 315 void (*bl_func)(void *, int); 316 void *bl_arg; 317 SLIST_ENTRY(blink_led) bl_next; 318 }; 319 320 extern void blink_led_register(struct blink_led *); 321 322 #ifdef MULTIPROCESSOR 323 #include <sys/mplock.h> 324 #endif 325 326 #endif /* _KERNEL */ 327 #endif /* _CPU_H_ */ 328