1 /* $OpenBSD: vpci.c,v 1.11 2011/07/25 20:56:02 kettenis Exp $ */ 2 /* 3 * Copyright (c) 2008 Mark Kettenis <kettenis@openbsd.org> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <sys/param.h> 19 #include <sys/device.h> 20 #include <sys/errno.h> 21 #include <sys/malloc.h> 22 #include <sys/systm.h> 23 24 #include <uvm/uvm_extern.h> 25 26 #define _SPARC_BUS_DMA_PRIVATE 27 #include <machine/bus.h> 28 #include <machine/autoconf.h> 29 #include <machine/hypervisor.h> 30 #include <machine/openfirm.h> 31 32 #include <dev/pci/pcivar.h> 33 #include <dev/pci/pcireg.h> 34 35 #include <sparc64/dev/viommuvar.h> 36 #include <sparc64/dev/msivar.h> 37 38 extern struct sparc_pci_chipset _sparc_pci_chipset; 39 40 struct vpci_msi_msg { 41 uint32_t mm_version; 42 uint8_t mm_reserved[3]; 43 uint8_t mm_type; 44 uint64_t mm_sysino; 45 uint64_t mm_reserved1; 46 uint64_t mm_stick; 47 uint16_t mm_reserved2[3]; 48 uint16_t mm_reqid; 49 uint64_t mm_addr; 50 uint64_t mm_data; 51 uint64_t mm_reserved3; 52 }; 53 54 struct vpci_range { 55 u_int32_t cspace; 56 u_int32_t child_hi; 57 u_int32_t child_lo; 58 u_int32_t phys_hi; 59 u_int32_t phys_lo; 60 u_int32_t size_hi; 61 u_int32_t size_lo; 62 }; 63 64 struct vpci_pbm { 65 struct vpci_softc *vp_sc; 66 uint64_t vp_devhandle; 67 68 struct vpci_range *vp_range; 69 pci_chipset_tag_t vp_pc; 70 int vp_nrange; 71 72 bus_space_tag_t vp_memt; 73 bus_space_tag_t vp_iot; 74 bus_dma_tag_t vp_dmat; 75 struct iommu_state vp_is; 76 77 struct msi_eq *vp_meq; 78 bus_addr_t vp_msiaddr; 79 int vp_msinum; 80 struct intrhand **vp_msi; 81 82 int vp_flags; 83 }; 84 85 struct vpci_softc { 86 struct device sc_dv; 87 bus_dma_tag_t sc_dmat; 88 bus_space_tag_t sc_bust; 89 int sc_node; 90 }; 91 92 int vpci_match(struct device *, void *, void *); 93 void vpci_attach(struct device *, struct device *, void *); 94 void vpci_init_iommu(struct vpci_softc *, struct vpci_pbm *); 95 void vpci_init_msi(struct vpci_softc *, struct vpci_pbm *); 96 int vpci_print(void *, const char *); 97 98 pci_chipset_tag_t vpci_alloc_chipset(struct vpci_pbm *, int, 99 pci_chipset_tag_t); 100 bus_space_tag_t vpci_alloc_mem_tag(struct vpci_pbm *); 101 bus_space_tag_t vpci_alloc_io_tag(struct vpci_pbm *); 102 bus_space_tag_t vpci_alloc_bus_tag(struct vpci_pbm *, const char *, 103 int, int, int); 104 bus_dma_tag_t vpci_alloc_dma_tag(struct vpci_pbm *); 105 106 int vpci_conf_size(pci_chipset_tag_t, pcitag_t); 107 pcireg_t vpci_conf_read(pci_chipset_tag_t, pcitag_t, int); 108 void vpci_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 109 110 int vpci_intr_map(struct pci_attach_args *, pci_intr_handle_t *); 111 int vpci_bus_map(bus_space_tag_t, bus_space_tag_t, bus_addr_t, 112 bus_size_t, int, bus_space_handle_t *); 113 paddr_t vpci_bus_mmap(bus_space_tag_t, bus_space_tag_t, bus_addr_t, off_t, 114 int, int); 115 void *vpci_intr_establish(bus_space_tag_t, bus_space_tag_t, int, int, int, 116 int (*)(void *), void *, const char *); 117 void vpci_intr_ack(struct intrhand *); 118 void vpci_msi_ack(struct intrhand *); 119 120 int vpci_msi_eq_intr(void *); 121 122 int vpci_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, bus_size_t, int, 123 bus_size_t, bus_size_t, int, bus_dmamap_t *); 124 void vpci_dmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 125 int vpci_dmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 126 void *, bus_size_t, struct proc *, int); 127 void vpci_dmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 128 int vpci_dmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, bus_size_t, 129 bus_size_t, bus_size_t, bus_dma_segment_t *, int, int *, int); 130 int vpci_dmamem_map(bus_dma_tag_t, bus_dma_tag_t, bus_dma_segment_t *, 131 int, size_t, caddr_t *, int); 132 void vpci_dmamem_unmap(bus_dma_tag_t, bus_dma_tag_t, caddr_t, size_t); 133 134 int 135 vpci_match(struct device *parent, void *match, void *aux) 136 { 137 struct mainbus_attach_args *ma = aux; 138 char compat[32]; 139 140 if (strcmp(ma->ma_name, "pci") != 0) 141 return (0); 142 143 if (OF_getprop(ma->ma_node, "compatible", compat, sizeof(compat)) == -1) 144 return (0); 145 146 if (strcmp(compat, "SUNW,sun4v-pci") == 0) 147 return (1); 148 149 return (0); 150 } 151 152 void 153 vpci_attach(struct device *parent, struct device *self, void *aux) 154 { 155 struct vpci_softc *sc = (struct vpci_softc *)self; 156 struct mainbus_attach_args *ma = aux; 157 struct pcibus_attach_args pba; 158 struct vpci_pbm *pbm; 159 int *busranges = NULL, nranges; 160 161 sc->sc_dmat = ma->ma_dmatag; 162 sc->sc_bust = ma->ma_bustag; 163 sc->sc_node = ma->ma_node; 164 165 pbm = malloc(sizeof(*pbm), M_DEVBUF, M_NOWAIT | M_ZERO); 166 if (pbm == NULL) 167 panic("vpci: can't alloc vpci pbm"); 168 169 pbm->vp_sc = sc; 170 pbm->vp_devhandle = (ma->ma_reg[0].ur_paddr >> 32) & 0x0fffffff; 171 172 if (getprop(ma->ma_node, "ranges", sizeof(struct vpci_range), 173 &pbm->vp_nrange, (void **)&pbm->vp_range)) 174 panic("vpci: can't get ranges"); 175 176 if (getprop(ma->ma_node, "bus-range", sizeof(int), &nranges, 177 (void **)&busranges)) 178 panic("vpci: can't get bus-range"); 179 180 printf(": bus %d to %d, ", busranges[0], busranges[1]); 181 182 pbm->vp_memt = vpci_alloc_mem_tag(pbm); 183 pbm->vp_iot = vpci_alloc_io_tag(pbm); 184 pbm->vp_dmat = vpci_alloc_dma_tag(pbm); 185 186 pbm->vp_pc = vpci_alloc_chipset(pbm, ma->ma_node, &_sparc_pci_chipset); 187 pbm->vp_pc->bustag = pbm->vp_memt; 188 189 vpci_init_iommu(sc, pbm); 190 vpci_init_msi(sc, pbm); 191 192 bzero(&pba, sizeof(pba)); 193 pba.pba_busname = "pci"; 194 pba.pba_domain = pci_ndomains++; 195 pba.pba_bus = busranges[0]; 196 pba.pba_pc = pbm->vp_pc; 197 pba.pba_flags = pbm->vp_flags; 198 pba.pba_dmat = pbm->vp_dmat; 199 pba.pba_memt = pbm->vp_memt; 200 pba.pba_iot = pbm->vp_iot; 201 pba.pba_pc->conf_size = vpci_conf_size; 202 pba.pba_pc->conf_read = vpci_conf_read; 203 pba.pba_pc->conf_write = vpci_conf_write; 204 pba.pba_pc->intr_map = vpci_intr_map; 205 206 free(busranges, M_DEVBUF); 207 208 config_found(&sc->sc_dv, &pba, vpci_print); 209 } 210 211 void 212 vpci_init_iommu(struct vpci_softc *sc, struct vpci_pbm *pbm) 213 { 214 struct iommu_state *is = &pbm->vp_is; 215 int tsbsize = 8; 216 u_int32_t iobase = 0x80000000; 217 char *name; 218 219 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 220 if (name == NULL) 221 panic("couldn't malloc iommu name"); 222 snprintf(name, 32, "%s dvma", sc->sc_dv.dv_xname); 223 224 viommu_init(name, is, tsbsize, iobase); 225 is->is_devhandle = pbm->vp_devhandle; 226 } 227 228 void 229 vpci_init_msi(struct vpci_softc *sc, struct vpci_pbm *pbm) 230 { 231 u_int32_t msi_addr_range[3]; 232 u_int32_t msi_eq_devino[3] = { 0, 36, 24 }; 233 uint64_t sysino; 234 int msis, msi_eq_size; 235 int64_t err; 236 237 if (OF_getprop(sc->sc_node, "msi-address-ranges", 238 msi_addr_range, sizeof(msi_addr_range)) <= 0) 239 return; 240 pbm->vp_msiaddr = msi_addr_range[1]; 241 pbm->vp_msiaddr |= ((bus_addr_t)msi_addr_range[0]) << 32; 242 243 msis = getpropint(sc->sc_node, "#msi", 256); 244 pbm->vp_msi = malloc(msis * sizeof(*pbm->vp_msi), 245 M_DEVBUF, M_NOWAIT | M_ZERO); 246 if (pbm->vp_msi == NULL) 247 return; 248 249 msi_eq_size = getpropint(sc->sc_node, "msi-eq-size", 256); 250 pbm->vp_meq = msi_eq_alloc(sc->sc_dmat, msi_eq_size); 251 if (pbm->vp_meq == NULL) 252 goto free_table; 253 254 err = hv_pci_msiq_conf(pbm->vp_devhandle, 0, 255 pbm->vp_meq->meq_map->dm_segs[0].ds_addr, 256 pbm->vp_meq->meq_nentries); 257 if (err != H_EOK) 258 goto free_queue; 259 260 OF_getprop(sc->sc_node, "msi-eq-to-devino", 261 msi_eq_devino, sizeof(msi_eq_devino)); 262 err = hv_intr_devino_to_sysino(pbm->vp_devhandle, 263 msi_eq_devino[2], &sysino); 264 if (err != H_EOK) 265 goto disable_queue; 266 267 if (vpci_intr_establish(sc->sc_bust, sc->sc_bust, sysino, 268 IPL_HIGH, 0, vpci_msi_eq_intr, pbm, sc->sc_dv.dv_xname) == NULL) 269 goto disable_queue; 270 271 err = hv_pci_msiq_setvalid(pbm->vp_devhandle, 0, PCI_MSIQ_VALID); 272 if (err != H_EOK) 273 panic("vpci: can't enable msi eq"); 274 275 #ifdef notyet 276 pbm->vp_flags |= PCI_FLAGS_MSI_ENABLED; 277 #endif 278 return; 279 280 disable_queue: 281 hv_pci_msiq_conf(pbm->vp_devhandle, 0, 0, 0); 282 free_queue: 283 msi_eq_free(sc->sc_dmat, pbm->vp_meq); 284 free_table: 285 free(pbm->vp_msi, M_DEVBUF); 286 } 287 288 int 289 vpci_print(void *aux, const char *p) 290 { 291 if (p == NULL) 292 return (UNCONF); 293 return (QUIET); 294 } 295 296 int 297 vpci_conf_size(pci_chipset_tag_t pc, pcitag_t tag) 298 { 299 return PCIE_CONFIG_SPACE_SIZE; 300 } 301 302 pcireg_t 303 vpci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 304 { 305 struct vpci_pbm *pbm = pc->cookie; 306 uint64_t error_flag, data; 307 308 hv_pci_config_get(pbm->vp_devhandle, PCITAG_OFFSET(tag), reg, 4, 309 &error_flag, &data); 310 311 return (error_flag ? (pcireg_t)~0 : data); 312 } 313 314 void 315 vpci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 316 { 317 struct vpci_pbm *pbm = pc->cookie; 318 uint64_t error_flag; 319 320 hv_pci_config_put(pbm->vp_devhandle, PCITAG_OFFSET(tag), reg, 4, 321 data, &error_flag); 322 } 323 324 /* 325 * Bus-specific interrupt mapping 326 */ 327 int 328 vpci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 329 { 330 struct vpci_pbm *pbm = pa->pa_pc->cookie; 331 uint64_t devhandle = pbm->vp_devhandle; 332 uint64_t devino = INTINO(*ihp); 333 uint64_t sysino; 334 int err; 335 336 if (*ihp != (pci_intr_handle_t)-1) { 337 err = hv_intr_devino_to_sysino(devhandle, devino, &sysino); 338 if (err != H_EOK) 339 return (-1); 340 341 KASSERT(sysino == INTVEC(sysino)); 342 *ihp = sysino; 343 return (0); 344 } 345 346 return (-1); 347 } 348 349 bus_space_tag_t 350 vpci_alloc_mem_tag(struct vpci_pbm *pp) 351 { 352 return (vpci_alloc_bus_tag(pp, "mem", 353 0x02, /* 32-bit mem space (where's the #define???) */ 354 ASI_PRIMARY, ASI_PRIMARY_LITTLE)); 355 } 356 357 bus_space_tag_t 358 vpci_alloc_io_tag(struct vpci_pbm *pp) 359 { 360 return (vpci_alloc_bus_tag(pp, "io", 361 0x01, /* IO space (where's the #define???) */ 362 ASI_PRIMARY, ASI_PRIMARY_LITTLE)); 363 } 364 365 bus_space_tag_t 366 vpci_alloc_bus_tag(struct vpci_pbm *pbm, const char *name, int ss, 367 int asi, int sasi) 368 { 369 struct vpci_softc *sc = pbm->vp_sc; 370 struct sparc_bus_space_tag *bt; 371 372 bt = malloc(sizeof(*bt), M_DEVBUF, M_NOWAIT | M_ZERO); 373 if (bt == NULL) 374 panic("vpci: could not allocate bus tag"); 375 376 snprintf(bt->name, sizeof(bt->name), "%s-pbm_%s(%d/%2.2x)", 377 sc->sc_dv.dv_xname, name, ss, asi); 378 379 bt->cookie = pbm; 380 bt->parent = sc->sc_bust; 381 bt->default_type = ss; 382 bt->asi = asi; 383 bt->sasi = sasi; 384 bt->sparc_bus_map = vpci_bus_map; 385 bt->sparc_bus_mmap = vpci_bus_mmap; 386 bt->sparc_intr_establish = vpci_intr_establish; 387 return (bt); 388 } 389 390 bus_dma_tag_t 391 vpci_alloc_dma_tag(struct vpci_pbm *pbm) 392 { 393 struct vpci_softc *sc = pbm->vp_sc; 394 bus_dma_tag_t dt, pdt = sc->sc_dmat; 395 396 dt = malloc(sizeof(*dt), M_DEVBUF, M_NOWAIT | M_ZERO); 397 if (dt == NULL) 398 panic("vpci: could not alloc dma tag"); 399 400 dt->_cookie = pbm; 401 dt->_parent = pdt; 402 dt->_dmamap_create = vpci_dmamap_create; 403 dt->_dmamap_destroy = viommu_dvmamap_destroy; 404 dt->_dmamap_load = viommu_dvmamap_load; 405 dt->_dmamap_load_raw = viommu_dvmamap_load_raw; 406 dt->_dmamap_unload = viommu_dvmamap_unload; 407 dt->_dmamap_sync = viommu_dvmamap_sync; 408 dt->_dmamem_alloc = viommu_dvmamem_alloc; 409 dt->_dmamem_free = viommu_dvmamem_free; 410 return (dt); 411 } 412 413 pci_chipset_tag_t 414 vpci_alloc_chipset(struct vpci_pbm *pbm, int node, pci_chipset_tag_t pc) 415 { 416 pci_chipset_tag_t npc; 417 418 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 419 if (npc == NULL) 420 panic("vpci: could not allocate pci_chipset_tag_t"); 421 memcpy(npc, pc, sizeof *pc); 422 npc->cookie = pbm; 423 npc->rootnode = node; 424 return (npc); 425 } 426 427 #define BUS_DMA_FIND_PARENT(t, fn) \ 428 if (t->_parent == NULL) \ 429 panic("null bus_dma parent (" #fn ")"); \ 430 for (t = t->_parent; t->fn == NULL; t = t->_parent) \ 431 if (t->_parent == NULL) \ 432 panic("no bus_dma " #fn " located"); 433 434 int 435 vpci_dmamap_create(bus_dma_tag_t t, bus_dma_tag_t t0, bus_size_t size, 436 int nsegments, bus_size_t maxsegsz, bus_size_t boundary, int flags, 437 bus_dmamap_t *dmamap) 438 { 439 struct vpci_pbm *vp = t->_cookie; 440 441 return (viommu_dvmamap_create(t, t0, &vp->vp_is, size, nsegments, 442 maxsegsz, boundary, flags, dmamap)); 443 } 444 445 int 446 vpci_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset, 447 bus_size_t size, int flags, bus_space_handle_t *hp) 448 { 449 struct vpci_pbm *pbm = t->cookie; 450 int i, ss = t->default_type; 451 452 if (t->parent == 0 || t->parent->sparc_bus_map == 0) 453 panic("vpci_bus_map: invalid parent"); 454 455 if (flags & BUS_SPACE_MAP_PROMADDRESS) { 456 return ((*t->parent->sparc_bus_map) 457 (t, t0, offset, size, flags, hp)); 458 } 459 460 for (i = 0; i < pbm->vp_nrange; i++) { 461 bus_addr_t paddr; 462 463 if (((pbm->vp_range[i].cspace >> 24) & 0x03) != ss) 464 continue; 465 466 paddr = pbm->vp_range[i].phys_lo + offset; 467 paddr |= ((bus_addr_t)pbm->vp_range[i].phys_hi) << 32; 468 return ((*t->parent->sparc_bus_map) 469 (t, t0, paddr, size, flags, hp)); 470 } 471 472 return (EINVAL); 473 } 474 475 paddr_t 476 vpci_bus_mmap(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t paddr, 477 off_t off, int prot, int flags) 478 { 479 bus_addr_t offset = paddr; 480 struct vpci_pbm *pbm = t->cookie; 481 int i, ss = t->default_type; 482 483 if (t->parent == 0 || t->parent->sparc_bus_mmap == 0) 484 panic("vpci_bus_mmap: invalid parent"); 485 486 for (i = 0; i < pbm->vp_nrange; i++) { 487 bus_addr_t paddr; 488 489 if (((pbm->vp_range[i].cspace >> 24) & 0x03) != ss) 490 continue; 491 492 paddr = pbm->vp_range[i].phys_lo + offset; 493 paddr |= ((bus_addr_t)pbm->vp_range[i].phys_hi) << 32; 494 return ((*t->parent->sparc_bus_mmap) 495 (t, t0, paddr, off, prot, flags)); 496 } 497 498 return (-1); 499 } 500 501 void * 502 vpci_intr_establish(bus_space_tag_t t, bus_space_tag_t t0, int ihandle, 503 int level, int flags, int (*handler)(void *), void *arg, const char *what) 504 { 505 struct vpci_pbm *pbm = t->cookie; 506 uint64_t sysino = INTVEC(ihandle); 507 struct intrhand *ih; 508 int err; 509 510 ih = bus_intr_allocate(t0, handler, arg, ihandle, level, 511 NULL, NULL, what); 512 if (ih == NULL) 513 return (NULL); 514 515 if (ihandle & PCI_INTR_MSI) { 516 pci_chipset_tag_t pc = pbm->vp_pc; 517 pcitag_t tag = ihandle & ~PCI_INTR_MSI; 518 int msinum = pbm->vp_msinum++; 519 520 if (ih->ih_name) 521 evcount_attach(&ih->ih_count, ih->ih_name, NULL); 522 else 523 evcount_attach(&ih->ih_count, "unknown", NULL); 524 525 ih->ih_ack = vpci_msi_ack; 526 527 pbm->vp_msi[msinum] = ih; 528 ih->ih_number = msinum; 529 530 pci_msi_enable(pc, tag, pbm->vp_msiaddr, msinum); 531 532 err = hv_pci_msi_setmsiq(pbm->vp_devhandle, msinum, 0, 0); 533 if (err != H_EOK) { 534 printf("pci_msi_setmsiq: err %ld\n", err); 535 return (NULL); 536 } 537 538 err = hv_pci_msi_setvalid(pbm->vp_devhandle, msinum, PCI_MSI_VALID); 539 if (err != H_EOK) { 540 printf("pci_msi_setvalid: err %ld\n", err); 541 return (NULL); 542 } 543 544 return (ih); 545 } 546 547 intr_establish(ih->ih_pil, ih); 548 ih->ih_ack = vpci_intr_ack; 549 550 err = hv_intr_settarget(sysino, cpus->ci_upaid); 551 if (err != H_EOK) 552 return (NULL); 553 554 /* Clear pending interrupts. */ 555 err = hv_intr_setstate(sysino, INTR_IDLE); 556 if (err != H_EOK) 557 return (NULL); 558 559 err = hv_intr_setenabled(sysino, INTR_ENABLED); 560 if (err != H_EOK) 561 return (NULL); 562 563 return (ih); 564 } 565 566 void 567 vpci_intr_ack(struct intrhand *ih) 568 { 569 hv_intr_setstate(ih->ih_number, INTR_IDLE); 570 } 571 572 void 573 vpci_msi_ack(struct intrhand *ih) 574 { 575 } 576 577 int 578 vpci_msi_eq_intr(void *arg) 579 { 580 struct vpci_pbm *pbm = arg; 581 struct msi_eq *meq = pbm->vp_meq; 582 struct vpci_msi_msg *msg; 583 uint64_t head, tail; 584 struct intrhand *ih; 585 int err; 586 587 err = hv_pci_msiq_gethead(pbm->vp_devhandle, 0, &head); 588 if (err != H_EOK) 589 printf("%s: hv_pci_msiq_gethead: %d\n", __func__, err); 590 591 err = hv_pci_msiq_gettail(pbm->vp_devhandle, 0, &tail); 592 if (err != H_EOK) 593 printf("%s: hv_pci_msiq_gettail: %d\n", __func__, err); 594 595 if (head == tail) 596 return (0); 597 598 while (head != tail) { 599 msg = (struct vpci_msi_msg *)(meq->meq_va + head); 600 ih = pbm->vp_msi[msg->mm_data]; 601 err = hv_pci_msi_setstate(pbm->vp_devhandle, 602 msg->mm_data, PCI_MSISTATE_IDLE); 603 if (err != H_EOK) 604 printf("%s: hv_pci_msiq_setstate: %d\n", __func__, err); 605 606 send_softint(-1, ih->ih_pil, ih); 607 608 head += sizeof(struct vpci_msi_msg); 609 head &= ((meq->meq_nentries * sizeof(struct vpci_msi_msg)) - 1); 610 } 611 612 err = hv_pci_msiq_sethead(pbm->vp_devhandle, 0, head); 613 if (err != H_EOK) 614 printf("%s: pci_msiq_sethead: %d\n", __func__, err); 615 616 return (1); 617 } 618 619 const struct cfattach vpci_ca = { 620 sizeof(struct vpci_softc), vpci_match, vpci_attach 621 }; 622 623 struct cfdriver vpci_cd = { 624 NULL, "vpci", DV_DULL 625 }; 626