1 /* $OpenBSD: pyro.c,v 1.18 2009/03/29 22:52:11 kettenis Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Jason L. Wright (jason@thought.net) 5 * Copyright (c) 2003 Henric Jungheim 6 * Copyright (c) 2007 Mark Kettenis 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 27 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <sys/param.h> 32 #include <sys/device.h> 33 #include <sys/errno.h> 34 #include <sys/malloc.h> 35 #include <sys/systm.h> 36 37 #define _SPARC_BUS_DMA_PRIVATE 38 #include <machine/bus.h> 39 #include <machine/autoconf.h> 40 41 #ifdef DDB 42 #include <machine/db_machdep.h> 43 #endif 44 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pcireg.h> 47 48 #include <sparc64/dev/iommureg.h> 49 #include <sparc64/dev/iommuvar.h> 50 #include <sparc64/dev/pyrovar.h> 51 52 #ifdef DEBUG 53 #define PDB_PROM 0x01 54 #define PDB_BUSMAP 0x02 55 #define PDB_INTR 0x04 56 #define PDB_CONF 0x08 57 int pyro_debug = ~0; 58 #define DPRINTF(l, s) do { if (pyro_debug & l) printf s; } while (0) 59 #else 60 #define DPRINTF(l, s) 61 #endif 62 63 #define FIRE_RESET_GEN 0x7010 64 65 #define FIRE_RESET_GEN_XIR 0x0000000000000002L 66 67 #define FIRE_INTRMAP_INT_CNTRL_NUM_MASK 0x000003c0 68 #define FIRE_INTRMAP_INT_CNTRL_NUM0 0x00000040 69 #define FIRE_INTRMAP_INT_CNTRL_NUM1 0x00000080 70 #define FIRE_INTRMAP_INT_CNTRL_NUM2 0x00000100 71 #define FIRE_INTRMAP_INT_CNTRL_NUM3 0x00000200 72 #define FIRE_INTRMAP_T_JPID_SHIFT 26 73 #define FIRE_INTRMAP_T_JPID_MASK 0x7c000000 74 75 #define OBERON_INTRMAP_T_DESTID_SHIFT 21 76 #define OBERON_INTRMAP_T_DESTID_MASK 0x7fe00000 77 78 extern struct sparc_pci_chipset _sparc_pci_chipset; 79 80 int pyro_match(struct device *, void *, void *); 81 void pyro_attach(struct device *, struct device *, void *); 82 void pyro_init(struct pyro_softc *, int); 83 void pyro_init_iommu(struct pyro_softc *, struct pyro_pbm *); 84 int pyro_print(void *, const char *); 85 86 pci_chipset_tag_t pyro_alloc_chipset(struct pyro_pbm *, int, 87 pci_chipset_tag_t); 88 bus_space_tag_t pyro_alloc_mem_tag(struct pyro_pbm *); 89 bus_space_tag_t pyro_alloc_io_tag(struct pyro_pbm *); 90 bus_space_tag_t pyro_alloc_config_tag(struct pyro_pbm *); 91 bus_space_tag_t _pyro_alloc_bus_tag(struct pyro_pbm *, const char *, 92 int, int, int); 93 bus_dma_tag_t pyro_alloc_dma_tag(struct pyro_pbm *); 94 95 pcireg_t pyro_conf_read(pci_chipset_tag_t, pcitag_t, int); 96 void pyro_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 97 98 int pyro_intr_map(struct pci_attach_args *, pci_intr_handle_t *); 99 int _pyro_bus_map(bus_space_tag_t, bus_space_tag_t, bus_addr_t, 100 bus_size_t, int, bus_space_handle_t *); 101 paddr_t _pyro_bus_mmap(bus_space_tag_t, bus_space_tag_t, bus_addr_t, off_t, 102 int, int); 103 void *_pyro_intr_establish(bus_space_tag_t, bus_space_tag_t, int, int, int, 104 int (*)(void *), void *, const char *); 105 106 int pyro_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, bus_size_t, int, 107 bus_size_t, bus_size_t, int, bus_dmamap_t *); 108 109 #ifdef DDB 110 void pyro_xir(void *, int); 111 #endif 112 113 int 114 pyro_match(struct device *parent, void *match, void *aux) 115 { 116 struct mainbus_attach_args *ma = aux; 117 char *str; 118 119 if (strcmp(ma->ma_name, "pci") != 0) 120 return (0); 121 122 str = getpropstring(ma->ma_node, "compatible"); 123 if (strcmp(str, "pciex108e,80f0") == 0 || 124 strcmp(str, "pciex108e,80f8") == 0) 125 return (1); 126 127 return (0); 128 } 129 130 void 131 pyro_attach(struct device *parent, struct device *self, void *aux) 132 { 133 struct pyro_softc *sc = (struct pyro_softc *)self; 134 struct mainbus_attach_args *ma = aux; 135 char *str; 136 int busa; 137 138 sc->sc_node = ma->ma_node; 139 sc->sc_dmat = ma->ma_dmatag; 140 sc->sc_bust = ma->ma_bustag; 141 sc->sc_csr = ma->ma_reg[0].ur_paddr; 142 sc->sc_xbc = ma->ma_reg[1].ur_paddr; 143 sc->sc_ign = INTIGN(ma->ma_upaid << INTMAP_IGN_SHIFT); 144 145 if ((ma->ma_reg[0].ur_paddr & 0x00700000) == 0x00600000) 146 busa = 1; 147 else 148 busa = 0; 149 150 if (bus_space_map(sc->sc_bust, sc->sc_csr, 151 ma->ma_reg[0].ur_len, 0, &sc->sc_csrh)) { 152 printf(": failed to map csr registers\n"); 153 return; 154 } 155 156 if (bus_space_map(sc->sc_bust, sc->sc_xbc, 157 ma->ma_reg[1].ur_len, 0, &sc->sc_xbch)) { 158 printf(": failed to map xbc registers\n"); 159 return; 160 } 161 162 str = getpropstring(ma->ma_node, "compatible"); 163 if (strcmp(str, "pciex108e,80f8") == 0) 164 sc->sc_oberon = 1; 165 166 pyro_init(sc, busa); 167 } 168 169 void 170 pyro_init(struct pyro_softc *sc, int busa) 171 { 172 struct pyro_pbm *pbm; 173 struct pcibus_attach_args pba; 174 int *busranges = NULL, nranges; 175 176 pbm = malloc(sizeof(*pbm), M_DEVBUF, M_NOWAIT | M_ZERO); 177 if (pbm == NULL) 178 panic("pyro: can't alloc pyro pbm"); 179 180 pbm->pp_sc = sc; 181 pbm->pp_bus_a = busa; 182 183 if (getprop(sc->sc_node, "ranges", sizeof(struct pyro_range), 184 &pbm->pp_nrange, (void **)&pbm->pp_range)) 185 panic("pyro: can't get ranges"); 186 187 if (getprop(sc->sc_node, "bus-range", sizeof(int), &nranges, 188 (void **)&busranges)) 189 panic("pyro: can't get bus-range"); 190 191 printf(": \"%s\", rev %d, ign %x, bus %c %d to %d\n", 192 sc->sc_oberon ? "Oberon" : "Fire", 193 getpropint(sc->sc_node, "module-revision#", 0), sc->sc_ign, 194 busa ? 'A' : 'B', busranges[0], busranges[1]); 195 196 printf("%s: ", sc->sc_dv.dv_xname); 197 pyro_init_iommu(sc, pbm); 198 199 pbm->pp_memt = pyro_alloc_mem_tag(pbm); 200 pbm->pp_iot = pyro_alloc_io_tag(pbm); 201 pbm->pp_cfgt = pyro_alloc_config_tag(pbm); 202 pbm->pp_dmat = pyro_alloc_dma_tag(pbm); 203 204 if (bus_space_map(pbm->pp_cfgt, 0, 0x10000000, 0, &pbm->pp_cfgh)) 205 panic("pyro: can't map config space"); 206 207 pbm->pp_pc = pyro_alloc_chipset(pbm, sc->sc_node, &_sparc_pci_chipset); 208 209 pbm->pp_pc->bustag = pbm->pp_cfgt; 210 pbm->pp_pc->bushandle = pbm->pp_cfgh; 211 212 bzero(&pba, sizeof(pba)); 213 pba.pba_busname = "pci"; 214 pba.pba_domain = pci_ndomains++; 215 pba.pba_bus = busranges[0]; 216 pba.pba_pc = pbm->pp_pc; 217 #if 0 218 pba.pba_flags = pbm->pp_flags; 219 #endif 220 pba.pba_dmat = pbm->pp_dmat; 221 pba.pba_memt = pbm->pp_memt; 222 pba.pba_iot = pbm->pp_iot; 223 pba.pba_pc->conf_read = pyro_conf_read; 224 pba.pba_pc->conf_write = pyro_conf_write; 225 pba.pba_pc->intr_map = pyro_intr_map; 226 227 free(busranges, M_DEVBUF); 228 229 #ifdef DDB 230 db_register_xir(pyro_xir, sc); 231 #endif 232 233 config_found(&sc->sc_dv, &pba, pyro_print); 234 } 235 236 void 237 pyro_init_iommu(struct pyro_softc *sc, struct pyro_pbm *pbm) 238 { 239 struct iommu_state *is = &pbm->pp_is; 240 int tsbsize = 7; 241 u_int32_t iobase = -1; 242 char *name; 243 244 is->is_bustag = sc->sc_bust; 245 246 if (bus_space_subregion(is->is_bustag, sc->sc_csrh, 247 0x40000, 0x100, &is->is_iommu)) { 248 panic("pyro: unable to create iommu handle"); 249 } 250 251 is->is_sb[0] = &pbm->pp_sb; 252 is->is_sb[0]->sb_bustag = is->is_bustag; 253 254 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 255 if (name == NULL) 256 panic("couldn't malloc iommu name"); 257 snprintf(name, 32, "%s dvma", sc->sc_dv.dv_xname); 258 259 /* On Oberon, we need to flush the cache. */ 260 if (sc->sc_oberon) 261 is->is_flags |= IOMMU_FLUSH_CACHE; 262 263 iommu_init(name, is, tsbsize, iobase); 264 } 265 266 int 267 pyro_print(void *aux, const char *p) 268 { 269 if (p == NULL) 270 return (UNCONF); 271 return (QUIET); 272 } 273 274 pcireg_t 275 pyro_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 276 { 277 return (bus_space_read_4(pc->bustag, pc->bushandle, 278 (PCITAG_OFFSET(tag) << 4) + reg)); 279 } 280 281 void 282 pyro_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 283 { 284 bus_space_write_4(pc->bustag, pc->bushandle, 285 (PCITAG_OFFSET(tag) << 4) + reg, data); 286 } 287 288 /* 289 * Bus-specific interrupt mapping 290 */ 291 int 292 pyro_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 293 { 294 struct pyro_pbm *pp = pa->pa_pc->cookie; 295 struct pyro_softc *sc = pp->pp_sc; 296 u_int dev; 297 298 if (*ihp != (pci_intr_handle_t)-1) { 299 *ihp |= sc->sc_ign; 300 return (0); 301 } 302 303 /* 304 * We didn't find a PROM mapping for this interrupt. Try to 305 * construct one ourselves based on the swizzled interrupt pin 306 * and the interrupt mapping for PCI slots documented in the 307 * UltraSPARC-IIi User's Manual. 308 */ 309 310 if (pa->pa_intrpin == 0) 311 return (-1); 312 313 /* 314 * This deserves some documentation. Should anyone 315 * have anything official looking, please speak up. 316 */ 317 dev = pa->pa_device - 1; 318 319 *ihp = (pa->pa_intrpin - 1) & INTMAP_PCIINT; 320 *ihp |= (dev << 2) & INTMAP_PCISLOT; 321 *ihp |= sc->sc_ign; 322 323 return (0); 324 } 325 326 bus_space_tag_t 327 pyro_alloc_mem_tag(struct pyro_pbm *pp) 328 { 329 return (_pyro_alloc_bus_tag(pp, "mem", 330 0x02, /* 32-bit mem space (where's the #define???) */ 331 ASI_PRIMARY, ASI_PRIMARY_LITTLE)); 332 } 333 334 bus_space_tag_t 335 pyro_alloc_io_tag(struct pyro_pbm *pp) 336 { 337 return (_pyro_alloc_bus_tag(pp, "io", 338 0x01, /* IO space (where's the #define???) */ 339 ASI_PHYS_NON_CACHED_LITTLE, ASI_PHYS_NON_CACHED)); 340 } 341 342 bus_space_tag_t 343 pyro_alloc_config_tag(struct pyro_pbm *pp) 344 { 345 return (_pyro_alloc_bus_tag(pp, "cfg", 346 0x00, /* Config space (where's the #define???) */ 347 ASI_PHYS_NON_CACHED_LITTLE, ASI_PHYS_NON_CACHED)); 348 } 349 350 bus_space_tag_t 351 _pyro_alloc_bus_tag(struct pyro_pbm *pbm, const char *name, int ss, 352 int asi, int sasi) 353 { 354 struct pyro_softc *sc = pbm->pp_sc; 355 struct sparc_bus_space_tag *bt; 356 357 bt = malloc(sizeof(*bt), M_DEVBUF, M_NOWAIT | M_ZERO); 358 if (bt == NULL) 359 panic("pyro: could not allocate bus tag"); 360 361 snprintf(bt->name, sizeof(bt->name), "%s-pbm_%s(%d/%2.2x)", 362 sc->sc_dv.dv_xname, name, ss, asi); 363 364 bt->cookie = pbm; 365 bt->parent = sc->sc_bust; 366 bt->default_type = ss; 367 bt->asi = asi; 368 bt->sasi = sasi; 369 bt->sparc_bus_map = _pyro_bus_map; 370 bt->sparc_bus_mmap = _pyro_bus_mmap; 371 bt->sparc_intr_establish = _pyro_intr_establish; 372 return (bt); 373 } 374 375 bus_dma_tag_t 376 pyro_alloc_dma_tag(struct pyro_pbm *pbm) 377 { 378 struct pyro_softc *sc = pbm->pp_sc; 379 bus_dma_tag_t dt, pdt = sc->sc_dmat; 380 381 dt = malloc(sizeof(*dt), M_DEVBUF, M_NOWAIT | M_ZERO); 382 if (dt == NULL) 383 panic("pyro: could not alloc dma tag"); 384 385 dt->_cookie = pbm; 386 dt->_parent = pdt; 387 dt->_dmamap_create = pyro_dmamap_create; 388 dt->_dmamap_destroy = iommu_dvmamap_destroy; 389 dt->_dmamap_load = iommu_dvmamap_load; 390 dt->_dmamap_load_raw = iommu_dvmamap_load_raw; 391 dt->_dmamap_unload = iommu_dvmamap_unload; 392 dt->_dmamap_sync = iommu_dvmamap_sync; 393 dt->_dmamem_alloc = iommu_dvmamem_alloc; 394 dt->_dmamem_free = iommu_dvmamem_free; 395 return (dt); 396 } 397 398 pci_chipset_tag_t 399 pyro_alloc_chipset(struct pyro_pbm *pbm, int node, pci_chipset_tag_t pc) 400 { 401 pci_chipset_tag_t npc; 402 403 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 404 if (npc == NULL) 405 panic("pyro: could not allocate pci_chipset_tag_t"); 406 memcpy(npc, pc, sizeof *pc); 407 npc->cookie = pbm; 408 npc->rootnode = node; 409 return (npc); 410 } 411 412 int 413 pyro_dmamap_create(bus_dma_tag_t t, bus_dma_tag_t t0, bus_size_t size, 414 int nsegments, bus_size_t maxsegsz, bus_size_t boundary, int flags, 415 bus_dmamap_t *dmamp) 416 { 417 struct pyro_pbm *pp = t->_cookie; 418 419 return (iommu_dvmamap_create(t, t0, &pp->pp_sb, size, nsegments, 420 maxsegsz, boundary, flags, dmamp)); 421 } 422 423 int 424 _pyro_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset, 425 bus_size_t size, int flags, bus_space_handle_t *hp) 426 { 427 struct pyro_pbm *pbm = t->cookie; 428 int i, ss; 429 430 DPRINTF(PDB_BUSMAP, ("_pyro_bus_map: type %d off %qx sz %qx flags %d", 431 t->default_type, 432 (unsigned long long)offset, 433 (unsigned long long)size, 434 flags)); 435 436 ss = t->default_type; 437 DPRINTF(PDB_BUSMAP, (" cspace %d", ss)); 438 439 if (t->parent == 0 || t->parent->sparc_bus_map == 0) { 440 printf("\n_pyro_bus_map: invalid parent"); 441 return (EINVAL); 442 } 443 444 if (flags & BUS_SPACE_MAP_PROMADDRESS) { 445 return ((*t->parent->sparc_bus_map) 446 (t, t0, offset, size, flags, hp)); 447 } 448 449 for (i = 0; i < pbm->pp_nrange; i++) { 450 bus_addr_t paddr; 451 452 if (((pbm->pp_range[i].cspace >> 24) & 0x03) != ss) 453 continue; 454 455 paddr = pbm->pp_range[i].phys_lo + offset; 456 paddr |= ((bus_addr_t)pbm->pp_range[i].phys_hi) << 32; 457 return ((*t->parent->sparc_bus_map) 458 (t, t0, paddr, size, flags, hp)); 459 } 460 461 return (EINVAL); 462 } 463 464 paddr_t 465 _pyro_bus_mmap(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t paddr, 466 off_t off, int prot, int flags) 467 { 468 bus_addr_t offset = paddr; 469 struct pyro_pbm *pbm = t->cookie; 470 int i, ss; 471 472 ss = t->default_type; 473 474 DPRINTF(PDB_BUSMAP, ("_pyro_bus_mmap: prot %d flags %d pa %qx\n", 475 prot, flags, (unsigned long long)paddr)); 476 477 if (t->parent == 0 || t->parent->sparc_bus_mmap == 0) { 478 printf("\n_pyro_bus_mmap: invalid parent"); 479 return (-1); 480 } 481 482 for (i = 0; i < pbm->pp_nrange; i++) { 483 bus_addr_t paddr; 484 485 if (((pbm->pp_range[i].cspace >> 24) & 0x03) != ss) 486 continue; 487 488 paddr = pbm->pp_range[i].phys_lo + offset; 489 paddr |= ((bus_addr_t)pbm->pp_range[i].phys_hi<<32); 490 return ((*t->parent->sparc_bus_mmap) 491 (t, t0, paddr, off, prot, flags)); 492 } 493 494 return (-1); 495 } 496 497 void * 498 _pyro_intr_establish(bus_space_tag_t t, bus_space_tag_t t0, int ihandle, 499 int level, int flags, int (*handler)(void *), void *arg, const char *what) 500 { 501 struct pyro_pbm *pbm = t->cookie; 502 struct pyro_softc *sc = pbm->pp_sc; 503 struct intrhand *ih = NULL; 504 volatile u_int64_t *intrmapptr = NULL, *intrclrptr = NULL; 505 int ino; 506 507 ino = INTINO(ihandle); 508 509 if (level == IPL_NONE) 510 level = INTLEV(ihandle); 511 if (level == IPL_NONE) { 512 printf(": no IPL, setting IPL 2.\n"); 513 level = 2; 514 } 515 516 if ((flags & BUS_INTR_ESTABLISH_SOFTINTR) == 0) { 517 u_int64_t *imap, *iclr; 518 519 imap = bus_space_vaddr(sc->sc_bust, sc->sc_csrh) + 0x1000; 520 iclr = bus_space_vaddr(sc->sc_bust, sc->sc_csrh) + 0x1400; 521 intrmapptr = &imap[ino]; 522 intrclrptr = &iclr[ino]; 523 ino |= INTVEC(ihandle); 524 } 525 526 ih = bus_intr_allocate(t0, handler, arg, ino, level, intrmapptr, 527 intrclrptr, what); 528 if (ih == NULL) 529 return (NULL); 530 531 intr_establish(ih->ih_pil, ih); 532 533 if (intrmapptr != NULL) { 534 u_int64_t intrmap; 535 536 intrmap = *intrmapptr; 537 intrmap &= ~FIRE_INTRMAP_INT_CNTRL_NUM_MASK; 538 intrmap |= FIRE_INTRMAP_INT_CNTRL_NUM0; 539 if (sc->sc_oberon) { 540 intrmap &= ~OBERON_INTRMAP_T_DESTID_MASK; 541 intrmap |= CPU_JUPITERID << 542 OBERON_INTRMAP_T_DESTID_SHIFT; 543 } else { 544 intrmap &= ~FIRE_INTRMAP_T_JPID_MASK; 545 intrmap |= CPU_UPAID << FIRE_INTRMAP_T_JPID_SHIFT; 546 } 547 intrmap |= INTMAP_V; 548 *intrmapptr = intrmap; 549 intrmap = *intrmapptr; 550 ih->ih_number |= intrmap & INTMAP_INR; 551 } 552 553 return (ih); 554 } 555 556 #ifdef DDB 557 void 558 pyro_xir(void *arg, int cpu) 559 { 560 struct pyro_softc *sc = arg; 561 562 bus_space_write_8(sc->sc_bust, sc->sc_xbch, FIRE_RESET_GEN, 563 FIRE_RESET_GEN_XIR); 564 } 565 #endif 566 567 const struct cfattach pyro_ca = { 568 sizeof(struct pyro_softc), pyro_match, pyro_attach 569 }; 570 571 struct cfdriver pyro_cd = { 572 NULL, "pyro", DV_DULL 573 }; 574