1 /* $OpenBSD: opal.h,v 1.17 2020/10/10 13:19:50 kettenis Exp $ */ 2 3 /* 4 * Copyright (c) 2020 Mark Kettenis <kettenis@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _MACHINE_OPAL_H_ 20 #define _MACHINE_OPAL_H_ 21 22 /* Tokens. */ 23 #define OPAL_TEST 0 24 #define OPAL_CONSOLE_WRITE 1 25 #define OPAL_CONSOLE_READ 2 26 #define OPAL_RTC_READ 3 27 #define OPAL_RTC_WRITE 4 28 #define OPAL_CEC_POWER_DOWN 5 29 #define OPAL_CEC_REBOOT 6 30 #define OPAL_HANDLE_INTERRUPT 9 31 #define OPAL_POLL_EVENTS 10 32 #define OPAL_PCI_CONFIG_READ_WORD 15 33 #define OPAL_PCI_CONFIG_WRITE_WORD 18 34 #define OPAL_SET_XIVE 19 35 #define OPAL_GET_XIVE 20 36 #define OPAL_PCI_EEH_FREEZE_STATUS 23 37 #define OPAL_PCI_EEH_FREEZE_CLEAR 26 38 #define OPAL_PCI_PHB_MMIO_ENABLE 27 39 #define OPAL_PCI_SET_PHB_MEM_WINDOW 28 40 #define OPAL_PCI_MAP_PE_MMIO_WINDOW 29 41 #define OPAL_PCI_SET_PE 31 42 #define OPAL_PCI_SET_XIVE_PE 37 43 #define OPAL_GET_MSI_32 39 44 #define OPAL_GET_MSI_64 40 45 #define OPAL_START_CPU 41 46 #define OPAL_PCI_MAP_PE_DMA_WINDOW 44 47 #define OPAL_PCI_MAP_PE_DMA_WINDOW_REAL 45 48 #define OPAL_PCI_RESET 49 49 #define OPAL_REINIT_CPUS 70 50 #define OPAL_CHECK_TOKEN 80 51 #define OPAL_SENSOR_READ 88 52 #define OPAL_CONSOLE_FLUSH 117 53 #define OPAL_XIVE_RESET 128 54 #define OPAL_XIVE_GET_IRQ_INFO 129 55 #define OPAL_XIVE_GET_IRQ_CONFIG 131 56 #define OPAL_XIVE_SET_IRQ_CONFIG 131 57 #define OPAL_XIVE_GET_QUEUE_INFO 132 58 #define OPAL_XIVE_SET_QUEUE_INFO 133 59 #define OPAL_XIVE_GET_VP_INFO 137 60 #define OPAL_XIVE_SET_VP_INFO 138 61 #define OPAL_XIVE_DUMP 142 62 #define OPAL_SENSOR_READ_U64 162 63 64 /* Return codes. */ 65 #define OPAL_SUCCESS 0 66 #define OPAL_PARAMETER -1 67 #define OPAL_BUSY -2 68 #define OPAL_PARTIAL -3 69 #define OPAL_CONSTRAINED -4 70 #define OPAL_CLOSED -5 71 #define OPAL_HARDWARE -6 72 #define OPAL_UNSUPPORTED -7 73 #define OPAL_PERMISSION -8 74 #define OPAL_NO_MEM -9 75 #define OPAL_RESOURCE -10 76 #define OPAL_INTERNAL_ERROR -11 77 #define OPAL_BUSY_EVENT -12 78 #define OPAL_HARDWARE_FROZEN -13 79 #define OPAL_WRONG_STATE -14 80 #define OPAL_ASYNC_COMPLETION -15 81 82 /* OPAL_POLL_EVENT */ 83 #define OPAL_EVENT_CONSOLE_INPUT 0x00000010 84 85 /* OPAL_PCI_EEH_FREEZE_CLEAR */ 86 #define OPAL_EEH_ACTION_CLEAR_FREEZE_MMIO 1 87 #define OPAL_EEH_ACTION_CLEAR_FREEZE_DMA 2 88 #define OPAL_EEH_ACTION_CLEAR_FREEZE_ALL 3 89 90 /* OPAL_PCI_PHB_MMIO_ENABLE */ 91 #define OPAL_M32_WINDOW_TYPE 1 92 #define OPAL_M64_WINDOW_TYPE 2 93 #define OPAL_IO_WINDOW_TYPE 3 94 #define OPAL_DISABLE_M64 0 95 #define OPAL_ENABLE_M64_SPLIT 1 96 #define OPAL_ENABLE_M64_NON_SPLIT 2 97 98 /* OPAL_PCIE_SET_PE */ 99 #define OPAL_IGNORE_RID_BUS_NUMBER 0 100 #define OPAL_IGNORE_RID_DEVICE_NUMBER 0 101 #define OPAL_COMPARE_RID_DEVICE_NUMBER 1 102 #define OPAL_IGNORE_RID_FUNCTION_NUMBER 0 103 #define OPAL_COMPARE_RID_FUNCTION_NUMBER 1 104 #define OPAL_UNMAP_PE 0 105 #define OPAL_MAP_PE 1 106 107 /* OPAL_PCI_RESET */ 108 #define OPAL_RESET_PHB_COMPLETE 1 109 #define OPAL_RESET_PCI_LINK 2 110 #define OPAL_RESET_PHB_ERROR 3 111 #define OPAL_RESET_PCI_HOT 4 112 #define OPAL_RESET_PCI_FUNDAMENTAL 5 113 #define OPAL_RESET_PCI_IODA_TABLE 6 114 #define OPAL_DEASSERT_RESET 0 115 #define OPAL_ASSERT_RESET 1 116 117 /* OPAL_REINIT_CPUS */ 118 #define OPAL_REINIT_CPUS_HILE_BE 0x00000001 119 #define OPAL_REINIT_CPUS_HILE_LE 0x00000002 120 #define OPAL_REINIT_CPUS_MMU_HASH 0x00000004 121 #define OPAL_REINIT_CPUS_MMU_RADIX 0x00000008 122 #define OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED 0x00000010 123 124 /* OPAL_CHECK_TOKEN */ 125 #define OPAL_TOKEN_ABSENT 0 126 #define OPAL_TOKEN_PRESENT 1 127 128 /* OPAL_XIVE_RESET */ 129 #define OPAL_XIVE_MODE_EMU 0 130 #define OPAL_XIVE_MODE_EXPL 1 131 132 /* OPAL_XIVE_GET_IRQ_INFO */ 133 #define OPAL_XIVE_IRQ_TRIGGER_PAGE 0x00000001 134 #define OPAL_XIVE_IRQ_STORE_EOI 0x00000002 135 #define OPAL_XIVE_IRQ_LSI 0x00000004 136 #define OPAL_XIVE_IRQ_SHIFT_BUG 0x00000008 137 #define OPAL_XIVE_IRQ_MASK_VIA_FW 0x00000010 138 #define OPAL_XIVE_IRQ_EOI_VIA_FW 0x00000020 139 140 /* OPAL_XIVE_GET_QUEUE_INFO */ 141 #define OPAL_XIVE_EQ_ENABLED 0x00000001 142 #define OPAL_XIVE_EQ_ALWAYS_NOTIFY 0x00000002 143 #define OPAL_XIVE_EQ_ESCALATE 0x00000004 144 145 /* OPAL_XIVE_GET_VP_INFO */ 146 #define OPAL_XIVE_VP_ENABLED 0x00000001 147 #define OPAL_XIVE_VP_SINGLE_ESCALATION 0x00000002 148 149 /* OPAL_XIVE_DUMP */ 150 #define XIVE_DUMP_TM_HYP 0x00000000 151 #define XIVE_DUMP_TM_POOL 0x00000001 152 #define XIVE_DUMP_TM_OS 0x00000002 153 #define XIVE_DUMP_TM_USER 0x00000003 154 #define XIVE_DUMP_VP 0x00000004 155 #define XIVE_DUMP_EMU_STATE 0x00000005 156 157 #ifndef _LOCORE 158 159 void *opal_phys(void *); 160 161 int64_t opal_test(uint64_t); 162 int64_t opal_console_write(int64_t, int64_t *, const uint8_t *); 163 int64_t opal_console_read(int64_t, int64_t *, uint8_t *); 164 int64_t opal_rtc_read(uint32_t *, uint64_t *); 165 int64_t opal_rtc_write(uint32_t, uint64_t); 166 int64_t opal_cec_power_down(uint64_t); 167 int64_t opal_cec_reboot(void); 168 int64_t opal_handle_interrupt(uint32_t, uint64_t *); 169 int64_t opal_poll_events(uint64_t *); 170 int64_t opal_pci_config_read_word(uint64_t, uint64_t, uint64_t, uint32_t *); 171 int64_t opal_pci_config_write_word(uint64_t, uint64_t, uint64_t, uint32_t); 172 int64_t opal_set_xive(uint32_t, uint16_t, uint8_t); 173 int64_t opal_get_xive(uint32_t, uint16_t *, uint8_t *); 174 int64_t opal_pci_eeh_freeze_status(uint64_t, uint64_t, uint8_t *, 175 uint16_t *, uint64_t *); 176 int64_t opal_pci_eeh_freeze_clear(uint64_t, uint64_t, uint64_t); 177 int64_t opal_pci_phb_mmio_enable(uint64_t, uint16_t, uint16_t, uint16_t); 178 int64_t opal_pci_set_phb_mem_window(uint64_t, uint16_t, uint16_t, 179 uint64_t, uint64_t, uint64_t); 180 int64_t opal_pci_map_pe_mmio_window(uint64_t, uint64_t, uint16_t, 181 uint16_t, uint16_t); 182 int64_t opal_pci_set_pe(uint64_t, uint64_t, uint64_t, uint8_t, uint8_t, 183 uint8_t, uint8_t); 184 int64_t opal_pci_set_xive_pe(uint64_t, uint64_t, uint32_t); 185 int64_t opal_get_msi_32(uint64_t, uint32_t, uint32_t, uint8_t, 186 uint32_t *, uint32_t *); 187 int64_t opal_get_msi_64(uint64_t, uint32_t, uint32_t, uint8_t, 188 uint64_t *, uint32_t *); 189 int64_t opal_start_cpu(uint64_t, uint64_t); 190 int64_t opal_pci_map_pe_dma_window(uint64_t, uint64_t, uint16_t, uint16_t, 191 uint64_t, uint64_t, uint64_t); 192 int64_t opal_pci_map_pe_dma_window_real(uint64_t, uint64_t, uint16_t, 193 uint64_t, uint64_t); 194 int64_t opal_pci_reset(uint64_t, uint8_t, uint8_t); 195 int64_t opal_reinit_cpus(uint64_t); 196 int64_t opal_check_token(uint64_t); 197 int64_t opal_sensor_read(uint32_t, int, uint32_t *); 198 int64_t opal_console_flush(uint64_t); 199 int64_t opal_xive_reset(uint64_t); 200 int64_t opal_xive_get_irq_info(uint32_t, uint64_t *, uint64_t *, 201 uint64_t *, uint32_t *, uint32_t *); 202 int64_t opal_xive_get_irq_config(uint32_t, uint64_t *, uint8_t *, uint32_t *); 203 int64_t opal_xive_set_irq_config(uint32_t, uint64_t, uint8_t, uint32_t); 204 int64_t opal_xive_get_queue_info(uint64_t, uint8_t, uint64_t *, 205 uint64_t *, uint64_t *, uint32_t *, uint64_t *); 206 int64_t opal_xive_set_queue_info(uint64_t, uint8_t, uint64_t, 207 uint64_t, uint64_t); 208 int64_t opal_xive_get_vp_info(uint64_t, uint64_t *, uint64_t *, 209 uint64_t *, uint32_t *); 210 int64_t opal_xive_set_vp_info(uint64_t, uint64_t, uint64_t); 211 int64_t opal_xive_dump(uint32_t, uint32_t); 212 int64_t opal_sensor_read_u64(uint32_t, int, uint64_t *); 213 214 void opal_printf(const char *fmt, ...); 215 216 void *opal_intr_establish(uint64_t, int, int (*)(void *), void *); 217 218 #endif 219 220 #endif /* _MACHINE_OPAL_H_ */ 221