xref: /openbsd-src/sys/arch/powerpc/include/intr.h (revision d13be5d47e4149db2549a9828e244d59dbc43f15)
1 /*	$OpenBSD: intr.h,v 1.47 2011/08/29 20:21:43 drahn Exp $ */
2 
3 /*
4  * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed under OpenBSD by
17  *	Per Fogelstrom, Opsycon AB, Sweden for RTMX Inc, North Carolina USA.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
22  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  */
34 
35 #ifndef _POWERPC_INTR_H_
36 #define _POWERPC_INTR_H_
37 
38 #define	IPL_NONE	0
39 #define	IPL_SOFT	1
40 #define	IPL_SOFTCLOCK	2
41 #define	IPL_SOFTNET	3
42 #define	IPL_SOFTTTY	4
43 #define	IPL_BIO		5
44 #define	IPL_AUDIO	IPL_BIO /* XXX - was defined this val in audio_if.h */
45 #define	IPL_NET		6
46 #define	IPL_TTY		7
47 #define	IPL_VM		8
48 #define	IPL_CLOCK	9
49 #define	IPL_SCHED	10
50 #define	IPL_HIGH	11
51 #define	IPL_NUM		12
52 
53 #define	IST_NONE	0
54 #define	IST_PULSE	1
55 #define	IST_EDGE	2
56 #define	IST_LEVEL	3
57 
58 #if defined(_KERNEL) && !defined(_LOCORE)
59 
60 #include <sys/evcount.h>
61 #include <machine/atomic.h>
62 
63 #define	PPC_NIRQ	66
64 #define	PPC_CLK_IRQ	64
65 #define	PPC_STAT_IRQ	65
66 
67 int	splraise(int);
68 int	spllower(int);
69 void	splx(int);
70 
71 typedef int (ppc_splraise_t) (int);
72 typedef int (ppc_spllower_t) (int);
73 typedef void (ppc_splx_t) (int);
74 
75 extern struct ppc_intr_func {
76 	ppc_splraise_t *raise;
77 	ppc_spllower_t *lower;
78 	ppc_splx_t *x;
79 }ppc_intr_func;
80 
81 extern int ppc_smask[IPL_NUM];
82 
83 void ppc_smask_init(void);
84 char *ppc_intr_typename(int type);
85 
86 void do_pending_int(void);
87 
88 /* SPL asserts */
89 #define	splassert(wantipl)	/* nothing */
90 #define	splsoftassert(wantipl)	/* nothing */
91 
92 #define	set_sint(p)	atomic_setbits_int(&curcpu()->ci_ipending, p)
93 
94 #define	splbio()	splraise(IPL_BIO)
95 #define	splnet()	splraise(IPL_NET)
96 #define	spltty()	splraise(IPL_TTY)
97 #define	splaudio()	splraise(IPL_AUDIO)
98 #define	splclock()	splraise(IPL_CLOCK)
99 #define	splvm()		splraise(IPL_VM)
100 #define	splsched()	splhigh()
101 #define	spllock()	splhigh()
102 #define	splstatclock()	splhigh()
103 #define	splsoftclock()	splraise(IPL_SOFTCLOCK)
104 #define	splsoftnet()	splraise(IPL_SOFTNET)
105 #define	splsofttty()	splraise(IPL_SOFTTTY)
106 
107 #define	SI_TO_IRQBIT(x) (1 << (x))
108 
109 #define	SI_SOFTCLOCK		0	/* for IPL_SOFTCLOCK */
110 #define	SI_SOFTNET		1	/* for IPL_SOFTNET */
111 #define	SI_SOFTTTY		2	/* for IPL_SOFTSERIAL */
112 
113 #define	SI_NQUEUES		3
114 
115 #include <machine/mutex.h>
116 #include <sys/queue.h>
117 
118 struct soft_intrhand {
119 	TAILQ_ENTRY(soft_intrhand) sih_list;
120 	void	(*sih_func)(void *);
121 	void	*sih_arg;
122 	struct soft_intrq *sih_siq;
123 	int	sih_pending;
124 };
125 
126 struct soft_intrq {
127 	TAILQ_HEAD(, soft_intrhand) siq_list;
128 	int siq_si;
129 	struct mutex siq_mtx;
130 };
131 
132 
133 void	softintr_disestablish(void *);
134 void	softintr_dispatch(int);
135 void	*softintr_establish(int, void (*)(void *), void *);
136 void	softintr_init(void);
137 
138 void	softintr_schedule(void *);
139 
140 #define	set_sint(p)	atomic_setbits_int(&curcpu()->ci_ipending, p)
141 
142 #define	setsoftclock()	set_sint(SI_TO_IRQBIT(SI_SOFTCLOCK))
143 #define	setsoftnet()	set_sint(SI_TO_IRQBIT(SI_SOFTNET))
144 #define	setsofttty()	set_sint(SI_TO_IRQBIT(SI_SOFTTTY))
145 
146 #define	splhigh()	splraise(IPL_HIGH)
147 #define	spl0()		spllower(IPL_NONE)
148 
149 /*
150  *	Interrupt control struct used to control the ICU setup.
151  */
152 
153 struct intrhand {
154 	TAILQ_ENTRY(intrhand) ih_list;
155 	int		(*ih_fun)(void *);
156 	void		*ih_arg;
157 	struct evcount	ih_count;
158 	int		ih_level;
159 	int		ih_irq;
160 	const char	*ih_what;
161 };
162 
163 struct intrq {
164 	TAILQ_HEAD(, intrhand) iq_list; /* handler list */
165 	int iq_ipl;			/* IPL_ to mask while handling */
166 	int iq_ist;			/* share type */
167 };
168 
169 extern int ppc_configed_intr_cnt;
170 #define	MAX_PRECONF_INTR 16
171 extern struct intrhand ppc_configed_intr[MAX_PRECONF_INTR];
172 
173 #define PPC_IPI_NOP		0
174 #define PPC_IPI_DDB		1
175 
176 void ppc_send_ipi(struct cpu_info *, int);
177 
178 #endif /* _LOCORE */
179 #endif /* _POWERPC_INTR_H_ */
180