xref: /openbsd-src/sys/arch/powerpc/include/intr.h (revision 850e275390052b330d93020bf619a739a3c277ac)
1 /*	$OpenBSD: intr.h,v 1.37 2008/09/19 01:42:05 drahn Exp $ */
2 
3 /*
4  * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed under OpenBSD by
17  *	Per Fogelstrom, Opsycon AB, Sweden for RTMX Inc, North Carolina USA.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
22  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  */
34 
35 #ifndef _POWERPC_INTR_H_
36 #define _POWERPC_INTR_H_
37 
38 #define	IPL_NONE	0
39 #define	IPL_SOFT	1
40 #define	IPL_SOFTCLOCK	2
41 #define	IPL_SOFTNET	3
42 #define	IPL_SOFTTTY	4
43 #define	IPL_BIO		5
44 #define	IPL_AUDIO	IPL_BIO /* XXX - was defined this val in audio_if.h */
45 #define	IPL_NET		6
46 #define	IPL_TTY		7
47 #define	IPL_VM		8
48 #define	IPL_CLOCK	9
49 #define	IPL_HIGH	10
50 #define	IPL_NUM		11
51 
52 #define	IST_NONE	0
53 #define	IST_PULSE	1
54 #define	IST_EDGE	2
55 #define	IST_LEVEL	3
56 
57 #if defined(_KERNEL) && !defined(_LOCORE)
58 
59 #include <sys/evcount.h>
60 #include <machine/atomic.h>
61 
62 #define	PPC_NIRQ	66
63 #define	PPC_CLK_IRQ	64
64 #define	PPC_STAT_IRQ	65
65 
66 void setsoftclock(void);
67 void clearsoftclock(void);
68 int  splsoftclock(void);
69 void setsoftnet(void);
70 void clearsoftnet(void);
71 int  splsoftnet(void);
72 
73 int	splraise(int);
74 int	spllower(int);
75 void	splx(int);
76 
77 typedef int (ppc_splraise_t) (int);
78 typedef int (ppc_spllower_t) (int);
79 typedef void (ppc_splx_t) (int);
80 
81 extern struct ppc_intr_func {
82 	ppc_splraise_t *raise;
83 	ppc_spllower_t *lower;
84 	ppc_splx_t *x;
85 }ppc_intr_func;
86 
87 #if 0
88 /* does it make sense to call directly ?? */
89 #define	splraise(x)	ppc_intr.raise(x)
90 #define	spllower(x)	ppc_intr.lower(x)
91 #define	splx(x)		ppc_intr.x(x)
92 #endif
93 
94 extern int ppc_smask[IPL_NUM];
95 
96 void ppc_smask_init(void);
97 char *ppc_intr_typename(int type);
98 
99 void do_pending_int(void);
100 
101 /* SPL asserts */
102 #define	splassert(wantipl)	/* nothing */
103 
104 #define	set_sint(p)	atomic_setbits_int(&curcpu()->ci_ipending, p)
105 
106 #if 0
107 #define	SINT_CLOCK	0x10000000
108 #define	SINT_NET	0x20000000
109 #define	SINT_TTY	0x40000000
110 #define	SPL_CLOCK	0x80000000
111 #define	SINT_MASK	(SINT_CLOCK|SINT_NET|SINT_TTY)
112 #endif
113 
114 #define	splbio()	splraise(IPL_BIO)
115 #define	splnet()	splraise(IPL_NET)
116 #define	spltty()	splraise(IPL_TTY)
117 #define	splaudio()	splraise(IPL_AUDIO)
118 #define	splclock()	splraise(IPL_CLOCK)
119 #define	splvm()		splraise(IPL_VM)
120 #define	splsched()	splhigh()
121 #define	spllock()	splhigh()
122 #define	splstatclock()	splhigh()
123 #define	splsoftclock()	splraise(IPL_SOFTCLOCK)
124 #define	splsoftnet()	splraise(IPL_SOFTNET)
125 #define	splsofttty()	splraise(IPL_SOFTTTY)
126 
127 #define	setsoftclock()	set_sint(SI_TO_IRQBIT(SI_SOFTCLOCK))
128 #define	setsoftnet()	set_sint(SI_TO_IRQBIT(SI_SOFTNET))
129 #define	setsofttty()	set_sint(SI_TO_IRQBIT(SI_SOFTTTY))
130 
131 #define	splhigh()	splraise(IPL_HIGH)
132 #define	spl0()		spllower(IPL_NONE)
133 
134 /*
135  *	Interrupt control struct used to control the ICU setup.
136  */
137 
138 struct intrhand {
139 	TAILQ_ENTRY(intrhand) ih_list;
140 	int		(*ih_fun)(void *);
141 	void		*ih_arg;
142 	struct evcount	ih_count;
143 	int		ih_level;
144 	int		ih_irq;
145 	char		*ih_what;
146 };
147 
148 struct intrq {
149 	TAILQ_HEAD(, intrhand) iq_list; /* handler list */
150 	int iq_ipl;			/* IPL_ to mask while handling */
151 	int iq_ist;			/* share type */
152 };
153 
154 extern int ppc_configed_intr_cnt;
155 #define	MAX_PRECONF_INTR 16
156 extern struct intrhand ppc_configed_intr[MAX_PRECONF_INTR];
157 void softnet(int isr);
158 
159 #define	SI_TO_IRQBIT(x) (1 << (x))
160 
161 #define	SI_SOFT			0	/* for IPL_SOFT */
162 #define	SI_SOFTCLOCK		1	/* for IPL_SOFTCLOCK */
163 #define	SI_SOFTNET		2	/* for IPL_SOFTNET */
164 #define	SI_SOFTTTY		3	/* for IPL_SOFTSERIAL */
165 
166 #define	SI_NQUEUES		4
167 
168 #define SI_QUEUENAMES {		\
169 	"generic",		\
170 	"clock",		\
171 	"net",			\
172 	"serial",		\
173 }
174 
175 #define PPC_IPI_NOP		0
176 #define PPC_IPI_DDB		1
177 
178 void ppc_send_ipi(struct cpu_info *, int);
179 
180 #endif /* _LOCORE */
181 #endif /* _POWERPC_INTR_H_ */
182