1 /* $OpenBSD: intr.h,v 1.49 2013/05/17 19:38:52 kettenis Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed under OpenBSD by 17 * Per Fogelstrom, Opsycon AB, Sweden for RTMX Inc, North Carolina USA. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 22 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 */ 34 35 #ifndef _POWERPC_INTR_H_ 36 #define _POWERPC_INTR_H_ 37 38 #define IPL_NONE 0 39 #define IPL_SOFT 1 40 #define IPL_SOFTCLOCK 2 41 #define IPL_SOFTNET 3 42 #define IPL_SOFTTTY 4 43 #define IPL_BIO 5 44 #define IPL_AUDIO IPL_BIO /* XXX - was defined this val in audio_if.h */ 45 #define IPL_NET 6 46 #define IPL_TTY 7 47 #define IPL_VM 8 48 #define IPL_CLOCK 9 49 #define IPL_SCHED 10 50 #define IPL_HIGH 11 51 #define IPL_NUM 12 52 53 #define IPL_MPSAFE 0 /* no "mpsafe" interrupts */ 54 55 #define IST_NONE 0 56 #define IST_PULSE 1 57 #define IST_EDGE 2 58 #define IST_LEVEL 3 59 60 #if defined(_KERNEL) && !defined(_LOCORE) 61 62 #include <sys/evcount.h> 63 #include <machine/atomic.h> 64 65 #define PPC_NIRQ 66 66 #define PPC_CLK_IRQ 64 67 #define PPC_STAT_IRQ 65 68 69 int splraise(int); 70 int spllower(int); 71 void splx(int); 72 73 typedef int (ppc_splraise_t) (int); 74 typedef int (ppc_spllower_t) (int); 75 typedef void (ppc_splx_t) (int); 76 77 extern struct ppc_intr_func { 78 ppc_splraise_t *raise; 79 ppc_spllower_t *lower; 80 ppc_splx_t *x; 81 }ppc_intr_func; 82 83 extern int ppc_smask[IPL_NUM]; 84 85 void ppc_smask_init(void); 86 char *ppc_intr_typename(int type); 87 88 void do_pending_int(void); 89 90 /* SPL asserts */ 91 #define splassert(wantipl) /* nothing */ 92 #define splsoftassert(wantipl) /* nothing */ 93 94 #define set_sint(p) atomic_setbits_int(&curcpu()->ci_ipending, p) 95 96 #define splbio() splraise(IPL_BIO) 97 #define splnet() splraise(IPL_NET) 98 #define spltty() splraise(IPL_TTY) 99 #define splaudio() splraise(IPL_AUDIO) 100 #define splclock() splraise(IPL_CLOCK) 101 #define splvm() splraise(IPL_VM) 102 #define splsched() splhigh() 103 #define spllock() splhigh() 104 #define splstatclock() splhigh() 105 #define splsoftclock() splraise(IPL_SOFTCLOCK) 106 #define splsoftnet() splraise(IPL_SOFTNET) 107 #define splsofttty() splraise(IPL_SOFTTTY) 108 109 #define SI_TO_IRQBIT(x) (1 << (x)) 110 111 #define SI_SOFTCLOCK 0 /* for IPL_SOFTCLOCK */ 112 #define SI_SOFTNET 1 /* for IPL_SOFTNET */ 113 #define SI_SOFTTTY 2 /* for IPL_SOFTSERIAL */ 114 115 #define SI_NQUEUES 3 116 117 #include <machine/mutex.h> 118 #include <sys/queue.h> 119 120 struct soft_intrhand { 121 TAILQ_ENTRY(soft_intrhand) sih_list; 122 void (*sih_func)(void *); 123 void *sih_arg; 124 struct soft_intrq *sih_siq; 125 int sih_pending; 126 }; 127 128 struct soft_intrq { 129 TAILQ_HEAD(, soft_intrhand) siq_list; 130 int siq_si; 131 struct mutex siq_mtx; 132 }; 133 134 135 void softintr_disestablish(void *); 136 void softintr_dispatch(int); 137 void *softintr_establish(int, void (*)(void *), void *); 138 void softintr_init(void); 139 140 void softintr_schedule(void *); 141 142 #define set_sint(p) atomic_setbits_int(&curcpu()->ci_ipending, p) 143 144 #define setsoftclock() set_sint(SI_TO_IRQBIT(SI_SOFTCLOCK)) 145 #define setsoftnet() set_sint(SI_TO_IRQBIT(SI_SOFTNET)) 146 #define setsofttty() set_sint(SI_TO_IRQBIT(SI_SOFTTTY)) 147 148 #define splhigh() splraise(IPL_HIGH) 149 #define spl0() spllower(IPL_NONE) 150 151 /* 152 * Interrupt control struct used to control the ICU setup. 153 */ 154 155 struct intrhand { 156 TAILQ_ENTRY(intrhand) ih_list; 157 int (*ih_fun)(void *); 158 void *ih_arg; 159 struct evcount ih_count; 160 int ih_type; 161 int ih_level; 162 int ih_irq; 163 const char *ih_what; 164 }; 165 166 struct intrq { 167 TAILQ_HEAD(, intrhand) iq_list; /* handler list */ 168 int iq_ipl; /* IPL_ to mask while handling */ 169 int iq_ist; /* share type */ 170 }; 171 172 extern int ppc_configed_intr_cnt; 173 #define MAX_PRECONF_INTR 16 174 extern struct intrhand ppc_configed_intr[MAX_PRECONF_INTR]; 175 176 #define PPC_IPI_NOP 0 177 #define PPC_IPI_DDB 1 178 179 void ppc_send_ipi(struct cpu_info *, int); 180 181 #endif /* _LOCORE */ 182 #endif /* _POWERPC_INTR_H_ */ 183