xref: /openbsd-src/sys/arch/octeon/include/cpu.h (revision f2da64fbbbf1b03f09f390ab01267c93dfd77c4c)
1 /* $OpenBSD: cpu.h,v 1.7 2016/01/05 05:27:54 visa Exp $ */
2 /*-
3  * Copyright (c) 1992, 1993
4  *	The Regents of the University of California.  All rights reserved.
5  *
6  * This code is derived from software contributed to Berkeley by
7  * Ralph Campbell and Rick Macklem.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. Neither the name of the University nor the names of its contributors
18  *    may be used to endorse or promote products derived from this software
19  *    without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  *	Copyright (C) 1989 Digital Equipment Corporation.
34  *	Permission to use, copy, modify, and distribute this software and
35  *	its documentation for any purpose and without fee is hereby granted,
36  *	provided that the above copyright notice appears in all copies.
37  *	Digital Equipment Corporation makes no representations about the
38  *	suitability of this software for any purpose.  It is provided "as is"
39  *	without express or implied warranty.
40  *
41  *	from: @(#)cpu.h	8.4 (Berkeley) 1/4/94
42  */
43 
44 #ifndef _MACHINE_CPU_H_
45 #define _MACHINE_CPU_H_
46 
47 #ifdef _KERNEL
48 #if defined(MULTIPROCESSOR) && !defined(_LOCORE)
49 struct cpu_info;
50 struct cpu_info *hw_getcurcpu(void);
51 void hw_setcurcpu(struct cpu_info *);
52 void hw_cpu_boot_secondary(struct cpu_info *);
53 void hw_cpu_hatch(struct cpu_info *);
54 void hw_cpu_spinup_trampoline(struct cpu_info *);
55 int  hw_ipi_intr_establish(int (*)(void *), u_long);
56 void hw_ipi_intr_set(u_long);
57 void hw_ipi_intr_clear(u_long);
58 #endif	/* MULTIPROCESSOR && !_LOCORE */
59 
60 /*
61  * No need to use the per-cpu_info function pointers, as we only support
62  * one processor type.
63  */
64 #define	Mips_SyncCache(ci)			\
65 	Octeon_SyncCache((ci))
66 #define	Mips_InvalidateICache(ci, va, l)	\
67 	Octeon_InvalidateICache((ci), (va), (l))
68 #define	Mips_InvalidateICachePage(ci, va)	\
69 	Octeon_InvalidateICachePage((ci), (va))
70 #define	Mips_SyncICache(ci)			\
71 	Octeon_SyncICache((ci))
72 #define	Mips_SyncDCachePage(ci, va, pa)		\
73 	Octeon_SyncDCachePage((ci), (va), (pa))
74 #define	Mips_HitSyncDCachePage(ci, va, pa)	\
75 	Octeon_SyncDCachePage((ci), (va), (pa))
76 #define	Mips_HitSyncDCache(ci, va, l)		\
77 	Octeon_HitSyncDCache((ci), (va), (l))
78 #define	Mips_IOSyncDCache(ci, va, l, h)		\
79 	Octeon_IOSyncDCache((ci), (va), (l), (h))
80 #define	Mips_HitInvalidateDCache(ci, va, l)	\
81 	Octeon_HitInvalidateDCache((ci), (va), (l))
82 
83 #endif/* _KERNEL */
84 
85 #include <mips64/cpu.h>
86 
87 #endif /* !_MACHINE_CPU_H_ */
88