xref: /openbsd-src/sys/arch/octeon/dev/octrtc.c (revision f2da64fbbbf1b03f09f390ab01267c93dfd77c4c)
1 /*	$OpenBSD: octrtc.c,v 1.4 2014/10/26 15:13:04 jasper Exp $	*/
2 
3 /*
4  * Copyright (c) 2013, 2014 Paul Irofti.
5  *
6  * Permission to use, copy, modify, and distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #include <sys/param.h>
20 #include <sys/systm.h>
21 #include <sys/device.h>
22 #include <sys/proc.h>
23 
24 #include <mips64/dev/clockvar.h>
25 
26 #include <machine/bus.h>
27 #include <machine/autoconf.h>
28 #include <machine/octeonvar.h>
29 
30 #ifdef OCTRTC_DEBUG
31 #define DPRINTF(x)	printf x
32 #else
33 #define DPRINTF(x)
34 #endif
35 
36 #define MIO_TWS_SW_TWSI		0x0001180000001000ULL
37 #define MIO_TWS_SW_TWSI_EXT	0x0001180000001018ULL
38 #define OCTRTC_REG	0x68
39 
40 struct cfdriver octrtc_cd = {
41 	NULL, "octrtc", DV_DULL
42 };
43 
44 int	octrtc_match(struct device *, void *, void *);
45 void	octrtc_attach(struct device *, struct device *, void *);
46 
47 void	octrtc_gettime(void *, time_t, struct tod_time *);
48 int	octrtc_read(uint8_t *, char);
49 
50 void	octrtc_settime(void *, struct tod_time *);
51 int	octrtc_write(uint8_t);
52 
53 
54 struct cfattach octrtc_ca = {
55 	sizeof(struct device), octrtc_match, octrtc_attach,
56 };
57 
58 
59 union mio_tws_sw_twsi_reg {
60 	uint64_t reg;
61 	struct cvmx_mio_twsx_sw_twsi_s {
62 		uint64_t v:1;		/* Valid bit */
63 		uint64_t slonly:1;	/* Slave Only Mode */
64 		uint64_t eia:1;		/* Extended Internal Address */
65 		uint64_t op:4;		/* Opcode field */
66 		uint64_t r:1;		/* Read bit or result */
67 		uint64_t sovr:1;	/* Size Override */
68 		uint64_t size:3;	/* Size in bytes */
69 		uint64_t scr:2;		/* Scratch, unused */
70 		uint64_t a:10;		/* Address field */
71 		uint64_t ia:5;		/* Internal Address */
72 		uint64_t eop_ia:3;	/* Extra opcode */
73 		uint64_t d:32;		/* Data Field */
74 	} field;
75 };
76 
77 
78 int
79 octrtc_match(struct device *parent, void *match, void *aux)
80 {
81 	struct mainbus_attach_args *maa = aux;
82 	struct cfdata *cf = match;
83 
84 	if (strcmp(maa->maa_name, cf->cf_driver->cd_name) != 0)
85 		return 0;
86 	/* No RTC on Ubiquiti */
87 	if ((octeon_boot_info->board_type == BOARD_TYPE_UBIQUITI_E100) ||
88 	    (octeon_boot_info->board_type == BOARD_TYPE_UBIQUITI_E200))
89 		return 0;
90 	return 1;
91 }
92 
93 void
94 octrtc_attach(struct device *parent, struct device *self, void *aux)
95 {
96 	struct octrtc_softc *sc = (struct octrtc_softc *)self;
97 
98 	sys_tod.tod_cookie = sc;
99 	sys_tod.tod_get = octrtc_gettime;
100 	sys_tod.tod_set = octrtc_settime;
101 
102 	printf(": DS1337\n");
103 }
104 
105 void
106 octrtc_gettime(void *cookie, time_t unused, struct tod_time *tt)
107 {
108 	uint8_t tod[8];
109 	uint8_t check;
110 	int i, rc;
111 
112 	int nretries = 2;
113 
114 	DPRINTF(("\nTOD: "));
115 	while (nretries--) {
116 		rc = octrtc_read(&tod[0], 1);	/* ia read */
117 		if (rc) {
118 			DPRINTF(("octrtc_read(0) failed %d", rc));
119 			return;
120 		}
121 
122 		for (i = 1; i < 8; i++) {
123 			rc = octrtc_read(&tod[i], 0);	/* current address */
124 			if (rc) {
125 				DPRINTF(("octrtc_read(%d) failed %d", i, rc));
126 				return;
127 			}
128 			DPRINTF(("%#X ", tod[i]));
129 		}
130 
131 		/* Check against time-wrap */
132 		rc = octrtc_read(&check, 1);	/* ia read */
133 		if (rc) {
134 			DPRINTF(("octrtc_read(check) failed %d", i, rc));
135 			return;
136 		}
137 		if ((check & 0xf) == (tod[0] & 0xf))
138 			break;
139 	}
140 	DPRINTF(("\n"));
141 
142 	DPRINTF(("Time: %d %d %d (%d) %02d:%02d:%02d\n",
143 	    ((tod[5] & 0x80) ? 2000 : 1900) + FROMBCD(tod[6]),	/* year */
144 	    FROMBCD(tod[5] & 0x1f),	/* month */
145 	    FROMBCD(tod[4] & 0x3f),	/* day */
146 	    (tod[3] & 0x7),		/* day of the week */
147 	    FROMBCD(tod[2] & 0x3f),	/* hour */
148 	    FROMBCD(tod[1] & 0x7f),	/* minute */
149 	    FROMBCD(tod[0] & 0x7f)));	/* second */
150 
151 	tt->year = ((tod[5] & 0x80) ? 100 : 0) + FROMBCD(tod[6]);
152 	tt->mon = FROMBCD(tod[5] & 0x1f);
153 	tt->day = FROMBCD(tod[4] & 0x3f);
154 	tt->dow = (tod[3] & 0x7);
155 	tt->hour = FROMBCD(tod[2] & 0x3f);
156 	if ((tod[2] & 0x40) && (tod[2] & 0x20))	/* adjust AM/PM format */
157 		tt->hour = (tt->hour + 12) % 24;
158 	tt->min = FROMBCD(tod[1] & 0x7f);
159 	tt->sec = FROMBCD(tod[0] & 0x7f);
160 }
161 
162 int
163 octrtc_read(uint8_t *data, char ia)
164 {
165 	int nretries = 5;
166 	union mio_tws_sw_twsi_reg twsi;
167 
168 again:
169 	twsi.reg = 0;
170 	twsi.field.v = 1;
171 	twsi.field.r = 1;
172 	twsi.field.sovr = 1;
173 	twsi.field.a = OCTRTC_REG;
174 	if (ia) {
175 		twsi.field.op = 1;
176 	}
177 
178 	octeon_xkphys_write_8(MIO_TWS_SW_TWSI, twsi.reg);
179 	/* The 1st bit is cleared when the operation is complete */
180 	do {
181 		delay(1000);
182 		twsi.reg = octeon_xkphys_read_8(MIO_TWS_SW_TWSI);
183 	} while (twsi.field.v);
184 	DPRINTF(("%#llX ", twsi.reg));
185 
186 	/*
187 	 * The data field is in the upper 32 bits and we're only
188 	 * interested in the first byte.
189 	 */
190 	*data = twsi.field.d & 0xff;
191 
192 	/* 8th bit is the read result: 1 = success, 0 = failure */
193 	if (twsi.field.r == 0) {
194 		/*
195 		 * Lost arbitration : 0x38, 0x68, 0xB0, 0x78
196 		 * Core busy as slave: 0x80, 0x88, 0xA0, 0xA8, 0xB8, 0xC0, 0xC8
197 		 */
198 		if (*data == 0x38 || *data == 0x68 || *data == 0xB0 ||
199 		    *data == 0x78 || *data == 0x80 || *data == 0x88 ||
200 		    *data == 0xA0 || *data == 0xA8 || *data == 0xB8 ||
201 		    *data == 0xC0 || *data == 0xC8)
202 			if (nretries--)
203 				goto again;
204 		return EIO;
205 	}
206 
207 	return 0;
208 }
209 
210 void
211 octrtc_settime(void *cookie, struct tod_time *tt)
212 {
213 	int nretries = 2;
214 	int rc, i;
215 	uint8_t tod[8];
216 	uint8_t check;
217 
218 	DPRINTF(("settime: %d %d %d (%d) %02d:%02d:%02d\n",
219 	    tt->year, tt->mon, tt->day, tt->dow,
220 	    tt->hour, tt->min, tt->sec));
221 
222 	tod[0] = TOBCD(tt->sec);
223 	tod[1] = TOBCD(tt->min);
224 	tod[2] = TOBCD(tt->hour);
225 	tod[3] = TOBCD(tt->dow);
226 	tod[4] = TOBCD(tt->day);
227 	tod[5] = TOBCD(tt->mon);
228 	if (tt->year >= 100)
229 		tod[5] |= 0x80;
230 	tod[6] = TOBCD(tt->year % 100);
231 
232 	while (nretries--) {
233 		for (i = 0; i < 7; i++) {
234 			rc = octrtc_write(tod[i]);
235 			if (rc) {
236 				DPRINTF(("octrtc_write(%d) failed %d", i, rc));
237 				return;
238 			}
239 		}
240 
241 		rc = octrtc_read(&check, 1);
242 		if (rc) {
243 			DPRINTF(("octrtc_read(check) failed %d", rc));
244 			return;
245 		}
246 
247 		if ((check & 0xf) == (tod[0] & 0xf))
248 			break;
249 	}
250 }
251 
252 int
253 octrtc_write(uint8_t data)
254 {
255 	union mio_tws_sw_twsi_reg twsi;
256 	int npoll = 128;
257 
258 	twsi.reg = 0;
259 	twsi.field.v = 1;
260 	twsi.field.sovr = 1;
261 	twsi.field.op = 1;
262 	twsi.field.a = OCTRTC_REG;
263 	twsi.field.d = data & 0xffffffff;
264 
265 	octeon_xkphys_write_8(MIO_TWS_SW_TWSI_EXT, 0);
266 	octeon_xkphys_write_8(MIO_TWS_SW_TWSI, twsi.reg);
267 	do {
268 		delay(1000);
269 		twsi.reg = octeon_xkphys_read_8(MIO_TWS_SW_TWSI);
270 	} while (twsi.field.v);
271 
272 	/* Try to read back */
273 	while (npoll-- && octrtc_read(&data, 0));
274 
275 	return npoll ? 0 : EIO;
276 }
277