xref: /openbsd-src/sys/arch/octeon/dev/octrtc.c (revision 301d4f2f56b4fd28a1f1206965991b3de0bf664d)
1 /*	$OpenBSD: octrtc.c,v 1.10 2017/11/20 15:13:09 visa Exp $	*/
2 
3 /*
4  * Copyright (c) 2013, 2014 Paul Irofti.
5  *
6  * Permission to use, copy, modify, and distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #include <sys/param.h>
20 #include <sys/systm.h>
21 #include <sys/device.h>
22 #include <sys/proc.h>
23 
24 #include <mips64/dev/clockvar.h>
25 
26 #include <machine/bus.h>
27 #include <machine/autoconf.h>
28 #include <machine/octeonvar.h>
29 
30 #ifdef OCTRTC_DEBUG
31 #define DPRINTF(x)	printf x
32 #else
33 #define DPRINTF(x)
34 #endif
35 
36 #define MIO_TWS_SW_TWSI		0x0001180000001000ULL
37 #define MIO_TWS_SW_TWSI_EXT	0x0001180000001018ULL
38 #define OCTRTC_REG	0x68
39 
40 struct cfdriver octrtc_cd = {
41 	NULL, "octrtc", DV_DULL
42 };
43 
44 int	octrtc_match(struct device *, void *, void *);
45 void	octrtc_attach(struct device *, struct device *, void *);
46 
47 void	octrtc_gettime(void *, time_t, struct tod_time *);
48 int	octrtc_read(uint8_t *, char);
49 
50 void	octrtc_settime(void *, struct tod_time *);
51 int	octrtc_write(uint8_t);
52 
53 
54 struct cfattach octrtc_ca = {
55 	sizeof(struct device), octrtc_match, octrtc_attach,
56 };
57 
58 
59 union mio_tws_sw_twsi_reg {
60 	uint64_t reg;
61 	struct cvmx_mio_twsx_sw_twsi_s {
62 		uint64_t v:1;		/* Valid bit */
63 		uint64_t slonly:1;	/* Slave Only Mode */
64 		uint64_t eia:1;		/* Extended Internal Address */
65 		uint64_t op:4;		/* Opcode field */
66 		uint64_t r:1;		/* Read bit or result */
67 		uint64_t sovr:1;	/* Size Override */
68 		uint64_t size:3;	/* Size in bytes */
69 		uint64_t scr:2;		/* Scratch, unused */
70 		uint64_t a:10;		/* Address field */
71 		uint64_t ia:5;		/* Internal Address */
72 		uint64_t eop_ia:3;	/* Extra opcode */
73 		uint64_t d:32;		/* Data Field */
74 	} field;
75 };
76 
77 
78 static const uint16_t no_rtc_boards[] = {
79 	BOARD_TYPE_UBIQUITI_E100,
80 	BOARD_TYPE_UBIQUITI_E120,
81 	BOARD_TYPE_UBIQUITI_E200,
82 	BOARD_TYPE_UBIQUITI_E300,
83 	BOARD_TYPE_UBIQUITI_E1000,
84 	BOARD_TYPE_RHINOLABS_SHASTA
85 };
86 
87 int
88 octrtc_match(struct device *parent, void *match, void *aux)
89 {
90 	struct mainbus_attach_args *maa = aux;
91 	struct cfdata *cf = match;
92 	int i;
93 
94 	if (strcmp(maa->maa_name, cf->cf_driver->cd_name) != 0)
95 		return 0;
96 	for (i = 0; i < nitems(no_rtc_boards); i++)
97 		if (octeon_boot_info->board_type == no_rtc_boards[i])
98 			return 0;
99 	return 1;
100 }
101 
102 void
103 octrtc_attach(struct device *parent, struct device *self, void *aux)
104 {
105 	struct octrtc_softc *sc = (struct octrtc_softc *)self;
106 
107 	sys_tod.tod_cookie = sc;
108 	sys_tod.tod_get = octrtc_gettime;
109 	sys_tod.tod_set = octrtc_settime;
110 
111 	printf(": DS1337\n");
112 }
113 
114 void
115 octrtc_gettime(void *cookie, time_t unused, struct tod_time *tt)
116 {
117 	uint8_t tod[8];
118 	uint8_t check;
119 	int i, rc;
120 
121 	int nretries = 2;
122 
123 	DPRINTF(("\nTOD: "));
124 	while (nretries--) {
125 		rc = octrtc_read(&tod[0], 1);	/* ia read */
126 		if (rc) {
127 			DPRINTF(("octrtc_read(0) failed %d", rc));
128 			return;
129 		}
130 
131 		for (i = 1; i < 8; i++) {
132 			rc = octrtc_read(&tod[i], 0);	/* current address */
133 			if (rc) {
134 				DPRINTF(("octrtc_read(%d) failed %d", i, rc));
135 				return;
136 			}
137 			DPRINTF(("%#X ", tod[i]));
138 		}
139 
140 		/* Check against time-wrap */
141 		rc = octrtc_read(&check, 1);	/* ia read */
142 		if (rc) {
143 			DPRINTF(("octrtc_read(check) failed %d", i, rc));
144 			return;
145 		}
146 		if ((check & 0xf) == (tod[0] & 0xf))
147 			break;
148 	}
149 	DPRINTF(("\n"));
150 
151 	DPRINTF(("Time: %d %d %d (%d) %02d:%02d:%02d\n",
152 	    ((tod[5] & 0x80) ? 2000 : 1900) + FROMBCD(tod[6]),	/* year */
153 	    FROMBCD(tod[5] & 0x1f),	/* month */
154 	    FROMBCD(tod[4] & 0x3f),	/* day */
155 	    (tod[3] & 0x7),		/* day of the week */
156 	    FROMBCD(tod[2] & 0x3f),	/* hour */
157 	    FROMBCD(tod[1] & 0x7f),	/* minute */
158 	    FROMBCD(tod[0] & 0x7f)));	/* second */
159 
160 	tt->year = ((tod[5] & 0x80) ? 100 : 0) + FROMBCD(tod[6]);
161 	tt->mon = FROMBCD(tod[5] & 0x1f);
162 	tt->day = FROMBCD(tod[4] & 0x3f);
163 	tt->dow = (tod[3] & 0x7);
164 	tt->hour = FROMBCD(tod[2] & 0x3f);
165 	if ((tod[2] & 0x40) && (tod[2] & 0x20))	/* adjust AM/PM format */
166 		tt->hour = (tt->hour + 12) % 24;
167 	tt->min = FROMBCD(tod[1] & 0x7f);
168 	tt->sec = FROMBCD(tod[0] & 0x7f);
169 }
170 
171 int
172 octrtc_read(uint8_t *data, char ia)
173 {
174 	int nretries = 5;
175 	union mio_tws_sw_twsi_reg twsi;
176 
177 again:
178 	twsi.reg = 0;
179 	twsi.field.v = 1;
180 	twsi.field.r = 1;
181 	twsi.field.sovr = 1;
182 	twsi.field.a = OCTRTC_REG;
183 	if (ia) {
184 		twsi.field.op = 1;
185 	}
186 
187 	octeon_xkphys_write_8(MIO_TWS_SW_TWSI, twsi.reg);
188 	/* The 1st bit is cleared when the operation is complete */
189 	do {
190 		delay(1000);
191 		twsi.reg = octeon_xkphys_read_8(MIO_TWS_SW_TWSI);
192 	} while (twsi.field.v);
193 	DPRINTF(("%#llX ", twsi.reg));
194 
195 	/*
196 	 * The data field is in the upper 32 bits and we're only
197 	 * interested in the first byte.
198 	 */
199 	*data = twsi.field.d & 0xff;
200 
201 	/* 8th bit is the read result: 1 = success, 0 = failure */
202 	if (twsi.field.r == 0) {
203 		/*
204 		 * Lost arbitration : 0x38, 0x68, 0xB0, 0x78
205 		 * Core busy as slave: 0x80, 0x88, 0xA0, 0xA8, 0xB8, 0xC0, 0xC8
206 		 */
207 		if (*data == 0x38 || *data == 0x68 || *data == 0xB0 ||
208 		    *data == 0x78 || *data == 0x80 || *data == 0x88 ||
209 		    *data == 0xA0 || *data == 0xA8 || *data == 0xB8 ||
210 		    *data == 0xC0 || *data == 0xC8)
211 			if (nretries--)
212 				goto again;
213 		return EIO;
214 	}
215 
216 	return 0;
217 }
218 
219 void
220 octrtc_settime(void *cookie, struct tod_time *tt)
221 {
222 	int nretries = 2;
223 	int rc, i;
224 	uint8_t tod[8];
225 	uint8_t check;
226 
227 	DPRINTF(("settime: %d %d %d (%d) %02d:%02d:%02d\n",
228 	    tt->year, tt->mon, tt->day, tt->dow,
229 	    tt->hour, tt->min, tt->sec));
230 
231 	tod[0] = TOBCD(tt->sec);
232 	tod[1] = TOBCD(tt->min);
233 	tod[2] = TOBCD(tt->hour);
234 	tod[3] = TOBCD(tt->dow);
235 	tod[4] = TOBCD(tt->day);
236 	tod[5] = TOBCD(tt->mon);
237 	if (tt->year >= 100)
238 		tod[5] |= 0x80;
239 	tod[6] = TOBCD(tt->year % 100);
240 
241 	while (nretries--) {
242 		for (i = 0; i < 7; i++) {
243 			rc = octrtc_write(tod[i]);
244 			if (rc) {
245 				DPRINTF(("octrtc_write(%d) failed %d", i, rc));
246 				return;
247 			}
248 		}
249 
250 		rc = octrtc_read(&check, 1);
251 		if (rc) {
252 			DPRINTF(("octrtc_read(check) failed %d", rc));
253 			return;
254 		}
255 
256 		if ((check & 0xf) == (tod[0] & 0xf))
257 			break;
258 	}
259 }
260 
261 int
262 octrtc_write(uint8_t data)
263 {
264 	union mio_tws_sw_twsi_reg twsi;
265 	int npoll = 128;
266 
267 	twsi.reg = 0;
268 	twsi.field.v = 1;
269 	twsi.field.sovr = 1;
270 	twsi.field.op = 1;
271 	twsi.field.a = OCTRTC_REG;
272 	twsi.field.d = data & 0xffffffff;
273 
274 	octeon_xkphys_write_8(MIO_TWS_SW_TWSI_EXT, 0);
275 	octeon_xkphys_write_8(MIO_TWS_SW_TWSI, twsi.reg);
276 	do {
277 		delay(1000);
278 		twsi.reg = octeon_xkphys_read_8(MIO_TWS_SW_TWSI);
279 	} while (twsi.field.v);
280 
281 	/* Try to read back */
282 	while (npoll-- && octrtc_read(&data, 0));
283 
284 	return npoll ? 0 : EIO;
285 }
286