1 /* $OpenBSD: octeon_iobus.c,v 1.2 2011/06/16 11:22:30 syuu Exp $ */ 2 3 /* 4 * Copyright (c) 2000-2004 Opsycon AB (www.opsycon.se) 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 16 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 19 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /* 30 * This is a iobus driver. 31 * It handles configuration of all devices on the processor bus except UART. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/conf.h> 38 #include <sys/malloc.h> 39 #include <sys/device.h> 40 #include <sys/proc.h> 41 42 #include <mips64/archtype.h> 43 44 #include <machine/autoconf.h> 45 #include <machine/atomic.h> 46 #include <machine/intr.h> 47 #include <machine/octeonvar.h> 48 49 #include <octeon/dev/octeonreg.h> 50 #include <octeon/dev/iobusvar.h> 51 #include <octeon/dev/cn30xxgmxreg.h> 52 53 int iobusmatch(struct device *, void *, void *); 54 void iobusattach(struct device *, struct device *, void *); 55 int iobusprint(void *, const char *); 56 int iobussubmatch(struct device *, void *, void *); 57 58 u_int8_t iobus_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t); 59 u_int16_t iobus_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t); 60 u_int32_t iobus_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t); 61 u_int64_t iobus_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t); 62 63 void iobus_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 64 u_int8_t); 65 void iobus_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 66 u_int16_t); 67 void iobus_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 68 u_int32_t); 69 void iobus_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t, 70 u_int64_t); 71 72 void iobus_read_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t, 73 u_int8_t *, bus_size_t); 74 void iobus_write_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t, 75 const u_int8_t *, bus_size_t); 76 void iobus_read_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t, 77 u_int8_t *, bus_size_t); 78 void iobus_write_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t, 79 const u_int8_t *, bus_size_t); 80 void iobus_read_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t, 81 u_int8_t *, bus_size_t); 82 void iobus_write_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t, 83 const u_int8_t *, bus_size_t); 84 85 int iobus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 86 bus_space_handle_t *); 87 void iobus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t); 88 int iobus_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t, 89 bus_size_t, bus_space_handle_t *); 90 91 void *iobus_space_vaddr(bus_space_tag_t, bus_space_handle_t); 92 93 bus_addr_t iobus_pa_to_device(paddr_t); 94 paddr_t iobus_device_to_pa(bus_addr_t); 95 96 struct cfattach iobus_ca = { 97 sizeof(struct device), iobusmatch, iobusattach 98 }; 99 100 struct cfdriver iobus_cd = { 101 NULL, "iobus", DV_DULL 102 }; 103 104 bus_space_t iobus_tag = { 105 .bus_base = PHYS_TO_XKPHYS(0, CCA_NC), 106 .bus_private = NULL, 107 ._space_read_1 = generic_space_read_1, 108 ._space_write_1 = generic_space_write_1, 109 ._space_read_2 = generic_space_read_2, 110 ._space_write_2 = generic_space_write_2, 111 ._space_read_4 = generic_space_read_4, 112 ._space_write_4 = generic_space_write_4, 113 ._space_read_8 = generic_space_read_8, 114 ._space_write_8 = generic_space_write_8, 115 ._space_read_raw_2 = generic_space_read_raw_2, 116 ._space_write_raw_2 = generic_space_write_raw_2, 117 ._space_read_raw_4 = generic_space_read_raw_4, 118 ._space_write_raw_4 = generic_space_write_raw_4, 119 ._space_read_raw_8 = generic_space_read_raw_8, 120 ._space_write_raw_8 = generic_space_write_raw_8, 121 ._space_map = iobus_space_map, 122 ._space_unmap = iobus_space_unmap, 123 ._space_subregion = generic_space_region, 124 ._space_vaddr = generic_space_vaddr 125 }; 126 127 bus_space_handle_t iobus_h; 128 129 struct machine_bus_dma_tag iobus_bus_dma_tag = { 130 NULL, /* _cookie */ 131 _dmamap_create, 132 _dmamap_destroy, 133 _dmamap_load, 134 _dmamap_load_mbuf, 135 _dmamap_load_uio, 136 _dmamap_load_raw, 137 _dmamap_load_buffer, 138 _dmamap_unload, 139 _dmamap_sync, 140 _dmamem_alloc, 141 _dmamem_free, 142 _dmamem_map, 143 _dmamem_unmap, 144 _dmamem_mmap, 145 iobus_pa_to_device, 146 iobus_device_to_pa, 147 0 148 }; 149 150 /* 151 * List of iobus child devices. 152 */ 153 154 #define IOBUSDEV(name, unitno, unit) \ 155 { name, unitno, unit, &iobus_tag, &iobus_bus_dma_tag } 156 const struct iobus_unit iobus_units[] = { 157 { OCTEON_CF_BASE, 0 }, /* octcf */ 158 { 0, 0 }, /* pcibus */ 159 { GMX0_BASE_PORT0, CIU_INT_GMX_DRP0 } /* cn30xxgmx */ 160 }; 161 struct iobus_attach_args iobus_children[] = { 162 IOBUSDEV("octcf", 0, &iobus_units[0]), 163 IOBUSDEV("pcibus", 0, &iobus_units[1]), 164 IOBUSDEV("cn30xxgmx", 0, &iobus_units[2]) 165 }; 166 #undef IOBUSDEV 167 168 /* 169 * Match bus only to targets which have this bus. 170 */ 171 int 172 iobusmatch(struct device *parent, void *match, void *aux) 173 { 174 return (1); 175 } 176 177 int 178 iobusprint(void *aux, const char *iobus) 179 { 180 struct iobus_attach_args *aa = aux; 181 182 if (iobus != NULL) 183 printf("%s at %s", aa->aa_name, iobus); 184 185 if (aa->aa_unit->addr != 0) 186 printf(" base 0x%llx", aa->aa_unit->addr); 187 if (aa->aa_unit->irq >= 0) 188 printf(" irq %d", aa->aa_unit->irq); 189 190 return (UNCONF); 191 } 192 193 int 194 iobussubmatch(struct device *parent, void *vcf, void *args) 195 { 196 struct cfdata *cf = vcf; 197 struct iobus_attach_args *aa = args; 198 199 if (strcmp(cf->cf_driver->cd_name, aa->aa_name) != 0) 200 return 0; 201 202 if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != (int)aa->aa_unit->addr) 203 return 0; 204 205 return (*cf->cf_attach->ca_match)(parent, cf, aa); 206 } 207 208 void 209 iobusattach(struct device *parent, struct device *self, void *aux) 210 { 211 struct octeon_config oc; 212 uint i; 213 214 /* 215 * Map and setup CRIME control registers. 216 */ 217 if (bus_space_map(&iobus_tag, OCTEON_CIU_BASE, OCTEON_CIU_SIZE, 0, 218 &iobus_h)) { 219 printf(": can't map CIU control registers\n"); 220 return; 221 } 222 223 printf("\n"); 224 225 octeon_intr_init(); 226 227 /* XXX */ 228 oc.mc_iobus_bust = &iobus_tag; 229 oc.mc_iobus_dmat = &iobus_bus_dma_tag; 230 void cn30xxfpa_bootstrap(struct octeon_config *); 231 cn30xxfpa_bootstrap(&oc); 232 void cn30xxpow_bootstrap(struct octeon_config *); 233 cn30xxpow_bootstrap(&oc); 234 235 /* 236 * Attach subdevices. 237 */ 238 for (i = 0; i < nitems(iobus_children); i++) 239 config_found_sm(self, iobus_children + i, 240 iobusprint, iobussubmatch); 241 } 242 243 int 244 iobus_space_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size, 245 int flags, bus_space_handle_t *bshp) 246 { 247 if (ISSET(flags, BUS_SPACE_MAP_KSEG0)) { 248 *bshp = PHYS_TO_CKSEG0(offs); 249 return 0; 250 } 251 if (ISSET(flags, BUS_SPACE_MAP_CACHEABLE)) 252 offs += 253 PHYS_TO_XKPHYS(0, CCA_CACHED) - PHYS_TO_XKPHYS(0, CCA_NC); 254 *bshp = t->bus_base + offs; 255 return 0; 256 } 257 258 void 259 iobus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size) 260 { 261 } 262 263 /* 264 * Iobus bus_dma helpers. 265 */ 266 267 bus_addr_t 268 iobus_pa_to_device(paddr_t pa) 269 { 270 return (bus_addr_t)pa; 271 } 272 273 paddr_t 274 iobus_device_to_pa(bus_addr_t addr) 275 { 276 return (paddr_t)addr; 277 } 278