xref: /openbsd-src/sys/arch/mips64/include/reloc.h (revision b420b0fb113bacbfc3e52d226ef6d2345096de5d)
1*b420b0fbSvisa /*	$OpenBSD: reloc.h,v 1.4 2017/08/13 14:56:09 visa Exp $	*/
27d70b5d7Svisa 
3*b420b0fbSvisa /*
4*b420b0fbSvisa  * Copyright (c) 1996-2004 Per Fogelstrom, Opsycon AB
5*b420b0fbSvisa  *
6*b420b0fbSvisa  * Redistribution and use in source and binary forms, with or without
7*b420b0fbSvisa  * modification, are permitted provided that the following conditions
8*b420b0fbSvisa  * are met:
9*b420b0fbSvisa  * 1. Redistributions of source code must retain the above copyright
10*b420b0fbSvisa  *    notice, this list of conditions and the following disclaimer.
11*b420b0fbSvisa  * 2. Redistributions in binary form must reproduce the above copyright
12*b420b0fbSvisa  *    notice, this list of conditions and the following disclaimer in the
13*b420b0fbSvisa  *    documentation and/or other materials provided with the distribution.
14*b420b0fbSvisa  *
15*b420b0fbSvisa  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
16*b420b0fbSvisa  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17*b420b0fbSvisa  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18*b420b0fbSvisa  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
19*b420b0fbSvisa  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20*b420b0fbSvisa  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21*b420b0fbSvisa  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22*b420b0fbSvisa  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23*b420b0fbSvisa  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24*b420b0fbSvisa  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25*b420b0fbSvisa  * SUCH DAMAGE.
26*b420b0fbSvisa  *
27*b420b0fbSvisa  */
287d70b5d7Svisa 
297d70b5d7Svisa #ifndef _MIPS64_RELOC_H_
307d70b5d7Svisa #define _MIPS64_RELOC_H_
317d70b5d7Svisa 
32*b420b0fbSvisa /*
33*b420b0fbSvisa  * Mips relocations.
34*b420b0fbSvisa  */
35*b420b0fbSvisa 
36*b420b0fbSvisa #define	R_MIPS_NONE	0	/* No reloc */
37*b420b0fbSvisa #define	R_MIPS_16	1	/* Direct 16 bit */
38*b420b0fbSvisa #define	R_MIPS_32	2	/* Direct 32 bit */
39*b420b0fbSvisa #define	R_MIPS_REL32	3	/* PC relative 32 bit */
40*b420b0fbSvisa #define	R_MIPS_26	4	/* Direct 26 bit shifted */
41*b420b0fbSvisa #define	R_MIPS_HI16	5	/* High 16 bit */
42*b420b0fbSvisa #define	R_MIPS_LO16	6	/* Low 16 bit */
43*b420b0fbSvisa #define	R_MIPS_GPREL16	7	/* GP relative 16 bit */
44*b420b0fbSvisa #define	R_MIPS_LITERAL	8	/* 16 bit literal entry */
45*b420b0fbSvisa #define	R_MIPS_GOT16	9	/* 16 bit GOT entry */
46*b420b0fbSvisa #define	R_MIPS_PC16	10	/* PC relative 16 bit */
47*b420b0fbSvisa #define	R_MIPS_CALL16	11	/* 16 bit GOT entry for function */
48*b420b0fbSvisa #define	R_MIPS_GPREL32	12	/* GP relative 32 bit */
49*b420b0fbSvisa 
50*b420b0fbSvisa #define	R_MIPS_64	18
51*b420b0fbSvisa 
52*b420b0fbSvisa #define	R_MIPS_REL32_64	((R_MIPS_64 << 8) | R_MIPS_REL32)
537d70b5d7Svisa 
547d70b5d7Svisa #endif /* !_MIPS64_RELOC_H_ */
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