xref: /openbsd-src/sys/arch/macppc/dev/if_bm.c (revision 89ed722c33692ad18452b9d394c650f8adc43407)
1*89ed722cSmpi /*	$OpenBSD: if_bm.c,v 1.44 2022/03/13 12:33:01 mpi Exp $	*/
2d9a5f17fSdrahn /*	$NetBSD: if_bm.c,v 1.1 1999/01/01 01:27:52 tsubai Exp $	*/
3d9a5f17fSdrahn 
4d9a5f17fSdrahn /*-
5d9a5f17fSdrahn  * Copyright (C) 1998, 1999 Tsubai Masanari.  All rights reserved.
6d9a5f17fSdrahn  *
7d9a5f17fSdrahn  * Redistribution and use in source and binary forms, with or without
8d9a5f17fSdrahn  * modification, are permitted provided that the following conditions
9d9a5f17fSdrahn  * are met:
10d9a5f17fSdrahn  * 1. Redistributions of source code must retain the above copyright
11d9a5f17fSdrahn  *    notice, this list of conditions and the following disclaimer.
12d9a5f17fSdrahn  * 2. Redistributions in binary form must reproduce the above copyright
13d9a5f17fSdrahn  *    notice, this list of conditions and the following disclaimer in the
14d9a5f17fSdrahn  *    documentation and/or other materials provided with the distribution.
15d9a5f17fSdrahn  * 3. The name of the author may not be used to endorse or promote products
16d9a5f17fSdrahn  *    derived from this software without specific prior written permission.
17d9a5f17fSdrahn  *
18d9a5f17fSdrahn  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19d9a5f17fSdrahn  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20d9a5f17fSdrahn  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21d9a5f17fSdrahn  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22d9a5f17fSdrahn  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23d9a5f17fSdrahn  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24d9a5f17fSdrahn  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25d9a5f17fSdrahn  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26d9a5f17fSdrahn  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27d9a5f17fSdrahn  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28d9a5f17fSdrahn  */
29d9a5f17fSdrahn 
30d9a5f17fSdrahn #include "bpfilter.h"
31d9a5f17fSdrahn 
32d9a5f17fSdrahn #include <sys/param.h>
33d9a5f17fSdrahn #include <sys/device.h>
34d9a5f17fSdrahn #include <sys/ioctl.h>
35d9a5f17fSdrahn #include <sys/mbuf.h>
36d9a5f17fSdrahn #include <sys/socket.h>
37d9a5f17fSdrahn #include <sys/systm.h>
38408231c3Sdrahn #include <sys/timeout.h>
39408231c3Sdrahn #include <sys/kernel.h>
40d9a5f17fSdrahn 
41d9a5f17fSdrahn #include <net/if.h>
42d9a5f17fSdrahn #include <netinet/in.h>
43d9a5f17fSdrahn #include <netinet/if_ether.h>
44d9a5f17fSdrahn #include <net/if_media.h>
45d9a5f17fSdrahn 
46d9a5f17fSdrahn #if NBPFILTER > 0
47d9a5f17fSdrahn #include <net/bpf.h>
48d9a5f17fSdrahn #endif
49d9a5f17fSdrahn 
50489e49f9Smiod #include <uvm/uvm_extern.h>
51d9a5f17fSdrahn 
52408231c3Sdrahn #include <dev/mii/mii.h>
53408231c3Sdrahn #include <dev/mii/miivar.h>
54408231c3Sdrahn #include <dev/mii/mii_bitbang.h>
55408231c3Sdrahn 
56d9a5f17fSdrahn #include <dev/ofw/openfirm.h>
57d9a5f17fSdrahn 
58e6d856e8Smickey #include <machine/bus.h>
59d9a5f17fSdrahn #include <machine/autoconf.h>
60d9a5f17fSdrahn 
6178a7e9fcSdrahn #include <macppc/dev/dbdma.h>
6278a7e9fcSdrahn #include <macppc/dev/if_bmreg.h>
63d9a5f17fSdrahn 
64d9a5f17fSdrahn #define BMAC_TXBUFS	2
65d9a5f17fSdrahn #define BMAC_RXBUFS	16
66d9a5f17fSdrahn #define BMAC_BUFLEN	2048
67651deeb8Smickey #define	BMAC_BUFSZ	((BMAC_RXBUFS + BMAC_TXBUFS + 2) * BMAC_BUFLEN)
68d9a5f17fSdrahn 
69d9a5f17fSdrahn struct bmac_softc {
70d9a5f17fSdrahn 	struct device sc_dev;
71d9a5f17fSdrahn 	struct arpcom arpcom;	/* per-instance network data */
72408231c3Sdrahn 	struct timeout sc_tick_ch;
73d9a5f17fSdrahn 	vaddr_t sc_regs;
74e6d856e8Smickey 	bus_dma_tag_t sc_dmat;
75651deeb8Smickey 	bus_dmamap_t sc_bufmap;
76651deeb8Smickey 	bus_dma_segment_t sc_bufseg[1];
77e6d856e8Smickey 	dbdma_regmap_t *sc_txdma, *sc_rxdma;
78e6d856e8Smickey 	dbdma_command_t *sc_txcmd, *sc_rxcmd;
79e6d856e8Smickey 	dbdma_t sc_rxdbdma, sc_txdbdma;
80d9a5f17fSdrahn 	caddr_t sc_txbuf;
81651deeb8Smickey 	paddr_t sc_txbuf_pa;
82d9a5f17fSdrahn 	caddr_t sc_rxbuf;
83651deeb8Smickey 	paddr_t sc_rxbuf_pa;
84d9a5f17fSdrahn 	int sc_rxlast;
85d9a5f17fSdrahn 	int sc_flags;
86d9a5f17fSdrahn 	int sc_debug;
87d9a5f17fSdrahn 	int txcnt_outstanding;
88408231c3Sdrahn 	struct mii_data sc_mii;
89d9a5f17fSdrahn };
90d9a5f17fSdrahn 
91d9a5f17fSdrahn #define BMAC_BMACPLUS	0x01
92d9a5f17fSdrahn 
93d9a5f17fSdrahn extern u_int *heathrow_FCR;
94d9a5f17fSdrahn 
95c4071fd1Smillert static __inline int bmac_read_reg(struct bmac_softc *, int);
96c4071fd1Smillert static __inline void bmac_write_reg(struct bmac_softc *, int, int);
97c4071fd1Smillert static __inline void bmac_set_bits(struct bmac_softc *, int, int);
98c4071fd1Smillert static __inline void bmac_reset_bits(struct bmac_softc *, int, int);
99d9a5f17fSdrahn 
100c4071fd1Smillert static int bmac_match(struct device *, void *, void *);
101c4071fd1Smillert static void bmac_attach(struct device *, struct device *, void *);
102c4071fd1Smillert static void bmac_reset_chip(struct bmac_softc *);
103c4071fd1Smillert static void bmac_init(struct bmac_softc *);
104c4071fd1Smillert static void bmac_init_dma(struct bmac_softc *);
105c4071fd1Smillert static int bmac_intr(void *);
106c4071fd1Smillert static int bmac_rint(void *);
107c4071fd1Smillert static void bmac_reset(struct bmac_softc *);
108c4071fd1Smillert static void bmac_stop(struct bmac_softc *);
109c4071fd1Smillert static void bmac_start(struct ifnet *);
110651deeb8Smickey static void bmac_transmit_packet(struct bmac_softc *, paddr_t, int);
111c4071fd1Smillert static int bmac_put(struct bmac_softc *, caddr_t, struct mbuf *);
112c4071fd1Smillert static struct mbuf *bmac_get(struct bmac_softc *, caddr_t, int);
113c4071fd1Smillert static void bmac_watchdog(struct ifnet *);
114c4071fd1Smillert static int bmac_ioctl(struct ifnet *, u_long, caddr_t);
115c4071fd1Smillert static int bmac_mediachange(struct ifnet *);
116c4071fd1Smillert static void bmac_mediastatus(struct ifnet *, struct ifmediareq *);
117c4071fd1Smillert static void bmac_setladrf(struct bmac_softc *);
118408231c3Sdrahn 
119c4071fd1Smillert int bmac_mii_readreg(struct device *, int, int);
120c4071fd1Smillert void bmac_mii_writereg(struct device *, int, int, int);
121c4071fd1Smillert void bmac_mii_statchg(struct device *);
122c4071fd1Smillert void bmac_mii_tick(void *);
123c4071fd1Smillert u_int32_t bmac_mbo_read(struct device *);
124c4071fd1Smillert void bmac_mbo_write(struct device *, u_int32_t);
125d9a5f17fSdrahn 
126*89ed722cSmpi const struct cfattach bm_ca = {
127d9a5f17fSdrahn 	sizeof(struct bmac_softc), bmac_match, bmac_attach
128d9a5f17fSdrahn };
129d9a5f17fSdrahn 
130408231c3Sdrahn struct mii_bitbang_ops bmac_mbo = {
131408231c3Sdrahn 	bmac_mbo_read, bmac_mbo_write,
132408231c3Sdrahn 	{ MIFDO, MIFDI, MIFDC, MIFDIR, 0 }
133408231c3Sdrahn };
134408231c3Sdrahn 
135d9a5f17fSdrahn struct cfdriver bm_cd = {
136d9a5f17fSdrahn 	NULL, "bm", DV_IFNET
137d9a5f17fSdrahn };
138d9a5f17fSdrahn 
139d9a5f17fSdrahn int
bmac_read_reg(struct bmac_softc * sc,int off)140093da1aaSdrahn bmac_read_reg(struct bmac_softc *sc, int off)
141d9a5f17fSdrahn {
142d9a5f17fSdrahn 	return in16rb(sc->sc_regs + off);
143d9a5f17fSdrahn }
144d9a5f17fSdrahn 
145d9a5f17fSdrahn void
bmac_write_reg(struct bmac_softc * sc,int off,int val)146093da1aaSdrahn bmac_write_reg(struct bmac_softc *sc, int off, int val)
147d9a5f17fSdrahn {
148d9a5f17fSdrahn 	out16rb(sc->sc_regs + off, val);
149d9a5f17fSdrahn }
150d9a5f17fSdrahn 
151d9a5f17fSdrahn void
bmac_set_bits(struct bmac_softc * sc,int off,int val)152093da1aaSdrahn bmac_set_bits(struct bmac_softc *sc, int off, int val)
153d9a5f17fSdrahn {
154d9a5f17fSdrahn 	val |= bmac_read_reg(sc, off);
155d9a5f17fSdrahn 	bmac_write_reg(sc, off, val);
156d9a5f17fSdrahn }
157d9a5f17fSdrahn 
158d9a5f17fSdrahn void
bmac_reset_bits(struct bmac_softc * sc,int off,int val)159093da1aaSdrahn bmac_reset_bits(struct bmac_softc *sc, int off, int val)
160d9a5f17fSdrahn {
161d9a5f17fSdrahn 	bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val);
162d9a5f17fSdrahn }
163d9a5f17fSdrahn 
164d9a5f17fSdrahn int
bmac_match(struct device * parent,void * cf,void * aux)165093da1aaSdrahn bmac_match(struct device *parent, void *cf, void *aux)
166d9a5f17fSdrahn {
167d9a5f17fSdrahn 	struct confargs *ca = aux;
168d9a5f17fSdrahn 
169d9a5f17fSdrahn 	if (ca->ca_nreg < 24 || ca->ca_nintr < 12)
170f4fa60d9Sbrad 		return (0);
171d9a5f17fSdrahn 
172d9a5f17fSdrahn 	if (strcmp(ca->ca_name, "bmac") == 0)		/* bmac */
173f4fa60d9Sbrad 		return (1);
174d9a5f17fSdrahn 	if (strcmp(ca->ca_name, "ethernet") == 0)	/* bmac+ */
175f4fa60d9Sbrad 		return (1);
176d9a5f17fSdrahn 
177f4fa60d9Sbrad 	return (0);
178d9a5f17fSdrahn }
179d9a5f17fSdrahn 
180d9a5f17fSdrahn void
bmac_attach(struct device * parent,struct device * self,void * aux)181093da1aaSdrahn bmac_attach(struct device *parent, struct device *self, void *aux)
182d9a5f17fSdrahn {
183d9a5f17fSdrahn 	struct confargs *ca = aux;
184d9a5f17fSdrahn 	struct bmac_softc *sc = (void *)self;
185f4fa60d9Sbrad 	struct ifnet *ifp = &sc->arpcom.ac_if;
186408231c3Sdrahn 	struct mii_data *mii = &sc->sc_mii;
187d9a5f17fSdrahn 	u_char laddr[6];
188651deeb8Smickey 	int nseg, error;
189d9a5f17fSdrahn 
190408231c3Sdrahn 	timeout_set(&sc->sc_tick_ch, bmac_mii_tick, sc);
191408231c3Sdrahn 
192d9a5f17fSdrahn 	sc->sc_flags =0;
193d9a5f17fSdrahn 	if (strcmp(ca->ca_name, "ethernet") == 0) {
194d9a5f17fSdrahn 		sc->sc_flags |= BMAC_BMACPLUS;
195d9a5f17fSdrahn 	}
196d9a5f17fSdrahn 
197d9a5f17fSdrahn 	ca->ca_reg[0] += ca->ca_baseaddr;
198d9a5f17fSdrahn 	ca->ca_reg[2] += ca->ca_baseaddr;
199d9a5f17fSdrahn 	ca->ca_reg[4] += ca->ca_baseaddr;
200d9a5f17fSdrahn 
201d9a5f17fSdrahn 	sc->sc_regs = (vaddr_t)mapiodev(ca->ca_reg[0], NBPG);
202d9a5f17fSdrahn 
203d9a5f17fSdrahn 	bmac_write_reg(sc, INTDISABLE, NoEventsMask);
204d9a5f17fSdrahn 
205d9a5f17fSdrahn 	if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 &&
206d9a5f17fSdrahn 	    OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) {
207d9a5f17fSdrahn 		printf(": cannot get mac-address\n");
208d9a5f17fSdrahn 		return;
209d9a5f17fSdrahn 	}
210d9a5f17fSdrahn 	bcopy(laddr, sc->arpcom.ac_enaddr, 6);
211d9a5f17fSdrahn 
212e6d856e8Smickey 	sc->sc_dmat = ca->ca_dmat;
213d9a5f17fSdrahn 	sc->sc_txdma = mapiodev(ca->ca_reg[2], 0x100);
214d9a5f17fSdrahn 	sc->sc_rxdma = mapiodev(ca->ca_reg[4], 0x100);
215e6d856e8Smickey 	sc->sc_txdbdma = dbdma_alloc(sc->sc_dmat, BMAC_TXBUFS);
216e6d856e8Smickey 	sc->sc_txcmd = sc->sc_txdbdma->d_addr;
217e6d856e8Smickey 	sc->sc_rxdbdma = dbdma_alloc(sc->sc_dmat, BMAC_RXBUFS + 1);
218e6d856e8Smickey 	sc->sc_rxcmd = sc->sc_rxdbdma->d_addr;
219651deeb8Smickey 
220651deeb8Smickey 	error = bus_dmamem_alloc(sc->sc_dmat, BMAC_BUFSZ,
221651deeb8Smickey 	    PAGE_SIZE, 0, sc->sc_bufseg, 1, &nseg, BUS_DMA_NOWAIT);
222651deeb8Smickey 	if (error) {
223651deeb8Smickey 		printf(": cannot allocate buffers (%d)\n", error);
224d9a5f17fSdrahn 		return;
225d9a5f17fSdrahn 	}
226d9a5f17fSdrahn 
227651deeb8Smickey 	error = bus_dmamem_map(sc->sc_dmat, sc->sc_bufseg, nseg,
228651deeb8Smickey 	    BMAC_BUFSZ, &sc->sc_txbuf, BUS_DMA_NOWAIT);
229651deeb8Smickey 	if (error) {
230651deeb8Smickey 		printf(": cannot map buffers (%d)\n", error);
231651deeb8Smickey 		bus_dmamem_free(sc->sc_dmat, sc->sc_bufseg, 1);
232651deeb8Smickey 		return;
233651deeb8Smickey 	}
234651deeb8Smickey 
235651deeb8Smickey 	error = bus_dmamap_create(sc->sc_dmat, BMAC_BUFSZ, 1, BMAC_BUFSZ, 0,
236651deeb8Smickey 	    BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->sc_bufmap);
237651deeb8Smickey 	if (error) {
238651deeb8Smickey 		printf(": cannot create buffer dmamap (%d)\n", error);
239651deeb8Smickey 		bus_dmamem_unmap(sc->sc_dmat, sc->sc_txbuf, BMAC_BUFSZ);
240651deeb8Smickey 		bus_dmamem_free(sc->sc_dmat, sc->sc_bufseg, 1);
241651deeb8Smickey 		return;
242651deeb8Smickey 	}
243651deeb8Smickey 
244651deeb8Smickey 	error = bus_dmamap_load(sc->sc_dmat, sc->sc_bufmap, sc->sc_txbuf,
245651deeb8Smickey 	    BMAC_BUFSZ, NULL, BUS_DMA_NOWAIT);
246651deeb8Smickey 	if (error) {
247651deeb8Smickey 		printf(": cannot load buffers dmamap (%d)\n", error);
248651deeb8Smickey 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufmap);
249651deeb8Smickey 		bus_dmamem_unmap(sc->sc_dmat, sc->sc_txbuf, BMAC_BUFSZ);
250651deeb8Smickey 		bus_dmamem_free(sc->sc_dmat, sc->sc_bufseg, nseg);
251651deeb8Smickey 		return;
252651deeb8Smickey 	}
253651deeb8Smickey 
254651deeb8Smickey 	sc->sc_txbuf_pa = sc->sc_bufmap->dm_segs->ds_addr;
255651deeb8Smickey 	sc->sc_rxbuf = sc->sc_txbuf + BMAC_BUFLEN * BMAC_TXBUFS;
256651deeb8Smickey 	sc->sc_rxbuf_pa = sc->sc_txbuf_pa + BMAC_BUFLEN * BMAC_TXBUFS;
257651deeb8Smickey 
258d9a5f17fSdrahn 	printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2],
259d9a5f17fSdrahn 		ether_sprintf(laddr));
260d9a5f17fSdrahn 
261d9a5f17fSdrahn 	mac_intr_establish(parent, ca->ca_intr[0], IST_LEVEL, IPL_NET,
2621ac74572Sderaadt 	    bmac_intr, sc, sc->sc_dev.dv_xname);
263d9a5f17fSdrahn 	mac_intr_establish(parent, ca->ca_intr[2], IST_LEVEL, IPL_NET,
2641ac74572Sderaadt 	    bmac_rint, sc, sc->sc_dev.dv_xname);
265d9a5f17fSdrahn 
266d9a5f17fSdrahn 	bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
267d9a5f17fSdrahn 	ifp->if_softc = sc;
268d9a5f17fSdrahn 	ifp->if_ioctl = bmac_ioctl;
269d9a5f17fSdrahn 	ifp->if_start = bmac_start;
270d9a5f17fSdrahn 	ifp->if_flags =
2719d022f3eStedu 		IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
272d9a5f17fSdrahn 	ifp->if_watchdog = bmac_watchdog;
273d9a5f17fSdrahn 
274408231c3Sdrahn 	mii->mii_ifp = ifp;
275408231c3Sdrahn 	mii->mii_readreg = bmac_mii_readreg;
276408231c3Sdrahn 	mii->mii_writereg = bmac_mii_writereg;
277408231c3Sdrahn 	mii->mii_statchg = bmac_mii_statchg;
278408231c3Sdrahn 
279408231c3Sdrahn 	ifmedia_init(&mii->mii_media, 0, bmac_mediachange, bmac_mediastatus);
280408231c3Sdrahn 	mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
281408231c3Sdrahn 	    MII_OFFSET_ANY, 0);
282408231c3Sdrahn 
283408231c3Sdrahn 	/* Choose a default media. */
284408231c3Sdrahn 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
285408231c3Sdrahn 		ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL);
286408231c3Sdrahn 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T);
287093da1aaSdrahn 	} else
288408231c3Sdrahn 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
289d9a5f17fSdrahn 
290d9a5f17fSdrahn 	bmac_reset_chip(sc);
291d9a5f17fSdrahn 
292d9a5f17fSdrahn 	if_attach(ifp);
293d9a5f17fSdrahn 	ether_ifattach(ifp);
294d9a5f17fSdrahn }
295d9a5f17fSdrahn 
296d9a5f17fSdrahn /*
297d9a5f17fSdrahn  * Reset and enable bmac by heathrow FCR.
298d9a5f17fSdrahn  */
299d9a5f17fSdrahn void
bmac_reset_chip(struct bmac_softc * sc)300093da1aaSdrahn bmac_reset_chip(struct bmac_softc *sc)
301d9a5f17fSdrahn {
302d9a5f17fSdrahn 	u_int v;
303d9a5f17fSdrahn 
304d9a5f17fSdrahn 	dbdma_reset(sc->sc_txdma);
305d9a5f17fSdrahn 	dbdma_reset(sc->sc_rxdma);
306d9a5f17fSdrahn 
307d9a5f17fSdrahn 	v = in32rb(heathrow_FCR);
308d9a5f17fSdrahn 
309d9a5f17fSdrahn 	v |= EnetEnable;
310d9a5f17fSdrahn 	out32rb(heathrow_FCR, v);
311d9a5f17fSdrahn 	delay(50000);
312d9a5f17fSdrahn 
313d9a5f17fSdrahn 	/* assert reset */
314d9a5f17fSdrahn 	v |= ResetEnetCell;
315d9a5f17fSdrahn 	out32rb(heathrow_FCR, v);
316408231c3Sdrahn 	delay(50000);
317d9a5f17fSdrahn 
318d9a5f17fSdrahn 	/* deassert reset */
319d9a5f17fSdrahn 	v &= ~ResetEnetCell;
320d9a5f17fSdrahn 	out32rb(heathrow_FCR, v);
321d9a5f17fSdrahn 	delay(50000);
322d9a5f17fSdrahn 
323d9a5f17fSdrahn 	/* enable */
324d9a5f17fSdrahn 	v |= EnetEnable;
325d9a5f17fSdrahn 	out32rb(heathrow_FCR, v);
326d9a5f17fSdrahn 	delay(50000);
327d9a5f17fSdrahn 
328d9a5f17fSdrahn 	/* make certain they stay set? */
329d9a5f17fSdrahn 	out32rb(heathrow_FCR, v);
330d9a5f17fSdrahn 	v = in32rb(heathrow_FCR);
331d9a5f17fSdrahn }
332d9a5f17fSdrahn 
333d9a5f17fSdrahn void
bmac_init(struct bmac_softc * sc)334093da1aaSdrahn bmac_init(struct bmac_softc *sc)
335d9a5f17fSdrahn {
336f4fa60d9Sbrad 	struct ifnet *ifp = &sc->arpcom.ac_if;
337d9a5f17fSdrahn 	struct ether_header *eh;
338d9a5f17fSdrahn 	caddr_t data;
339d9a5f17fSdrahn 	int tb;
340408231c3Sdrahn 	int i, bmcr;
341d9a5f17fSdrahn 	u_short *p;
342d9a5f17fSdrahn 
343d9a5f17fSdrahn 	bmac_reset_chip(sc);
344d9a5f17fSdrahn 
345408231c3Sdrahn 	/* XXX */
346408231c3Sdrahn 	bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR);
347408231c3Sdrahn 	bmcr &= ~BMCR_ISO;
348408231c3Sdrahn 	bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr);
349408231c3Sdrahn 
350d9a5f17fSdrahn 	bmac_write_reg(sc, RXRST, RxResetValue);
351d9a5f17fSdrahn 	bmac_write_reg(sc, TXRST, TxResetBit);
352d9a5f17fSdrahn 
353d9a5f17fSdrahn 	/* Wait for reset completion. */
354408231c3Sdrahn 	for (i = 1000; i > 0; i -= 10) {
355408231c3Sdrahn 		if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0)
356408231c3Sdrahn 			break;
357408231c3Sdrahn 		delay(10);
358408231c3Sdrahn 	}
359408231c3Sdrahn 	if (i <= 0)
360408231c3Sdrahn 		printf("%s: reset timeout\n", ifp->if_xname);
361d9a5f17fSdrahn 
362093da1aaSdrahn 	if (! (sc->sc_flags & BMAC_BMACPLUS))
363d9a5f17fSdrahn 		bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow);
364d9a5f17fSdrahn 
3650f9becdbSdrahn 	tb = ppc_mftbl();
366d9a5f17fSdrahn 	bmac_write_reg(sc, RSEED, tb);
367d9a5f17fSdrahn 	bmac_set_bits(sc, XIFC, TxOutputEnable);
368d9a5f17fSdrahn 	bmac_read_reg(sc, PAREG);
369d9a5f17fSdrahn 
370d9a5f17fSdrahn 	/* Reset various counters. */
371d9a5f17fSdrahn 	bmac_write_reg(sc, NCCNT, 0);
372d9a5f17fSdrahn 	bmac_write_reg(sc, NTCNT, 0);
373d9a5f17fSdrahn 	bmac_write_reg(sc, EXCNT, 0);
374d9a5f17fSdrahn 	bmac_write_reg(sc, LTCNT, 0);
375d9a5f17fSdrahn 	bmac_write_reg(sc, FRCNT, 0);
376d9a5f17fSdrahn 	bmac_write_reg(sc, LECNT, 0);
377d9a5f17fSdrahn 	bmac_write_reg(sc, AECNT, 0);
378d9a5f17fSdrahn 	bmac_write_reg(sc, FECNT, 0);
379d9a5f17fSdrahn 	bmac_write_reg(sc, RXCV, 0);
380d9a5f17fSdrahn 
381d9a5f17fSdrahn 	/* Set tx fifo information. */
382d9a5f17fSdrahn 	bmac_write_reg(sc, TXTH, 4);	/* 4 octets before tx starts */
383d9a5f17fSdrahn 
384d9a5f17fSdrahn 	bmac_write_reg(sc, TXFIFOCSR, 0);
385d9a5f17fSdrahn 	bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable);
386d9a5f17fSdrahn 
387d9a5f17fSdrahn 	/* Set rx fifo information. */
388d9a5f17fSdrahn 	bmac_write_reg(sc, RXFIFOCSR, 0);
389d9a5f17fSdrahn 	bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable);
390d9a5f17fSdrahn 
391d9a5f17fSdrahn 	/* Clear status register. */
392d9a5f17fSdrahn 	bmac_read_reg(sc, STATUS);
393d9a5f17fSdrahn 
394d9a5f17fSdrahn 	bmac_write_reg(sc, HASH3, 0);
395d9a5f17fSdrahn 	bmac_write_reg(sc, HASH2, 0);
396d9a5f17fSdrahn 	bmac_write_reg(sc, HASH1, 0);
397d9a5f17fSdrahn 	bmac_write_reg(sc, HASH0, 0);
398d9a5f17fSdrahn 
399d9a5f17fSdrahn 	/* Set MAC address. */
400f4fa60d9Sbrad 	p = (u_short *)sc->arpcom.ac_enaddr;
401d9a5f17fSdrahn 	bmac_write_reg(sc, MADD0, *p++);
402d9a5f17fSdrahn 	bmac_write_reg(sc, MADD1, *p++);
403d9a5f17fSdrahn 	bmac_write_reg(sc, MADD2, *p);
404d9a5f17fSdrahn 
405d9a5f17fSdrahn 	bmac_write_reg(sc, RXCFG,
406d9a5f17fSdrahn 		RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets);
407d9a5f17fSdrahn 
408d9a5f17fSdrahn 	if (ifp->if_flags & IFF_PROMISC)
409d9a5f17fSdrahn 		bmac_set_bits(sc, RXCFG, RxPromiscEnable);
410d9a5f17fSdrahn 
411d9a5f17fSdrahn 	bmac_init_dma(sc);
412d9a5f17fSdrahn 
41345a71b9eSdrahn 	/* Configure Media. */
41445a71b9eSdrahn 	mii_mediachg(&sc->sc_mii);
41545a71b9eSdrahn 
416d9a5f17fSdrahn 	/* Enable TX/RX */
417d9a5f17fSdrahn 	bmac_set_bits(sc, RXCFG, RxMACEnable);
418d9a5f17fSdrahn 	bmac_set_bits(sc, TXCFG, TxMACEnable);
419d9a5f17fSdrahn 
420d9a5f17fSdrahn 	bmac_write_reg(sc, INTDISABLE, NormalIntEvents);
421d9a5f17fSdrahn 
422d9a5f17fSdrahn 	ifp->if_flags |= IFF_RUNNING;
423de6cd8fbSdlg 	ifq_clr_oactive(&ifp->if_snd);
424d9a5f17fSdrahn 	ifp->if_timer = 0;
425d9a5f17fSdrahn 
426d9a5f17fSdrahn 	data = sc->sc_txbuf;
427d9a5f17fSdrahn 	eh = (struct ether_header *)data;
428d9a5f17fSdrahn 
429962ad9dfSdrahn 	bzero(data, sizeof(*eh) + ETHERMIN);
430f4fa60d9Sbrad 	bcopy(sc->arpcom.ac_enaddr, eh->ether_dhost, ETHER_ADDR_LEN);
431f4fa60d9Sbrad 	bcopy(sc->arpcom.ac_enaddr, eh->ether_shost, ETHER_ADDR_LEN);
4326d31d0a2Smiod 	bmac_transmit_packet(sc, sc->sc_txbuf_pa, sizeof(*eh) + ETHERMIN);
433d9a5f17fSdrahn 
434d9a5f17fSdrahn 	bmac_start(ifp);
435408231c3Sdrahn 
43645e96fbdSblambert 	timeout_add_sec(&sc->sc_tick_ch, 1);
437d9a5f17fSdrahn }
438d9a5f17fSdrahn 
439d9a5f17fSdrahn void
bmac_init_dma(struct bmac_softc * sc)440093da1aaSdrahn bmac_init_dma(struct bmac_softc *sc)
441d9a5f17fSdrahn {
442d9a5f17fSdrahn 	dbdma_command_t *cmd = sc->sc_rxcmd;
443d9a5f17fSdrahn 	int i;
444d9a5f17fSdrahn 
445d9a5f17fSdrahn 	dbdma_reset(sc->sc_txdma);
446d9a5f17fSdrahn 	dbdma_reset(sc->sc_rxdma);
447d9a5f17fSdrahn 
448d9a5f17fSdrahn 	bzero(sc->sc_txcmd, BMAC_TXBUFS * sizeof(dbdma_command_t));
449d9a5f17fSdrahn 	bzero(sc->sc_rxcmd, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
450d9a5f17fSdrahn 
451d9a5f17fSdrahn 	for (i = 0; i < BMAC_RXBUFS; i++) {
452d9a5f17fSdrahn 		DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN,
453651deeb8Smickey 			sc->sc_rxbuf_pa + BMAC_BUFLEN * i,
454d9a5f17fSdrahn 			DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
455d9a5f17fSdrahn 		cmd++;
456d9a5f17fSdrahn 	}
457d9a5f17fSdrahn 	DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0,
458d9a5f17fSdrahn 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS);
459e6d856e8Smickey 	dbdma_st32(&cmd->d_cmddep, sc->sc_rxdbdma->d_paddr);
460d9a5f17fSdrahn 
461d9a5f17fSdrahn 	sc->sc_rxlast = 0;
462d9a5f17fSdrahn 
463e6d856e8Smickey 	dbdma_start(sc->sc_rxdma, sc->sc_rxdbdma);
464d9a5f17fSdrahn }
465d9a5f17fSdrahn 
466d9a5f17fSdrahn int
bmac_intr(void * v)467093da1aaSdrahn bmac_intr(void *v)
468d9a5f17fSdrahn {
469d9a5f17fSdrahn 	struct bmac_softc *sc = v;
470f4fa60d9Sbrad 	struct ifnet *ifp = &sc->arpcom.ac_if;
471d9a5f17fSdrahn 	int stat;
472d9a5f17fSdrahn 
473d9a5f17fSdrahn #ifdef BMAC_DEBUG
474d9a5f17fSdrahn 	printf("bmac_intr called\n");
475d9a5f17fSdrahn #endif
476d9a5f17fSdrahn 	stat = bmac_read_reg(sc, STATUS);
477d9a5f17fSdrahn 	if (stat == 0)
478f4fa60d9Sbrad 		return (0);
479d9a5f17fSdrahn 
480d9a5f17fSdrahn #ifdef BMAC_DEBUG
481d9a5f17fSdrahn 	printf("bmac_intr status = 0x%x\n", stat);
482d9a5f17fSdrahn #endif
483d9a5f17fSdrahn 
484d9a5f17fSdrahn 	if (stat & IntFrameSent) {
485de6cd8fbSdlg 		ifq_clr_oactive(&ifp->if_snd);
486f4fa60d9Sbrad 		ifp->if_timer = 0;
487f4fa60d9Sbrad 		bmac_start(ifp);
488d9a5f17fSdrahn 	}
489d9a5f17fSdrahn 
490d9a5f17fSdrahn 	/* XXX should do more! */
491d9a5f17fSdrahn 
492f4fa60d9Sbrad 	return (1);
493d9a5f17fSdrahn }
494d9a5f17fSdrahn 
495d9a5f17fSdrahn int
bmac_rint(void * v)496093da1aaSdrahn bmac_rint(void *v)
497d9a5f17fSdrahn {
498d9a5f17fSdrahn 	struct bmac_softc *sc = v;
499f4fa60d9Sbrad 	struct ifnet *ifp = &sc->arpcom.ac_if;
50086666264Sdlg 	struct mbuf_list ml = MBUF_LIST_INITIALIZER();
501d9a5f17fSdrahn 	struct mbuf *m;
502d9a5f17fSdrahn 	dbdma_command_t *cmd;
503d9a5f17fSdrahn 	int status, resid, count, datalen;
504d9a5f17fSdrahn 	int i, n;
505d9a5f17fSdrahn 	void *data;
506d9a5f17fSdrahn #ifdef BMAC_DEBUG
507d9a5f17fSdrahn 	printf("bmac_rint() called\n");
508d9a5f17fSdrahn #endif
509d9a5f17fSdrahn 
510d9a5f17fSdrahn 	i = sc->sc_rxlast;
511d9a5f17fSdrahn 	for (n = 0; n < BMAC_RXBUFS; n++, i++) {
512d9a5f17fSdrahn 		if (i == BMAC_RXBUFS)
513d9a5f17fSdrahn 			i = 0;
514d9a5f17fSdrahn 		cmd = &sc->sc_rxcmd[i];
515d9a5f17fSdrahn 		status = dbdma_ld16(&cmd->d_status);
516d9a5f17fSdrahn 		resid = dbdma_ld16(&cmd->d_resid);
517d9a5f17fSdrahn 
518d9a5f17fSdrahn #ifdef BMAC_DEBUG
519d9a5f17fSdrahn 		if (status != 0 && status != 0x8440 && status != 0x9440)
520d9a5f17fSdrahn 			printf("bmac_rint status = 0x%x\n", status);
521d9a5f17fSdrahn #endif
522d9a5f17fSdrahn 
523d9a5f17fSdrahn 		if ((status & DBDMA_CNTRL_ACTIVE) == 0)	/* 0x9440 | 0x8440 */
524d9a5f17fSdrahn 			continue;
525d9a5f17fSdrahn 		count = dbdma_ld16(&cmd->d_count);
526408231c3Sdrahn 		datalen = count - resid;		/* 2 == framelen */
527d9a5f17fSdrahn 		if (datalen < sizeof(struct ether_header)) {
528d9a5f17fSdrahn 			printf("%s: short packet len = %d\n",
529d9a5f17fSdrahn 				ifp->if_xname, datalen);
530d9a5f17fSdrahn 			goto next;
531d9a5f17fSdrahn 		}
532d9a5f17fSdrahn 		DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0);
533d9a5f17fSdrahn 		data = sc->sc_rxbuf + BMAC_BUFLEN * i;
534408231c3Sdrahn 
535408231c3Sdrahn 		/* XXX Sometimes bmac reads one extra byte. */
536408231c3Sdrahn 		if (datalen == ETHER_MAX_LEN + 1)
537408231c3Sdrahn 			datalen--;
538d9a5f17fSdrahn 
539a1d2b33aSmartin 		/* Trim the CRC. */
540a1d2b33aSmartin 		datalen -= ETHER_CRC_LEN;
541a1d2b33aSmartin 
542a1d2b33aSmartin 		m = bmac_get(sc, data, datalen);
543d9a5f17fSdrahn 		if (m == NULL) {
544d9a5f17fSdrahn 			ifp->if_ierrors++;
545d9a5f17fSdrahn 			goto next;
546d9a5f17fSdrahn 		}
547d9a5f17fSdrahn 
54886666264Sdlg 		ml_enqueue(&ml, m);
549d9a5f17fSdrahn 
550d9a5f17fSdrahn next:
551d9a5f17fSdrahn 		DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS,
552d9a5f17fSdrahn 			DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
553d9a5f17fSdrahn 
554d9a5f17fSdrahn 		cmd->d_status = 0;
555d9a5f17fSdrahn 		cmd->d_resid = 0;
556d9a5f17fSdrahn 		sc->sc_rxlast = i + 1;
557d9a5f17fSdrahn 	}
558806fe44fSmpi 	bmac_mediachange(ifp);
559806fe44fSmpi 
560d9a5f17fSdrahn 	dbdma_continue(sc->sc_rxdma);
561d9a5f17fSdrahn 
56286666264Sdlg 	if_input(ifp, &ml);
563f4fa60d9Sbrad 	return (1);
564d9a5f17fSdrahn }
565d9a5f17fSdrahn 
566d9a5f17fSdrahn void
bmac_reset(struct bmac_softc * sc)567093da1aaSdrahn bmac_reset(struct bmac_softc *sc)
568d9a5f17fSdrahn {
569d9a5f17fSdrahn 	int s;
570d9a5f17fSdrahn 
571d9a5f17fSdrahn 	s = splnet();
572d9a5f17fSdrahn 	bmac_init(sc);
573d9a5f17fSdrahn 	splx(s);
574d9a5f17fSdrahn }
575d9a5f17fSdrahn 
576d9a5f17fSdrahn void
bmac_stop(struct bmac_softc * sc)577093da1aaSdrahn bmac_stop(struct bmac_softc *sc)
578d9a5f17fSdrahn {
579f4fa60d9Sbrad 	struct ifnet *ifp = &sc->arpcom.ac_if;
580d9a5f17fSdrahn 	int s;
581d9a5f17fSdrahn 
582d9a5f17fSdrahn 	s = splnet();
583d9a5f17fSdrahn 
584408231c3Sdrahn 	/* timeout */
585408231c3Sdrahn 	timeout_del(&sc->sc_tick_ch);
586408231c3Sdrahn 	mii_down(&sc->sc_mii);
587408231c3Sdrahn 
588d9a5f17fSdrahn 	/* Disable TX/RX. */
589d9a5f17fSdrahn 	bmac_reset_bits(sc, TXCFG, TxMACEnable);
590d9a5f17fSdrahn 	bmac_reset_bits(sc, RXCFG, RxMACEnable);
591d9a5f17fSdrahn 
592d9a5f17fSdrahn 	/* Disable all interrupts. */
593d9a5f17fSdrahn 	bmac_write_reg(sc, INTDISABLE, NoEventsMask);
594d9a5f17fSdrahn 
595d9a5f17fSdrahn 	dbdma_stop(sc->sc_txdma);
596d9a5f17fSdrahn 	dbdma_stop(sc->sc_rxdma);
597d9a5f17fSdrahn 
59847a8efafSmpi 	ifp->if_flags &= ~IFF_RUNNING;
599d9a5f17fSdrahn 	ifp->if_timer = 0;
600d9a5f17fSdrahn 
601d9a5f17fSdrahn 	splx(s);
602d9a5f17fSdrahn }
603d9a5f17fSdrahn 
604d9a5f17fSdrahn void
bmac_start(struct ifnet * ifp)605093da1aaSdrahn bmac_start(struct ifnet *ifp)
606d9a5f17fSdrahn {
607d9a5f17fSdrahn 	struct bmac_softc *sc = ifp->if_softc;
608d9a5f17fSdrahn 	struct mbuf *m;
609d9a5f17fSdrahn 	int tlen;
610d9a5f17fSdrahn 
611de6cd8fbSdlg 	if (!(ifp->if_flags & IFF_RUNNING) || ifq_is_oactive(&ifp->if_snd))
612d9a5f17fSdrahn 		return;
613d9a5f17fSdrahn 
614d9a5f17fSdrahn 	while (1) {
615de6cd8fbSdlg 		if (ifq_is_oactive(&ifp->if_snd))
616d9a5f17fSdrahn 			return;
617d9a5f17fSdrahn 
61863bcfa73Spatrick 		m = ifq_dequeue(&ifp->if_snd);
61964a3f76cSjsg 		if (m == NULL)
620d9a5f17fSdrahn 			break;
621d9a5f17fSdrahn #if NBPFILTER > 0
622d9a5f17fSdrahn 		/*
623d9a5f17fSdrahn 		 * If BPF is listening on this interface, let it see the
624d9a5f17fSdrahn 		 * packet before we commit it to the wire.
625d9a5f17fSdrahn 		 */
626d9a5f17fSdrahn 		if (ifp->if_bpf)
627c4acdf64Sdjm 			bpf_mtap(ifp->if_bpf, m, BPF_DIRECTION_OUT);
628d9a5f17fSdrahn #endif
629d9a5f17fSdrahn 
630de6cd8fbSdlg 		ifq_set_oactive(&ifp->if_snd);
631d9a5f17fSdrahn 		tlen = bmac_put(sc, sc->sc_txbuf, m);
632d9a5f17fSdrahn 
633d9a5f17fSdrahn 		/* 5 seconds to watch for failing to transmit */
634d9a5f17fSdrahn 		ifp->if_timer = 5;
635d9a5f17fSdrahn 
636651deeb8Smickey 		bmac_transmit_packet(sc, sc->sc_txbuf_pa, tlen);
637d9a5f17fSdrahn 	}
638d9a5f17fSdrahn }
639d9a5f17fSdrahn 
640d9a5f17fSdrahn void
bmac_transmit_packet(struct bmac_softc * sc,paddr_t pa,int len)641093da1aaSdrahn bmac_transmit_packet(struct bmac_softc *sc, paddr_t pa, int len)
642d9a5f17fSdrahn {
643d9a5f17fSdrahn 	dbdma_command_t *cmd = sc->sc_txcmd;
644d9a5f17fSdrahn 
645651deeb8Smickey 	DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, pa,
646d9a5f17fSdrahn 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
647d9a5f17fSdrahn 	cmd++;
648d9a5f17fSdrahn 	DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0,
649d9a5f17fSdrahn 		DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
650d9a5f17fSdrahn 
651e6d856e8Smickey 	dbdma_start(sc->sc_txdma, sc->sc_txdbdma);
652d9a5f17fSdrahn }
653d9a5f17fSdrahn 
654d9a5f17fSdrahn int
bmac_put(struct bmac_softc * sc,caddr_t buff,struct mbuf * m)655093da1aaSdrahn bmac_put(struct bmac_softc *sc, caddr_t buff, struct mbuf *m)
656d9a5f17fSdrahn {
657d9a5f17fSdrahn 	struct mbuf *n;
658d9a5f17fSdrahn 	int len, tlen = 0;
659d9a5f17fSdrahn 
660d9a5f17fSdrahn 	for (; m; m = n) {
661d9a5f17fSdrahn 		len = m->m_len;
662d9a5f17fSdrahn 		if (len == 0) {
663822e8206Smpi 			n = m_free(m);
664d9a5f17fSdrahn 			continue;
665d9a5f17fSdrahn 		}
666d9a5f17fSdrahn 		bcopy(mtod(m, caddr_t), buff, len);
667d9a5f17fSdrahn 		buff += len;
668d9a5f17fSdrahn 		tlen += len;
669822e8206Smpi 		n = m_free(m);
670d9a5f17fSdrahn 	}
671d9a5f17fSdrahn 	if (tlen > NBPG)
672d9a5f17fSdrahn 		panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname);
673d9a5f17fSdrahn 
674f4fa60d9Sbrad 	return (tlen);
675d9a5f17fSdrahn }
676d9a5f17fSdrahn 
677d9a5f17fSdrahn struct mbuf *
bmac_get(struct bmac_softc * sc,caddr_t pkt,int totlen)678093da1aaSdrahn bmac_get(struct bmac_softc *sc, caddr_t pkt, int totlen)
679d9a5f17fSdrahn {
680d9a5f17fSdrahn 	struct mbuf *m;
681d9a5f17fSdrahn 	struct mbuf *top, **mp;
682d9a5f17fSdrahn 	int len;
683d9a5f17fSdrahn 
684d9a5f17fSdrahn 	MGETHDR(m, M_DONTWAIT, MT_DATA);
68564a3f76cSjsg 	if (m == NULL)
686f4fa60d9Sbrad 		return (0);
687d9a5f17fSdrahn 	m->m_pkthdr.len = totlen;
688d9a5f17fSdrahn 	len = MHLEN;
689d9a5f17fSdrahn 	top = 0;
690d9a5f17fSdrahn 	mp = &top;
691d9a5f17fSdrahn 
692d9a5f17fSdrahn 	while (totlen > 0) {
693d9a5f17fSdrahn 		if (top) {
694d9a5f17fSdrahn 			MGET(m, M_DONTWAIT, MT_DATA);
69564a3f76cSjsg 			if (m == NULL) {
696d9a5f17fSdrahn 				m_freem(top);
697f4fa60d9Sbrad 				return (0);
698d9a5f17fSdrahn 			}
699d9a5f17fSdrahn 			len = MLEN;
700d9a5f17fSdrahn 		}
701d9a5f17fSdrahn 		if (totlen >= MINCLSIZE) {
702d9a5f17fSdrahn 			MCLGET(m, M_DONTWAIT);
703d9a5f17fSdrahn 			if ((m->m_flags & M_EXT) == 0) {
704d9a5f17fSdrahn 				m_free(m);
705d9a5f17fSdrahn 				m_freem(top);
706f4fa60d9Sbrad 				return (0);
707d9a5f17fSdrahn 			}
708d9a5f17fSdrahn 			len = MCLBYTES;
709d9a5f17fSdrahn 		}
710d9a5f17fSdrahn 		m->m_len = len = min(totlen, len);
711d9a5f17fSdrahn 		bcopy(pkt, mtod(m, caddr_t), len);
712d9a5f17fSdrahn 		pkt += len;
713d9a5f17fSdrahn 		totlen -= len;
714d9a5f17fSdrahn 		*mp = m;
715d9a5f17fSdrahn 		mp = &m->m_next;
716d9a5f17fSdrahn 	}
717d9a5f17fSdrahn 
718f4fa60d9Sbrad 	return (top);
719d9a5f17fSdrahn }
720d9a5f17fSdrahn 
721d9a5f17fSdrahn void
bmac_watchdog(struct ifnet * ifp)722093da1aaSdrahn bmac_watchdog(struct ifnet *ifp)
723d9a5f17fSdrahn {
724d9a5f17fSdrahn 	struct bmac_softc *sc = ifp->if_softc;
725d9a5f17fSdrahn 
726d9a5f17fSdrahn 	bmac_reset_bits(sc, RXCFG, RxMACEnable);
727d9a5f17fSdrahn 	bmac_reset_bits(sc, TXCFG, TxMACEnable);
728d9a5f17fSdrahn 
729d9a5f17fSdrahn 	printf("%s: device timeout\n", ifp->if_xname);
730d9a5f17fSdrahn 	ifp->if_oerrors++;
731d9a5f17fSdrahn 
732d9a5f17fSdrahn 	bmac_reset(sc);
733d9a5f17fSdrahn }
734d9a5f17fSdrahn 
735d9a5f17fSdrahn int
bmac_ioctl(struct ifnet * ifp,u_long cmd,caddr_t data)736093da1aaSdrahn bmac_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
737d9a5f17fSdrahn {
738d9a5f17fSdrahn 	struct bmac_softc *sc = ifp->if_softc;
739d9a5f17fSdrahn 	struct ifreq *ifr = (struct ifreq *)data;
740d9a5f17fSdrahn 	int s, error = 0;
741d9a5f17fSdrahn 
742d9a5f17fSdrahn 	s = splnet();
743d9a5f17fSdrahn 
744d9a5f17fSdrahn 	switch (cmd) {
745d9a5f17fSdrahn 	case SIOCSIFADDR:
746d9a5f17fSdrahn 		ifp->if_flags |= IFF_UP;
747d9a5f17fSdrahn 		bmac_init(sc);
748d9a5f17fSdrahn 		break;
749d9a5f17fSdrahn 
750d9a5f17fSdrahn 	case SIOCSIFFLAGS:
751d9a5f17fSdrahn 		if ((ifp->if_flags & IFF_UP) == 0 &&
752d9a5f17fSdrahn 		    (ifp->if_flags & IFF_RUNNING) != 0) {
753d9a5f17fSdrahn 			/*
754d9a5f17fSdrahn 			 * If interface is marked down and it is running, then
755d9a5f17fSdrahn 			 * stop it.
756d9a5f17fSdrahn 			 */
757d9a5f17fSdrahn 			bmac_stop(sc);
758d9a5f17fSdrahn 			ifp->if_flags &= ~IFF_RUNNING;
759d9a5f17fSdrahn 		} else if ((ifp->if_flags & IFF_UP) != 0 &&
760d9a5f17fSdrahn 		    (ifp->if_flags & IFF_RUNNING) == 0) {
761d9a5f17fSdrahn 			/*
762d9a5f17fSdrahn 			 * If interface is marked up and it is stopped, then
763d9a5f17fSdrahn 			 * start it.
764d9a5f17fSdrahn 			 */
765d9a5f17fSdrahn 			bmac_init(sc);
766d9a5f17fSdrahn 		} else {
767d9a5f17fSdrahn 			/*
768d9a5f17fSdrahn 			 * Reset the interface to pick up changes in any other
769d9a5f17fSdrahn 			 * flags that affect hardware registers.
770d9a5f17fSdrahn 			 */
771d9a5f17fSdrahn 			/*bmac_stop(sc);*/
772d9a5f17fSdrahn 			bmac_init(sc);
773d9a5f17fSdrahn 		}
774d9a5f17fSdrahn #ifdef BMAC_DEBUG
775d9a5f17fSdrahn 		if (ifp->if_flags & IFF_DEBUG)
776d9a5f17fSdrahn 			sc->sc_debug = 1;
777d9a5f17fSdrahn 		else
778d9a5f17fSdrahn 			sc->sc_debug = 0;
779d9a5f17fSdrahn #endif
780d9a5f17fSdrahn 		break;
781d9a5f17fSdrahn 
782d9a5f17fSdrahn 	case SIOCGIFMEDIA:
783d9a5f17fSdrahn 	case SIOCSIFMEDIA:
784408231c3Sdrahn 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
785d9a5f17fSdrahn 		break;
786d9a5f17fSdrahn 
787d9a5f17fSdrahn 	default:
788775775feSbrad 		error = ether_ioctl(ifp, &sc->arpcom, cmd, data);
789d9a5f17fSdrahn 	}
790d9a5f17fSdrahn 
79134f0f0fdSbrad 	if (error == ENETRESET) {
79234f0f0fdSbrad 		if (ifp->if_flags & IFF_RUNNING) {
79334f0f0fdSbrad 			bmac_init(sc);
79434f0f0fdSbrad 			bmac_setladrf(sc);
79534f0f0fdSbrad 		}
79634f0f0fdSbrad 		error = 0;
79734f0f0fdSbrad 	}
79834f0f0fdSbrad 
799d9a5f17fSdrahn 	splx(s);
800f4fa60d9Sbrad 	return (error);
801d9a5f17fSdrahn }
802d9a5f17fSdrahn 
803d9a5f17fSdrahn int
bmac_mediachange(struct ifnet * ifp)804093da1aaSdrahn bmac_mediachange(struct ifnet *ifp)
805d9a5f17fSdrahn {
806408231c3Sdrahn 	struct bmac_softc *sc = ifp->if_softc;
807408231c3Sdrahn 
808408231c3Sdrahn 	return mii_mediachg(&sc->sc_mii);
809d9a5f17fSdrahn }
810d9a5f17fSdrahn 
811d9a5f17fSdrahn void
bmac_mediastatus(struct ifnet * ifp,struct ifmediareq * ifmr)812093da1aaSdrahn bmac_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
813d9a5f17fSdrahn {
814408231c3Sdrahn 	struct bmac_softc *sc = ifp->if_softc;
815d9a5f17fSdrahn 
816408231c3Sdrahn 	mii_pollstat(&sc->sc_mii);
817408231c3Sdrahn 
818408231c3Sdrahn 	ifmr->ifm_status = sc->sc_mii.mii_media_status;
819408231c3Sdrahn 	ifmr->ifm_active = sc->sc_mii.mii_media_active;
820d9a5f17fSdrahn }
821d9a5f17fSdrahn 
822d9a5f17fSdrahn /*
823d9a5f17fSdrahn  * Set up the logical address filter.
824d9a5f17fSdrahn  */
825d9a5f17fSdrahn void
bmac_setladrf(struct bmac_softc * sc)826093da1aaSdrahn bmac_setladrf(struct bmac_softc *sc)
827d9a5f17fSdrahn {
828ef787866Smpi 	struct arpcom *ac = &sc->arpcom;
829f4fa60d9Sbrad 	struct ifnet *ifp = &sc->arpcom.ac_if;
830d9a5f17fSdrahn 	struct ether_multi *enm;
831d9a5f17fSdrahn 	struct ether_multistep step;
832d9a5f17fSdrahn 	u_int32_t crc;
833d9a5f17fSdrahn 	u_int16_t hash[4];
834039f20deSdrahn 	int x;
835d9a5f17fSdrahn 
836d9a5f17fSdrahn 	/*
837d9a5f17fSdrahn 	 * Set up multicast address filter by passing all multicast addresses
838d9a5f17fSdrahn 	 * through a crc generator, and then using the high order 6 bits as an
839d9a5f17fSdrahn 	 * index into the 64 bit logical address filter.  The high order bit
840d9a5f17fSdrahn 	 * selects the word, while the rest of the bits select the bit within
841d9a5f17fSdrahn 	 * the word.
842d9a5f17fSdrahn 	 */
843d9a5f17fSdrahn 
844d9a5f17fSdrahn 	if (ifp->if_flags & IFF_PROMISC) {
845d9a5f17fSdrahn 		bmac_set_bits(sc, RXCFG, RxPromiscEnable);
846408231c3Sdrahn 		return;
847408231c3Sdrahn 	}
848408231c3Sdrahn 
849ef787866Smpi 	if (ac->ac_multirangecnt > 0)
850ef787866Smpi 		ifp->if_flags |= IFF_ALLMULTI;
851ef787866Smpi 
852408231c3Sdrahn 	if (ifp->if_flags & IFF_ALLMULTI) {
853408231c3Sdrahn 		hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
854408231c3Sdrahn 		goto chipit;
855d9a5f17fSdrahn 	}
856d9a5f17fSdrahn 
857d9a5f17fSdrahn 	hash[3] = hash[2] = hash[1] = hash[0] = 0;
858ef787866Smpi 	ETHER_FIRST_MULTI(step, ac, enm);
859d9a5f17fSdrahn 	while (enm != NULL) {
860039f20deSdrahn 		crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
861d9a5f17fSdrahn 
862d9a5f17fSdrahn 		/* Just want the 6 most significant bits. */
863d9a5f17fSdrahn 		crc >>= 26;
864d9a5f17fSdrahn 
865d9a5f17fSdrahn 		/* Set the corresponding bit in the filter. */
866d9a5f17fSdrahn 		hash[crc >> 4] |= 1 << (crc & 0xf);
867d9a5f17fSdrahn 
868d9a5f17fSdrahn 		ETHER_NEXT_MULTI(step, enm);
869d9a5f17fSdrahn 	}
870408231c3Sdrahn 
871d9a5f17fSdrahn 	ifp->if_flags &= ~IFF_ALLMULTI;
872d9a5f17fSdrahn 
873408231c3Sdrahn chipit:
874408231c3Sdrahn 	bmac_write_reg(sc, HASH0, hash[0]);
875408231c3Sdrahn 	bmac_write_reg(sc, HASH1, hash[1]);
876408231c3Sdrahn 	bmac_write_reg(sc, HASH2, hash[2]);
877408231c3Sdrahn 	bmac_write_reg(sc, HASH3, hash[3]);
878408231c3Sdrahn 	x = bmac_read_reg(sc, RXCFG);
879408231c3Sdrahn 	x &= ~RxPromiscEnable;
880408231c3Sdrahn 	x |= RxHashFilterEnable;
881408231c3Sdrahn 	bmac_write_reg(sc, RXCFG, x);
882d9a5f17fSdrahn }
883d9a5f17fSdrahn 
884408231c3Sdrahn int
bmac_mii_readreg(struct device * dev,int phy,int reg)885093da1aaSdrahn bmac_mii_readreg(struct device *dev, int phy, int reg)
886d9a5f17fSdrahn {
887408231c3Sdrahn 	return mii_bitbang_readreg(dev, &bmac_mbo, phy, reg);
888d9a5f17fSdrahn }
889d9a5f17fSdrahn 
890d9a5f17fSdrahn void
bmac_mii_writereg(struct device * dev,int phy,int reg,int val)891093da1aaSdrahn bmac_mii_writereg(struct device *dev, int phy, int reg, int val)
892d9a5f17fSdrahn {
893408231c3Sdrahn 	mii_bitbang_writereg(dev, &bmac_mbo, phy, reg, val);
894d9a5f17fSdrahn }
895d9a5f17fSdrahn 
896408231c3Sdrahn u_int32_t
bmac_mbo_read(struct device * dev)897093da1aaSdrahn bmac_mbo_read(struct device *dev)
898d9a5f17fSdrahn {
899408231c3Sdrahn 	struct bmac_softc *sc = (void *)dev;
900d9a5f17fSdrahn 
901408231c3Sdrahn 	return bmac_read_reg(sc, MIFCSR);
902d9a5f17fSdrahn }
903d9a5f17fSdrahn 
904d9a5f17fSdrahn void
bmac_mbo_write(struct device * dev,u_int32_t val)905093da1aaSdrahn bmac_mbo_write(struct device *dev, u_int32_t val)
906d9a5f17fSdrahn {
907408231c3Sdrahn 	struct bmac_softc *sc = (void *)dev;
908408231c3Sdrahn 
909408231c3Sdrahn 	bmac_write_reg(sc, MIFCSR, val);
910d9a5f17fSdrahn }
911d9a5f17fSdrahn 
912d9a5f17fSdrahn void
bmac_mii_statchg(struct device * dev)913093da1aaSdrahn bmac_mii_statchg(struct device *dev)
914d9a5f17fSdrahn {
915408231c3Sdrahn 	struct bmac_softc *sc = (void *)dev;
916408231c3Sdrahn 	int x;
917408231c3Sdrahn 
918408231c3Sdrahn 	/* Update duplex mode in TX configuration */
919408231c3Sdrahn 	x = bmac_read_reg(sc, TXCFG);
920408231c3Sdrahn 	if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
921408231c3Sdrahn 		x |= TxFullDuplex;
922408231c3Sdrahn 	else
923408231c3Sdrahn 		x &= ~TxFullDuplex;
924408231c3Sdrahn 	bmac_write_reg(sc, TXCFG, x);
925408231c3Sdrahn 
926408231c3Sdrahn #ifdef BMAC_DEBUG
927408231c3Sdrahn 	printf("bmac_mii_statchg 0x%x\n",
928408231c3Sdrahn 		IFM_OPTIONS(sc->sc_mii.mii_media_active));
929d9a5f17fSdrahn #endif
930d9a5f17fSdrahn }
931408231c3Sdrahn 
932408231c3Sdrahn void
bmac_mii_tick(void * v)933093da1aaSdrahn bmac_mii_tick(void *v)
934408231c3Sdrahn {
935408231c3Sdrahn 	struct bmac_softc *sc = v;
936408231c3Sdrahn 	int s;
937408231c3Sdrahn 
938408231c3Sdrahn 	s = splnet();
939408231c3Sdrahn 	mii_tick(&sc->sc_mii);
940408231c3Sdrahn 	splx(s);
941408231c3Sdrahn 
94229e86e5eSblambert 	timeout_add_sec(&sc->sc_tick_ch, 1);
943d9a5f17fSdrahn }
944