1*55882323Smpi /* $OpenBSD: i2sreg.h,v 1.3 2011/06/07 16:29:51 mpi Exp $ */ 2daa2e9a1Sgwk /*- 3daa2e9a1Sgwk * Copyright (c) 2002 Tsubai Masanari. All rights reserved. 4daa2e9a1Sgwk * 5daa2e9a1Sgwk * Redistribution and use in source and binary forms, with or without 6daa2e9a1Sgwk * modification, are permitted provided that the following conditions 7daa2e9a1Sgwk * are met: 8daa2e9a1Sgwk * 1. Redistributions of source code must retain the above copyright 9daa2e9a1Sgwk * notice, this list of conditions and the following disclaimer. 10daa2e9a1Sgwk * 2. Redistributions in binary form must reproduce the above copyright 11daa2e9a1Sgwk * notice, this list of conditions and the following disclaimer in the 12daa2e9a1Sgwk * documentation and/or other materials provided with the distribution. 13daa2e9a1Sgwk * 3. The name of the author may not be used to endorse or promote products 14daa2e9a1Sgwk * derived from this software without specific prior written permission. 15daa2e9a1Sgwk * 16daa2e9a1Sgwk * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17daa2e9a1Sgwk * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18daa2e9a1Sgwk * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19daa2e9a1Sgwk * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20daa2e9a1Sgwk * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21daa2e9a1Sgwk * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22daa2e9a1Sgwk * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23daa2e9a1Sgwk * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24daa2e9a1Sgwk * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25daa2e9a1Sgwk * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26daa2e9a1Sgwk */ 27daa2e9a1Sgwk 28daa2e9a1Sgwk /* I2S registers */ 29daa2e9a1Sgwk #define I2S_INT 0x00 30daa2e9a1Sgwk #define I2S_FORMAT 0x10 31daa2e9a1Sgwk #define I2S_FRAMECOUNT 0x40 32daa2e9a1Sgwk #define I2S_FRAMEMATCH 0x50 33daa2e9a1Sgwk #define I2S_WORDSIZE 0x60 34daa2e9a1Sgwk 35daa2e9a1Sgwk /* I2S_INT register definitions */ 36daa2e9a1Sgwk #define I2SClockOffset 0x3c 37daa2e9a1Sgwk #define I2S_INT_CLKSTOPPEND 0x01000000 38daa2e9a1Sgwk 39*55882323Smpi #define I2S_SELECT_SPEAKER 1 << 0 40*55882323Smpi #define I2S_SELECT_HEADPHONE 1 << 1 41*55882323Smpi #define I2S_SELECT_LINEOUT 1 << 2 42*55882323Smpi 43daa2e9a1Sgwk /* FCR(0x3c) bits */ 44daa2e9a1Sgwk #define I2S0CLKEN 0x1000 45daa2e9a1Sgwk #define I2S0EN 0x2000 46daa2e9a1Sgwk #define I2S1CLKEN 0x080000 47daa2e9a1Sgwk #define I2S1EN 0x100000 48daa2e9a1Sgwk 49daa2e9a1Sgwk 50daa2e9a1Sgwk #define CLKSRC_49MHz 0x80000000 /* Use 49152000Hz Osc. */ 51daa2e9a1Sgwk #define CLKSRC_45MHz 0x40000000 /* Use 45158400Hz Osc. */ 52daa2e9a1Sgwk #define CLKSRC_18MHz 0x00000000 /* Use 18432000Hz Osc. */ 53daa2e9a1Sgwk #define CLKSRC_VS 0x01fa0000 /* Magic value of xserve vu-meter */ 54daa2e9a1Sgwk #define MCLK_DIV 0x1f000000 /* MCLK = SRC / DIV */ 55daa2e9a1Sgwk #define MCLK_DIV1 0x14000000 /* MCLK = SRC */ 56daa2e9a1Sgwk #define MCLK_DIV3 0x13000000 /* MCLK = SRC / 3 */ 57daa2e9a1Sgwk #define MCLK_DIV5 0x12000000 /* MCLK = SRC / 5 */ 58daa2e9a1Sgwk #define SCLK_DIV 0x00f00000 /* SCLK = MCLK / DIV */ 59daa2e9a1Sgwk #define SCLK_DIV1 0x00800000 60daa2e9a1Sgwk #define SCLK_DIV3 0x00900000 61daa2e9a1Sgwk #define SCLK_MASTER 0x00080000 /* Master mode */ 62daa2e9a1Sgwk #define SCLK_SLAVE 0x00000000 /* Slave mode */ 63daa2e9a1Sgwk #define SERIAL_FORMAT 0x00070000 64daa2e9a1Sgwk #define SERIAL_SONY 0x00000000 65daa2e9a1Sgwk #define SERIAL_64x 0x00010000 66daa2e9a1Sgwk #define SERIAL_32x 0x00020000 67daa2e9a1Sgwk #define SERIAL_DAV 0x00040000 68daa2e9a1Sgwk #define SERIAL_SILICON 0x00050000 69