xref: /openbsd-src/sys/arch/loongson/include/cpu.h (revision f2da64fbbbf1b03f09f390ab01267c93dfd77c4c)
1 /* $OpenBSD: cpu.h,v 1.6 2016/01/05 05:27:54 visa Exp $ */
2 /*-
3  * Copyright (c) 1992, 1993
4  *	The Regents of the University of California.  All rights reserved.
5  *
6  * This code is derived from software contributed to Berkeley by
7  * Ralph Campbell and Rick Macklem.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. Neither the name of the University nor the names of its contributors
18  *    may be used to endorse or promote products derived from this software
19  *    without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  *	Copyright (C) 1989 Digital Equipment Corporation.
34  *	Permission to use, copy, modify, and distribute this software and
35  *	its documentation for any purpose and without fee is hereby granted,
36  *	provided that the above copyright notice appears in all copies.
37  *	Digital Equipment Corporation makes no representations about the
38  *	suitability of this software for any purpose.  It is provided "as is"
39  *	without express or implied warranty.
40  *
41  *	from: @(#)cpu.h	8.4 (Berkeley) 1/4/94
42  */
43 
44 #ifdef	_KERNEL
45 
46 #if defined(CPU_LOONGSON2) && !defined(CPU_LOONGSON3)
47 #define	Mips_SyncCache(ci)			\
48 	Loongson2_SyncCache((ci))
49 #define	Mips_InvalidateICache(ci, va, l)	\
50 	Loongson2_InvalidateICache((ci), (va), (l))
51 #define	Mips_InvalidateICachePage(ci, va)	\
52 	Loongson2_InvalidateICachePage((ci), (va))
53 #define	Mips_SyncICache(ci)			\
54 	Loongson2_SyncICache((ci))
55 #define	Mips_SyncDCachePage(ci, va, pa)		\
56 	Loongson2_SyncDCachePage((ci), (va), (pa))
57 #define	Mips_HitSyncDCachePage(ci, va, pa)	\
58 	Loongson2_SyncDCachePage((ci), (va), (pa))
59 #define	Mips_HitSyncDCache(ci, va, l)	\
60 	Loongson2_HitSyncDCache((ci), (va), (l))
61 #define	Mips_IOSyncDCache(ci, va, l, h)	\
62 	Loongson2_IOSyncDCache((ci), (va), (l), (h))
63 #define	Mips_HitInvalidateDCache(ci, va, l)	\
64 	Loongson2_HitInvalidateDCache((ci), (va), (l))
65 #endif
66 
67 #if defined(CPU_LOONGSON3) && !defined(CPU_LOONGSON2)
68 #define	Mips_SyncCache(ci)			\
69 	Loongson3_SyncCache((ci))
70 #define	Mips_InvalidateICache(ci, va, l)	\
71 	Loongson3_InvalidateICache((ci), (va), (l))
72 #define	Mips_InvalidateICachePage(ci, va)	\
73 	Loongson3_InvalidateICachePage((ci), (va))
74 #define	Mips_SyncICache(ci)			\
75 	Loongson3_SyncICache((ci))
76 #define	Mips_SyncDCachePage(ci, va, pa)		\
77 	Loongson3_SyncDCachePage((ci), (va), (pa))
78 #define	Mips_HitSyncDCachePage(ci, va, pa)	\
79 	Loongson3_SyncDCachePage((ci), (va), (pa))
80 #define	Mips_HitSyncDCache(ci, va, l)	\
81 	Loongson3_HitSyncDCache((ci), (va), (l))
82 #define	Mips_IOSyncDCache(ci, va, l, h)	\
83 	Loongson3_IOSyncDCache((ci), (va), (l), (h))
84 #define	Mips_HitInvalidateDCache(ci, va, l)	\
85 	Loongson3_HitInvalidateDCache((ci), (va), (l))
86 #endif
87 
88 #endif	/* _KERNEL */
89 
90 #include <mips64/cpu.h>
91