1 /* $OpenBSD: pci_intr_fixup.c,v 1.20 2001/12/16 02:10:49 mickey Exp $ */ 2 /* $NetBSD: pci_intr_fixup.c,v 1.10 2000/08/10 21:18:27 soda Exp $ */ 3 4 /* 5 * Copyright (c) 2001 Michael Shalayeff 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Michael Shalayeff. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 31 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 /*- 35 * Copyright (c) 1999 The NetBSD Foundation, Inc. 36 * All rights reserved. 37 * 38 * This code is derived from software contributed to The NetBSD Foundation 39 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 40 * NASA Ames Research Center. 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions 44 * are met: 45 * 1. Redistributions of source code must retain the above copyright 46 * notice, this list of conditions and the following disclaimer. 47 * 2. Redistributions in binary form must reproduce the above copyright 48 * notice, this list of conditions and the following disclaimer in the 49 * documentation and/or other materials provided with the distribution. 50 * 3. All advertising materials mentioning features or use of this software 51 * must display the following acknowledgement: 52 * This product includes software developed by the NetBSD 53 * Foundation, Inc. and its contributors. 54 * 4. Neither the name of The NetBSD Foundation nor the names of its 55 * contributors may be used to endorse or promote products derived 56 * from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 59 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 60 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 61 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 62 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 63 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 64 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 65 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 66 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 67 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 /* 71 * Copyright (c) 1999, by UCHIYAMA Yasushi 72 * All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. The name of the developer may NOT be used to endorse or promote products 80 * derived from this software without specific prior written permission. 81 * 82 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 83 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 84 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 85 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 86 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 87 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 88 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 89 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 90 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 91 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 92 * SUCH DAMAGE. 93 */ 94 95 /* 96 * PCI Interrupt Router support. 97 */ 98 99 #include <sys/param.h> 100 #include <sys/systm.h> 101 #include <sys/kernel.h> 102 #include <sys/malloc.h> 103 #include <sys/queue.h> 104 #include <sys/device.h> 105 106 #include <machine/bus.h> 107 #include <machine/intr.h> 108 109 #include <dev/pci/pcireg.h> 110 #include <dev/pci/pcivar.h> 111 #include <dev/pci/pcidevs.h> 112 113 #include <i386/isa/icu.h> 114 #include <i386/pci/pcibiosvar.h> 115 116 struct pciintr_link_map { 117 int link, clink, irq, fixup_stage; 118 u_int16_t bitmap; 119 SIMPLEQ_ENTRY(pciintr_link_map) list; 120 }; 121 122 pciintr_icu_tag_t pciintr_icu_tag = NULL; 123 pciintr_icu_handle_t pciintr_icu_handle; 124 125 #ifdef PCIBIOS_IRQS_HINT 126 int pcibios_irqs_hint = PCIBIOS_IRQS_HINT; 127 #endif 128 129 struct pciintr_link_map *pciintr_link_lookup __P((int)); 130 struct pcibios_intr_routing *pciintr_pir_lookup __P((int, int)); 131 int pciintr_bitmap_count_irq __P((int, int *)); 132 133 SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list; 134 135 const struct pciintr_icu_table { 136 pci_vendor_id_t piit_vendor; 137 pci_product_id_t piit_product; 138 int (*piit_init) __P((pci_chipset_tag_t, 139 bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *, 140 pciintr_icu_handle_t *)); 141 } pciintr_icu_table[] = { 142 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371MX, 143 piix_init }, 144 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA, 145 piix_init }, 146 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_ISA, 147 piix_init }, 148 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_ISA, 149 piix_init }, 150 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_LPC, 151 piix_init }, 152 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_LPC, 153 piix_init }, 154 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_LPC, 155 piix_init }, 156 157 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C558, 158 opti82c558_init }, 159 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C700, 160 opti82c700_init }, 161 162 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C596A, 163 via82c586_init, }, 164 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_ISA, 165 via82c586_init, }, 166 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA, 167 via82c586_init, }, 168 169 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503, 170 sis85c503_init }, 171 172 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_PMC, 173 amd756_init }, 174 175 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1543, 176 ali1543_init }, 177 178 { 0, 0, 179 NULL }, 180 }; 181 182 const struct pciintr_icu_table *pciintr_icu_lookup __P((pcireg_t)); 183 184 const struct pciintr_icu_table * 185 pciintr_icu_lookup(id) 186 pcireg_t id; 187 { 188 const struct pciintr_icu_table *piit; 189 190 for (piit = pciintr_icu_table; piit->piit_init != NULL; piit++) 191 if (PCI_VENDOR(id) == piit->piit_vendor && 192 PCI_PRODUCT(id) == piit->piit_product) 193 return (piit); 194 195 return (NULL); 196 } 197 198 struct pciintr_link_map * 199 pciintr_link_lookup(link) 200 int link; 201 { 202 struct pciintr_link_map *l; 203 204 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 205 l = SIMPLEQ_NEXT(l, list)) 206 if (l->link == link) 207 return (l); 208 209 return (NULL); 210 } 211 212 static __inline struct pciintr_link_map * 213 pciintr_link_alloc(pci_chipset_tag_t pc, struct pcibios_intr_routing *pir, int pin) 214 { 215 int link = pir->linkmap[pin].link, clink, irq; 216 struct pciintr_link_map *l, *lstart; 217 218 if (pciintr_icu_tag != NULL) { 219 /* 220 * Get the canonical link value for this entry. 221 */ 222 if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle, 223 link, &clink) != 0) { 224 /* 225 * ICU doesn't understand the link value. 226 * Just ignore this PIR entry. 227 */ 228 PCIBIOS_PRINTV(("pciintr_link_alloc: bus %d device %d: " 229 "ignoring link 0x%02x\n", pir->bus, 230 PIR_DEVFUNC_DEVICE(pir->device), link)); 231 return (NULL); 232 } 233 234 /* 235 * Check the link value by asking the ICU for the 236 * canonical link value. 237 * Also, determine if this PIRQ is mapped to an IRQ. 238 */ 239 if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle, 240 clink, &irq) != 0) { 241 /* 242 * ICU doesn't understand the canonical link value. 243 * Just ignore this PIR entry. 244 */ 245 PCIBIOS_PRINTV(("pciintr_link_alloc: " 246 "bus %d device %d link 0x%02x: " 247 "ignoring PIRQ 0x%02x\n", pir->bus, 248 PIR_DEVFUNC_DEVICE(pir->device), link, clink)); 249 return (NULL); 250 } 251 } 252 253 if ((l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT)) == NULL) 254 return (NULL); 255 256 memset(l, 0, sizeof(*l)); 257 258 l->link = link; 259 l->bitmap = pir->linkmap[pin].bitmap; 260 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 261 l->clink = clink; 262 l->irq = irq; /* maybe I386_PCI_INTERRUPT_LINE_NO_CONNECTION */ 263 } else { 264 l->clink = link; 265 l->irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION; 266 } 267 268 lstart = SIMPLEQ_FIRST(&pciintr_link_map_list); 269 if (lstart == NULL || lstart->link < l->link) 270 SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list); 271 else 272 SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list); 273 274 return (l); 275 } 276 277 struct pcibios_intr_routing * 278 pciintr_pir_lookup(bus, device) 279 int bus, device; 280 { 281 struct pcibios_intr_routing *pir; 282 int entry; 283 284 if (pcibios_pir_table == NULL) 285 return (NULL); 286 287 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 288 pir = &pcibios_pir_table[entry]; 289 if (pir->bus == bus && 290 PIR_DEVFUNC_DEVICE(pir->device) == device) 291 return (pir); 292 } 293 294 return (NULL); 295 } 296 297 int 298 pciintr_bitmap_count_irq(irq_bitmap, irqp) 299 int irq_bitmap, *irqp; 300 { 301 int i, bit, count = 0, irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION; 302 303 if (irq_bitmap != 0) 304 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) 305 if (irq_bitmap & bit) { 306 irq = i; 307 count++; 308 } 309 310 *irqp = irq; 311 return (count); 312 } 313 314 static __inline int 315 pciintr_link_init(pci_chipset_tag_t pc) 316 { 317 int entry, pin, link; 318 struct pcibios_intr_routing *pir; 319 struct pciintr_link_map *l; 320 321 if (pcibios_pir_table == NULL) { 322 /* No PIR table; can't do anything. */ 323 printf("pciintr_link_init: no PIR table\n"); 324 return (1); 325 } 326 327 SIMPLEQ_INIT(&pciintr_link_map_list); 328 329 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 330 pir = &pcibios_pir_table[entry]; 331 for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) { 332 if ((link = pir->linkmap[pin].link) == 0) 333 /* No connection for this pin. */ 334 continue; 335 336 /* 337 * Multiple devices may be wired to the same 338 * interrupt; check to see if we've seen this 339 * one already. If not, allocate a new link 340 * map entry and stuff it in the map. 341 */ 342 if ((l = pciintr_link_lookup(link)) == NULL) 343 pciintr_link_alloc(pc, pir, pin); 344 else if (pir->linkmap[pin].bitmap != l->bitmap) { 345 /* 346 * violates PCI IRQ Routing Table Specification 347 */ 348 PCIBIOS_PRINTV(("pciintr_link_init: " 349 "bus %d device %d link 0x%02x: " 350 "bad irq bitmap 0x%04x, " 351 "should be 0x%04x\n", pir->bus, 352 PIR_DEVFUNC_DEVICE(pir->device), link, 353 pir->linkmap[pin].bitmap, l->bitmap)); 354 /* safer value. */ 355 l->bitmap &= pir->linkmap[pin].bitmap; 356 /* XXX - or, should ignore this entry? */ 357 } 358 } 359 } 360 361 return (0); 362 } 363 364 /* 365 * No compatible PCI ICU found. 366 * Hopes the BIOS already setup the ICU. 367 */ 368 static __inline int 369 pciintr_guess_irq(void) 370 { 371 struct pciintr_link_map *l; 372 int irq, guessed = 0; 373 374 /* 375 * Stage 1: If only one IRQ is available for the link, use it. 376 */ 377 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 378 l = SIMPLEQ_NEXT(l, list)) { 379 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) 380 continue; 381 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 382 l->irq = irq; 383 l->fixup_stage = 1; 384 if (pcibios_flags & PCIBIOS_INTRDEBUG) 385 printf("pciintr_guess_irq (stage 1): " 386 "guessing PIRQ 0x%02x to be IRQ %d\n", 387 l->clink, l->irq); 388 guessed = 1; 389 } 390 } 391 392 return (guessed ? 0 : -1); 393 } 394 395 static __inline int 396 pciintr_link_fixup(void) 397 { 398 struct pciintr_link_map *l; 399 u_int16_t pciirq = 0; 400 int irq; 401 402 /* 403 * First stage: Attempt to connect PIRQs which aren't 404 * yet connected. 405 */ 406 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 407 l = SIMPLEQ_NEXT(l, list)) { 408 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 409 /* 410 * Interrupt is already connected. Don't do 411 * anything to it. 412 * In this case, l->fixup_stage == 0. 413 */ 414 pciirq |= 1 << l->irq; 415 if (pcibios_flags & PCIBIOS_INTRDEBUG) 416 printf("pciintr_link_fixup: PIRQ 0x%02x is " 417 "already connected to IRQ %d\n", 418 l->clink, l->irq); 419 continue; 420 } 421 /* 422 * Interrupt isn't connected. Attempt to assign it to an IRQ. 423 */ 424 if (pcibios_flags & PCIBIOS_INTRDEBUG) 425 printf("pciintr_link_fixup: PIRQ 0x%02x not connected", 426 l->clink); 427 428 /* 429 * Just do the easy case now; we'll defer the harder ones 430 * to Stage 2. 431 */ 432 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 433 l->irq = irq; 434 l->fixup_stage = 1; 435 pciirq |= 1 << irq; 436 if (pcibios_flags & PCIBIOS_INTRDEBUG) 437 printf(", assigning IRQ %d", l->irq); 438 } 439 if (pcibios_flags & PCIBIOS_INTRDEBUG) 440 printf("\n"); 441 } 442 443 /* 444 * Stage 2: Attempt to connect PIRQs which we didn't 445 * connect in Stage 1. 446 */ 447 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 448 l = SIMPLEQ_NEXT(l, list)) 449 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION && 450 (irq = ffs(l->bitmap & pciirq)) > 0) { 451 /* 452 * This IRQ is a valid PCI IRQ already 453 * connected to another PIRQ, and also an 454 * IRQ our PIRQ can use; connect it up! 455 */ 456 l->fixup_stage = 2; 457 l->irq = irq - 1; 458 if (pcibios_flags & PCIBIOS_INTRDEBUG) 459 printf("pciintr_link_fixup (stage 2): " 460 "assigning IRQ %d to PIRQ 0x%02x\n", 461 l->irq, l->clink); 462 } 463 464 #ifdef PCIBIOS_IRQS_HINT 465 /* 466 * Stage 3: The worst case. I need configuration hint that 467 * user supplied a mask for the PCI irqs 468 */ 469 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL; 470 l = SIMPLEQ_NEXT(l, list)) { 471 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION && 472 (irq = ffs(l->bitmap & pcibios_irqs_hint)) > 0) { 473 l->fixup_stage = 3; 474 l->irq = irq - 1; 475 if (pcibios_flags & PCIBIOS_INTRDEBUG) 476 printf("pciintr_link_fixup (stage 3): " 477 "assigning IRQ %d to PIRQ 0x%02x\n", 478 l->irq, l->clink); 479 } 480 } 481 #endif /* PCIBIOS_IRQS_HINT */ 482 483 if (pcibios_flags & PCIBIOS_INTRDEBUG) 484 printf("pciintr_link_fixup: piirq 0x%04x\n", pciirq); 485 486 return (0); 487 } 488 489 int 490 pci_intr_route_link(pc, ihp) 491 pci_chipset_tag_t pc; 492 pci_intr_handle_t *ihp; 493 { 494 struct pciintr_link_map *l; 495 pcireg_t intr; 496 int rv = 1; 497 char *p = NULL; 498 499 l = ihp->link; 500 if (!l || pciintr_icu_tag == NULL) 501 return (1); 502 503 if (l->fixup_stage == 0) { 504 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 505 /* Appropriate interrupt was not found. */ 506 if (pcibios_flags & PCIBIOS_INTRDEBUG) 507 printf("pci_intr_route_link: PIRQ 0x%02x: " 508 "no IRQ, try " 509 "\"option PCIBIOS_IRQS_HINT=0x%04x\"\n", 510 l->clink, 511 /* suggest irq 9/10/11, if possible */ 512 (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00) 513 : l->bitmap); 514 } else 515 p = " preserved BIOS setting"; 516 } else { 517 518 if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle, 519 l->clink, l->irq) != 0 || 520 pciintr_icu_set_trigger(pciintr_icu_tag, pciintr_icu_handle, 521 l->irq, IST_LEVEL) != 0) { 522 p = " failed"; 523 rv = 0; 524 } else 525 p = ""; 526 } 527 if (p && pcibios_flags & PCIBIOS_INTRDEBUG) 528 printf("pci_intr_route_link: route PIRQ 0x%02x -> IRQ %d%s\n", 529 l->clink, l->irq, p); 530 531 if (!rv) 532 return (0); 533 534 /* 535 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck 536 * with them. 537 */ 538 if (ihp->line == 14 || ihp->line == 15) 539 return (1); 540 541 intr = pci_conf_read(pc, ihp->tag, PCI_INTERRUPT_REG); 542 if (ihp->line != PCI_INTERRUPT_LINE(intr)) { 543 intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT); 544 intr |= (ihp->line << PCI_INTERRUPT_LINE_SHIFT); 545 pci_conf_write(pc, ihp->tag, PCI_INTERRUPT_REG, intr); 546 } 547 548 return (1); 549 } 550 551 int 552 pci_intr_post_fixup() 553 { 554 struct pciintr_link_map *l; 555 int i, pciirq; 556 557 if (!pciintr_icu_handle) 558 return 0; 559 560 pciirq = pcibios_pir_header.exclusive_irq; 561 if (pcibios_flags & PCIBIOS_INTRDEBUG) 562 printf("pci_intr_post_fixup: PCI IRQs:"); 563 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); 564 l != NULL; l = SIMPLEQ_NEXT(l, list)) 565 if (l->fixup_stage == 0 && 566 l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 567 if (pcibios_flags & PCIBIOS_INTRDEBUG) 568 printf(" %d", l->irq); 569 pciirq |= (1 << l->irq); 570 } 571 572 if (pcibios_flags & PCIBIOS_INTRDEBUG) 573 printf("; ISA IRQs:"); 574 for (i = 0; i < 16; i++) 575 if (!(pciirq & (1 << i))) { 576 if (pcibios_flags & PCIBIOS_INTRDEBUG) 577 printf(" %d", i); 578 pciintr_icu_set_trigger(pciintr_icu_tag, 579 pciintr_icu_handle, i, IST_EDGE); 580 } 581 582 if (pcibios_flags & PCIBIOS_INTRDEBUG) 583 printf("\n"); 584 585 return (0); 586 } 587 588 int 589 pci_intr_header_fixup(pc, tag, ihp) 590 pci_chipset_tag_t pc; 591 pcitag_t tag; 592 pci_intr_handle_t *ihp; 593 { 594 struct pcibios_intr_routing *pir; 595 struct pciintr_link_map *l; 596 int irq, link, bus, device, function; 597 char *p = NULL; 598 599 irq = ihp->line; 600 ihp->link = NULL; 601 ihp->tag = tag; 602 pci_decompose_tag(pc, tag, &bus, &device, &function); 603 604 if ((pir = pciintr_pir_lookup(bus, device)) == NULL || 605 (link = pir->linkmap[ihp->pin - 1].link) == 0) { 606 PCIBIOS_PRINTV(("Interrupt not connected; no need to change.")); 607 return 1; 608 } 609 610 if ((l = pciintr_link_lookup(link)) == NULL) { 611 /* 612 * No link map entry. 613 * Probably pciintr_icu_getclink() or pciintr_icu_get_intr() 614 * was failed. 615 */ 616 if (pcibios_flags & PCIBIOS_INTRDEBUG) 617 printf("pci_intr_header_fixup: no entry for link " 618 "0x%02x (%d:%d:%d:%c)\n", 619 link, bus, device, function, '@' + ihp->pin); 620 return 1; 621 } 622 623 ihp->link = l; 624 if (irq == 14 || irq == 15) 625 p = " WARNING: ignored"; 626 else if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 627 628 /* Appropriate interrupt was not found. */ 629 if (pciintr_icu_tag == NULL && ihp->line != 0 && 630 ihp->line != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) 631 /* 632 * Do not print warning, 633 * if no compatible PCI ICU found, 634 * but the irq is already assigned by BIOS. 635 */ 636 p = ""; 637 else 638 p = " WARNING: missing"; 639 } else if (irq == 0 || irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) { 640 641 p = " fixed up"; 642 ihp->line = l->irq; 643 644 } else { 645 /* routed by BIOS, but inconsistent */ 646 #ifdef PCIBIOS_INTR_FIXUP_FORCE 647 /* believe PCI IRQ Routing table */ 648 p = " WARNING: overriding"; 649 ihp->line = l->irq; 650 #else 651 /* believe PCI Interrupt Configuration Register (default) */ 652 p = " WARNING: preserving"; 653 #endif 654 } 655 656 if (pcibios_flags & PCIBIOS_INTRDEBUG) { 657 register pcireg_t id = pci_conf_read(pc, tag, PCI_ID_REG); 658 659 printf("%d:%d:%d %04x:%04x pin %c clink 0x%02x irq %d stage %d" 660 "%s irq %d\n", bus, device, function, 661 PCI_VENDOR(id), PCI_PRODUCT(id), '@' + ihp->pin, l->clink, 662 ((l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION)? 663 -1 : l->irq), l->fixup_stage, p, irq); 664 } 665 666 return (1); 667 } 668 669 int 670 pci_intr_fixup(sc, pc, iot) 671 struct pcibios_softc *sc; 672 pci_chipset_tag_t pc; 673 bus_space_tag_t iot; 674 { 675 struct pcibios_pir_header *pirh = &pcibios_pir_header; 676 const struct pciintr_icu_table *piit = NULL; 677 pcitag_t icutag; 678 679 /* 680 * Attempt to initialize our PCI interrupt router. If 681 * the PIR Table is present in ROM, use the location 682 * specified by the PIR Table, and use the compat ID, 683 * if present. Otherwise, we have to look for the router 684 * ourselves (the PCI-ISA bridge). 685 * 686 * A number of buggy BIOS implementations leave the router 687 * entry as 000:00:0, which is typically not the correct 688 * device/function. If the router device address is set to 689 * this value, and the compatible router entry is undefined 690 * (zero is the correct value to indicate undefined), then we 691 * work on the basis it is most likely an error, and search 692 * the entire device-space of bus 0 (but obviously starting 693 * with 000:00:0, in case that really is the right one). 694 */ 695 if (pirh->signature != 0 && (pirh->router_bus != 0 || 696 pirh->router_devfunc != 0 || pirh->compat_router != 0)) { 697 698 icutag = pci_make_tag(pc, pirh->router_bus, 699 PIR_DEVFUNC_DEVICE(pirh->router_devfunc), 700 PIR_DEVFUNC_FUNCTION(pirh->router_devfunc)); 701 if (pirh->compat_router == 0 || 702 (piit = pciintr_icu_lookup(pirh->compat_router)) == NULL) { 703 /* 704 * No compat ID, or don't know the compat ID? Read 705 * it from the configuration header. 706 */ 707 pirh->compat_router = pci_conf_read(pc, icutag, 708 PCI_ID_REG); 709 } 710 if (piit == NULL) 711 piit = pciintr_icu_lookup(pirh->compat_router); 712 } else { 713 int device, maxdevs = pci_bus_maxdevs(pc, 0); 714 715 /* 716 * Search configuration space for a known interrupt 717 * router. 718 */ 719 for (device = 0; device < maxdevs; device++) { 720 const struct pci_quirkdata *qd; 721 int function, nfuncs; 722 pcireg_t icuid; 723 pcireg_t bhlcr; 724 725 icutag = pci_make_tag(pc, 0, device, 0); 726 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 727 728 /* Invalid vendor ID value? */ 729 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 730 continue; 731 /* XXX Not invalid, but we've done this ~forever. */ 732 if (PCI_VENDOR(icuid) == 0) 733 continue; 734 735 qd = pci_lookup_quirkdata(PCI_VENDOR(icuid), 736 PCI_PRODUCT(icuid)); 737 738 bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG); 739 if (PCI_HDRTYPE_MULTIFN(bhlcr) || (qd != NULL && 740 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)) 741 nfuncs = 8; 742 else 743 nfuncs = 1; 744 745 for (function = 0; function < nfuncs; function++) { 746 icutag = pci_make_tag(pc, 0, device, function); 747 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 748 749 /* Invalid vendor ID value? */ 750 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 751 continue; 752 /* Not invalid, but we've done this ~forever. */ 753 if (PCI_VENDOR(icuid) == 0) 754 continue; 755 756 if ((piit = pciintr_icu_lookup(icuid))) { 757 pirh->compat_router = icuid; 758 pirh->router_bus = 0; 759 pirh->router_devfunc = 760 PIR_DEVFUNC_COMPOSE(device, 0); 761 break; 762 } 763 } 764 765 if (piit != NULL) 766 break; 767 } 768 } 769 770 if (piit == NULL) { 771 printf("%s: no compatible PCI ICU found", sc->sc_dev.dv_xname); 772 if (pirh->signature != 0 && pirh->compat_router != 0) 773 printf(": ICU vendor 0x%04x product 0x%04x", 774 PCI_VENDOR(pirh->compat_router), 775 PCI_PRODUCT(pirh->compat_router)); 776 printf("\n"); 777 if (!(pcibios_flags & PCIBIOS_INTR_GUESS)) { 778 if (pciintr_link_init(pc)) 779 return (-1); /* non-fatal */ 780 if (pciintr_guess_irq()) 781 return (-1); /* non-fatal */ 782 return (0); /* success! */ 783 } else 784 return (-1); /* non-fatal */ 785 } else { 786 char devinfo[256]; 787 788 printf("%s: PCI Interrupt Router at %03d:%02d:%01d", 789 sc->sc_dev.dv_xname, pirh->router_bus, 790 PIR_DEVFUNC_DEVICE(pirh->router_devfunc), 791 PIR_DEVFUNC_FUNCTION(pirh->router_devfunc)); 792 if (pirh->compat_router != 0) { 793 pci_devinfo(pirh->compat_router, 0, 0, devinfo); 794 printf(" (%s)", devinfo); 795 } 796 printf("\n"); 797 } 798 799 /* 800 * Initialize the PCI ICU. 801 */ 802 if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag, 803 &pciintr_icu_handle) != 0) 804 return (-1); /* non-fatal */ 805 806 /* 807 * Initialize the PCI interrupt link map. 808 */ 809 if (pciintr_link_init(pc)) 810 return (-1); /* non-fatal */ 811 812 /* 813 * Fix up the link->IRQ mappings. 814 */ 815 if (pciintr_link_fixup() != 0) 816 return (-1); /* non-fatal */ 817 818 return (0); 819 } 820