1 /* $OpenBSD: cpu.h,v 1.134 2014/07/11 10:53:07 uebayasi Exp $ */ 2 /* $NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $ */ 3 4 /*- 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 #ifndef _MACHINE_CPU_H_ 39 #define _MACHINE_CPU_H_ 40 41 /* 42 * Definitions unique to i386 cpu support. 43 */ 44 #ifdef _KERNEL 45 #include <machine/frame.h> 46 #include <machine/psl.h> 47 #include <machine/segments.h> 48 #include <machine/intrdefs.h> 49 50 #ifdef MULTIPROCESSOR 51 #include <machine/i82489reg.h> 52 #include <machine/i82489var.h> 53 #endif 54 55 #endif /* _KERNEL */ 56 57 /* 58 * Arguments to hardclock, softclock and statclock 59 * encapsulate the previous machine state in an opaque 60 * clockframe; for now, use generic intrframe. 61 * 62 * XXX intrframe has a lot of gunk we don't need. 63 */ 64 #define clockframe intrframe 65 66 #include <sys/device.h> 67 #include <sys/lock.h> /* will also get LOCKDEBUG */ 68 #include <sys/sched.h> 69 #include <sys/sensors.h> 70 71 struct intrsource; 72 73 #ifdef _KERNEL 74 /* XXX stuff to move to cpuvar.h later */ 75 struct cpu_info { 76 struct device ci_dev; /* our device */ 77 struct cpu_info *ci_self; /* pointer to this structure */ 78 struct schedstate_percpu ci_schedstate; /* scheduler state */ 79 struct cpu_info *ci_next; /* next cpu */ 80 81 /* 82 * Public members. 83 */ 84 struct proc *ci_curproc; /* current owner of the processor */ 85 struct simplelock ci_slock; /* lock on this data structure */ 86 cpuid_t ci_cpuid; /* our CPU ID */ 87 u_int ci_apicid; /* our APIC ID */ 88 u_int32_t ci_randseed; 89 90 /* 91 * Private members. 92 */ 93 struct proc *ci_fpcurproc; /* current owner of the FPU */ 94 struct proc *ci_fpsaveproc; 95 int ci_fpsaving; /* save in progress */ 96 97 struct pcb *ci_curpcb; /* VA of current HW PCB */ 98 struct pcb *ci_idle_pcb; /* VA of current PCB */ 99 int ci_idle_tss_sel; /* TSS selector of idle PCB */ 100 struct pmap *ci_curpmap; 101 102 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 103 u_int32_t ci_ipending; 104 int ci_ilevel; 105 int ci_idepth; 106 u_int32_t ci_imask[NIPL]; 107 u_int32_t ci_iunmask[NIPL]; 108 #ifdef DIAGNOSTIC 109 int ci_mutex_level; 110 #endif 111 112 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */ 113 volatile u_long ci_flags; /* flags; see below */ 114 u_int32_t ci_ipis; /* interprocessor interrupts pending */ 115 116 u_int32_t ci_level; 117 u_int32_t ci_vendor[4]; 118 u_int32_t ci_signature; /* X86 cpuid type */ 119 u_int32_t ci_family; /* extended cpuid family */ 120 u_int32_t ci_model; /* extended cpuid model */ 121 u_int32_t ci_feature_flags; /* X86 CPUID feature bits */ 122 u_int32_t ci_feature_sefflags; /* more CPUID feature bits */ 123 u_int32_t cpu_class; /* CPU class */ 124 u_int32_t ci_cflushsz; /* clflush cache-line size */ 125 126 int ci_inatomic; 127 128 struct cpu_functions *ci_func; /* start/stop functions */ 129 void (*cpu_setup)(struct cpu_info *); /* proc-dependant init */ 130 131 u_int *ci_mwait; 132 /* bits in ci_mwait[0] */ 133 #define MWAIT_IN_IDLE 0x1 /* don't need IPI to wake */ 134 #define MWAIT_KEEP_IDLING 0x2 /* cleared by other cpus to wake me */ 135 #define MWAIT_IDLING (MWAIT_IN_IDLE | MWAIT_KEEP_IDLING) 136 137 int ci_want_resched; 138 139 union descriptor *ci_gdt; 140 union descriptor *ci_ldt; /* per-cpu default LDT */ 141 int ci_ldt_len; /* in bytes */ 142 143 volatile int ci_ddb_paused; /* paused due to other proc in ddb */ 144 #define CI_DDB_RUNNING 0 145 #define CI_DDB_SHOULDSTOP 1 146 #define CI_DDB_STOPPED 2 147 #define CI_DDB_ENTERDDB 3 148 #define CI_DDB_INDDB 4 149 150 volatile int ci_setperf_state; 151 #define CI_SETPERF_READY 0 152 #define CI_SETPERF_SHOULDSTOP 1 153 #define CI_SETPERF_INTRANSIT 2 154 #define CI_SETPERF_DONE 3 155 156 struct ksensordev ci_sensordev; 157 struct ksensor ci_sensor; 158 #ifdef GPROF 159 struct gmonparam *ci_gmon; 160 #endif 161 }; 162 163 /* 164 * Processor flag notes: The "primary" CPU has certain MI-defined 165 * roles (mostly relating to hardclock handling); we distinguish 166 * betwen the processor which booted us, and the processor currently 167 * holding the "primary" role just to give us the flexibility later to 168 * change primaries should we be sufficiently twisted. 169 */ 170 171 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 172 #define CPUF_AP 0x0002 /* CPU is an AP */ 173 #define CPUF_SP 0x0004 /* CPU is only processor */ 174 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 175 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */ 176 #define CPUF_CONST_TSC 0x0020 /* CPU has constant TSC */ 177 178 #define CPUF_PRESENT 0x1000 /* CPU is present */ 179 #define CPUF_RUNNING 0x2000 /* CPU is running */ 180 181 /* 182 * We statically allocate the CPU info for the primary CPU (or, 183 * the only CPU on uniprocessors), and the primary CPU is the 184 * first CPU on the CPU info list. 185 */ 186 extern struct cpu_info cpu_info_primary; 187 extern struct cpu_info *cpu_info_list; 188 189 #define CPU_INFO_ITERATOR int 190 #define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \ 191 ci != NULL; ci = ci->ci_next) 192 193 #define CPU_INFO_UNIT(ci) ((ci)->ci_dev.dv_unit) 194 195 #ifdef MULTIPROCESSOR 196 197 #define MAXCPUS 32 /* because we use a bitmask */ 198 199 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 200 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 201 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 202 203 static struct cpu_info *curcpu(void); 204 205 __inline static struct cpu_info * 206 curcpu(void) 207 { 208 struct cpu_info *ci; 209 210 /* Can't include sys/param.h for offsetof() since it includes us */ 211 __asm volatile("movl %%fs:%1, %0" : 212 "=r" (ci) : "m" 213 (*(struct cpu_info * const *)&((struct cpu_info *)0)->ci_self)); 214 return ci; 215 } 216 #define cpu_number() (curcpu()->ci_cpuid) 217 218 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 219 220 extern struct cpu_info *cpu_info[MAXCPUS]; 221 222 extern void cpu_boot_secondary_processors(void); 223 extern void cpu_init_idle_pcbs(void); 224 225 void cpu_kick(struct cpu_info *); 226 void cpu_unidle(struct cpu_info *); 227 228 #define CPU_BUSY_CYCLE() __asm volatile("pause": : : "memory") 229 230 #else /* MULTIPROCESSOR */ 231 232 #define MAXCPUS 1 233 234 #define cpu_number() 0 235 #define curcpu() (&cpu_info_primary) 236 237 #define CPU_IS_PRIMARY(ci) 1 238 239 #define cpu_kick(ci) 240 #define cpu_unidle(ci) 241 242 #define CPU_BUSY_CYCLE() do {} while (0) 243 244 #endif 245 246 #define aston(p) ((p)->p_md.md_astpending = 1) 247 248 #define curpcb curcpu()->ci_curpcb 249 250 #define want_resched (curcpu()->ci_want_resched) 251 252 /* 253 * Preempt the current process if in interrupt from user mode, 254 * or after the current trap/syscall if in system mode. 255 */ 256 extern void need_resched(struct cpu_info *); 257 #define clear_resched(ci) (ci)->ci_want_resched = 0 258 259 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_eflags) 260 #define CLKF_PC(frame) ((frame)->if_eip) 261 #define CLKF_INTR(frame) (IDXSEL((frame)->if_cs) == GICODE_SEL) 262 263 /* 264 * This is used during profiling to integrate system time. 265 */ 266 #define PROC_PC(p) ((p)->p_md.md_regs->tf_eip) 267 #define PROC_STACK(p) ((p)->p_md.md_regs->tf_esp) 268 269 /* 270 * Give a profiling tick to the current process when the user profiling 271 * buffer pages are invalid. On the i386, request an ast to send us 272 * through trap(), marking the proc as needing a profiling tick. 273 */ 274 #define need_proftick(p) aston(p) 275 276 /* 277 * Notify the current process (p) that it has a signal pending, 278 * process as soon as possible. 279 */ 280 void signotify(struct proc *); 281 282 /* 283 * We need a machine-independent name for this. 284 */ 285 extern void (*delay_func)(int); 286 struct timeval; 287 288 #define DELAY(x) (*delay_func)(x) 289 #define delay(x) (*delay_func)(x) 290 291 /* 292 * High resolution clock support (Pentium only) 293 */ 294 void calibrate_cyclecounter(void); 295 296 /* 297 * pull in #defines for kinds of processors 298 */ 299 #include <machine/cputypes.h> 300 301 struct cpu_nocpuid_nameclass { 302 int cpu_vendor; 303 const char *cpu_vendorname; 304 const char *cpu_name; 305 int cpu_class; 306 void (*cpu_setup)(struct cpu_info *); 307 }; 308 309 struct cpu_cpuid_nameclass { 310 const char *cpu_id; 311 int cpu_vendor; 312 const char *cpu_vendorname; 313 struct cpu_cpuid_family { 314 int cpu_class; 315 const char *cpu_models[CPU_MAXMODEL+2]; 316 void (*cpu_setup)(struct cpu_info *); 317 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1]; 318 }; 319 320 struct cpu_cpuid_feature { 321 int feature_bit; 322 const char *feature_name; 323 }; 324 325 /* locore.s */ 326 extern int cpu; 327 extern int cpu_id; 328 extern char cpu_vendor[]; /* note: NOT nul-terminated */ 329 extern char cpu_brandstr[]; 330 extern int cpuid_level; 331 extern int cpu_miscinfo; 332 extern int cpu_feature; 333 extern int ecpu_feature; 334 extern int cpu_ecxfeature; 335 extern int ecpu_ecxfeature; 336 extern int cpu_cache_eax; 337 extern int cpu_cache_ebx; 338 extern int cpu_cache_ecx; 339 extern int cpu_cache_edx; 340 extern int cpu_perf_eax; 341 extern int cpu_perf_ebx; 342 extern int cpu_perf_edx; 343 extern int cpu_apmi_edx; 344 345 /* machdep.c */ 346 extern int cpu_apmhalt; 347 extern int cpu_class; 348 extern char cpu_model[]; 349 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[]; 350 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; 351 extern void (*cpu_idle_enter_fcn)(void); 352 extern void (*cpu_idle_cycle_fcn)(void); 353 extern void (*cpu_idle_leave_fcn)(void); 354 355 /* apm.c */ 356 extern int cpu_apmwarn; 357 358 extern int cpuspeed; 359 360 #if !defined(SMALL_KERNEL) 361 #define BUS66 6667 362 #define BUS100 10000 363 #define BUS133 13333 364 #define BUS166 16667 365 #define BUS200 20000 366 #define BUS266 26667 367 #define BUS333 33333 368 extern int bus_clock; 369 #endif 370 371 /* F00F bug fix stuff for pentium cpu */ 372 extern int cpu_f00f_bug; 373 void fix_f00f(void); 374 375 /* dkcsum.c */ 376 void dkcsumattach(void); 377 378 extern int i386_use_fxsave; 379 extern int i386_has_sse; 380 extern int i386_has_sse2; 381 382 extern void (*update_cpuspeed)(void); 383 384 /* machdep.c */ 385 void dumpconf(void); 386 void cpu_reset(void); 387 void i386_proc0_tss_ldt_init(void); 388 void i386_init_pcb_tss_ldt(struct cpu_info *); 389 void cpuid(u_int32_t, u_int32_t *); 390 391 /* locore.s */ 392 struct region_descriptor; 393 void lgdt(struct region_descriptor *); 394 395 struct pcb; 396 void savectx(struct pcb *); 397 void switch_exit(struct proc *); 398 void proc_trampoline(void); 399 400 /* clock.c */ 401 extern void (*initclock_func)(void); 402 void startclocks(void); 403 void rtcdrain(void *); 404 void rtcstart(void); 405 void rtcstop(void); 406 void i8254_delay(int); 407 void i8254_initclocks(void); 408 void i8254_startclock(void); 409 void i8254_inittimecounter(void); 410 void i8254_inittimecounter_simple(void); 411 412 #if !defined(SMALL_KERNEL) 413 /* est.c */ 414 void est_init(struct cpu_info *, int); 415 void est_setperf(int); 416 /* longrun.c */ 417 void longrun_init(void); 418 void longrun_setperf(int); 419 /* p4tcc.c */ 420 void p4tcc_init(int, int); 421 void p4tcc_setperf(int); 422 /* powernow.c */ 423 void k6_powernow_init(void); 424 void k6_powernow_setperf(int); 425 /* powernow-k7.c */ 426 void k7_powernow_init(void); 427 void k7_powernow_setperf(int); 428 /* powernow-k8.c */ 429 void k8_powernow_init(void); 430 void k8_powernow_setperf(int); 431 /* k1x-pstate.c */ 432 void k1x_init(struct cpu_info *); 433 void k1x_setperf(int); 434 #endif 435 436 /* npx.c */ 437 void npxdrop(struct proc *); 438 void npxsave_proc(struct proc *, int); 439 void npxsave_cpu(struct cpu_info *, int); 440 441 #ifdef USER_LDT 442 /* sys_machdep.h */ 443 extern int user_ldt_enable; 444 int i386_get_ldt(struct proc *, void *, register_t *); 445 int i386_set_ldt(struct proc *, void *, register_t *); 446 #endif 447 448 /* isa_machdep.c */ 449 void isa_defaultirq(void); 450 void isa_nodefaultirq(void); 451 int isa_nmi(void); 452 453 /* pmap.c */ 454 void pmap_bootstrap(vaddr_t); 455 456 /* vm_machdep.c */ 457 int kvtop(caddr_t); 458 459 #ifdef MULTIPROCESSOR 460 /* mp_setperf.c */ 461 void mp_setperf_init(void); 462 #endif 463 464 #ifdef VM86 465 /* vm86.c */ 466 void vm86_gpfault(struct proc *, int); 467 #endif /* VM86 */ 468 469 #endif /* _KERNEL */ 470 471 /* 472 * CTL_MACHDEP definitions. 473 */ 474 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 475 #define CPU_BIOS 2 /* BIOS variables */ 476 #define CPU_BLK2CHR 3 /* convert blk maj into chr one */ 477 #define CPU_CHR2BLK 4 /* convert chr maj into blk one */ 478 #define CPU_ALLOWAPERTURE 5 /* allow mmap of /dev/xf86 */ 479 #define CPU_CPUVENDOR 6 /* cpuid vendor string */ 480 #define CPU_CPUID 7 /* cpuid */ 481 #define CPU_CPUFEATURE 8 /* cpuid features */ 482 #define CPU_APMWARN 9 /* APM battery warning percentage */ 483 #define CPU_KBDRESET 10 /* keyboard reset under pcvt */ 484 #define CPU_APMHALT 11 /* halt -p hack */ 485 #define CPU_USERLDT 12 486 #define CPU_OSFXSR 13 /* uses FXSAVE/FXRSTOR */ 487 #define CPU_SSE 14 /* supports SSE */ 488 #define CPU_SSE2 15 /* supports SSE2 */ 489 #define CPU_XCRYPT 16 /* supports VIA xcrypt in userland */ 490 #define CPU_LIDSUSPEND 17 /* lid close causes a suspend */ 491 #define CPU_MAXID 18 /* number of valid machdep ids */ 492 493 #define CTL_MACHDEP_NAMES { \ 494 { 0, 0 }, \ 495 { "console_device", CTLTYPE_STRUCT }, \ 496 { "bios", CTLTYPE_INT }, \ 497 { "blk2chr", CTLTYPE_STRUCT }, \ 498 { "chr2blk", CTLTYPE_STRUCT }, \ 499 { "allowaperture", CTLTYPE_INT }, \ 500 { "cpuvendor", CTLTYPE_STRING }, \ 501 { "cpuid", CTLTYPE_INT }, \ 502 { "cpufeature", CTLTYPE_INT }, \ 503 { "apmwarn", CTLTYPE_INT }, \ 504 { "kbdreset", CTLTYPE_INT }, \ 505 { "apmhalt", CTLTYPE_INT }, \ 506 { "userldt", CTLTYPE_INT }, \ 507 { "osfxsr", CTLTYPE_INT }, \ 508 { "sse", CTLTYPE_INT }, \ 509 { "sse2", CTLTYPE_INT }, \ 510 { "xcrypt", CTLTYPE_INT }, \ 511 { "lidsuspend", CTLTYPE_INT }, \ 512 } 513 514 /* 515 * This needs to be included late since it relies on definitions higher 516 * up in this file. 517 */ 518 #if defined(MULTIPROCESSOR) && defined(_KERNEL) 519 #include <sys/mplock.h> 520 #endif 521 522 #endif /* !_MACHINE_CPU_H_ */ 523