1 /* $OpenBSD: cpu.h,v 1.122 2012/03/27 06:44:01 jsg Exp $ */ 2 /* $NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $ */ 3 4 /*- 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 #ifndef _MACHINE_CPU_H_ 39 #define _MACHINE_CPU_H_ 40 41 /* 42 * Definitions unique to i386 cpu support. 43 */ 44 #include <machine/frame.h> 45 #include <machine/psl.h> 46 #include <machine/segments.h> 47 #include <machine/intrdefs.h> 48 49 #ifdef MULTIPROCESSOR 50 #include <machine/i82489reg.h> 51 #include <machine/i82489var.h> 52 #endif 53 54 /* 55 * Arguments to hardclock, softclock and statclock 56 * encapsulate the previous machine state in an opaque 57 * clockframe; for now, use generic intrframe. 58 * 59 * XXX intrframe has a lot of gunk we don't need. 60 */ 61 #define clockframe intrframe 62 63 #include <sys/device.h> 64 #include <sys/lock.h> /* will also get LOCKDEBUG */ 65 #include <sys/sched.h> 66 #include <sys/sensors.h> 67 68 struct intrsource; 69 70 #ifdef _KERNEL 71 /* XXX stuff to move to cpuvar.h later */ 72 struct cpu_info { 73 struct device ci_dev; /* our device */ 74 struct cpu_info *ci_self; /* pointer to this structure */ 75 struct schedstate_percpu ci_schedstate; /* scheduler state */ 76 struct cpu_info *ci_next; /* next cpu */ 77 78 /* 79 * Public members. 80 */ 81 struct proc *ci_curproc; /* current owner of the processor */ 82 struct simplelock ci_slock; /* lock on this data structure */ 83 cpuid_t ci_cpuid; /* our CPU ID */ 84 u_int ci_apicid; /* our APIC ID */ 85 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 86 u_long ci_spin_locks; /* # of spin locks held */ 87 u_long ci_simple_locks; /* # of simple locks held */ 88 #endif 89 u_int32_t ci_randseed; 90 91 /* 92 * Private members. 93 */ 94 struct proc *ci_fpcurproc; /* current owner of the FPU */ 95 struct proc *ci_fpsaveproc; 96 int ci_fpsaving; /* save in progress */ 97 98 struct pcb *ci_curpcb; /* VA of current HW PCB */ 99 struct pcb *ci_idle_pcb; /* VA of current PCB */ 100 int ci_idle_tss_sel; /* TSS selector of idle PCB */ 101 struct pmap *ci_curpmap; 102 103 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 104 u_int32_t ci_ipending; 105 int ci_ilevel; 106 int ci_idepth; 107 u_int32_t ci_imask[NIPL]; 108 u_int32_t ci_iunmask[NIPL]; 109 #ifdef DIAGNOSTIC 110 int ci_mutex_level; 111 #endif 112 113 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */ 114 volatile u_long ci_flags; /* flags; see below */ 115 u_int32_t ci_ipis; /* interprocessor interrupts pending */ 116 117 u_int32_t ci_level; 118 u_int32_t ci_vendor[4]; 119 u_int32_t ci_signature; /* X86 cpuid type */ 120 u_int32_t ci_family; /* extended cpuid family */ 121 u_int32_t ci_model; /* extended cpuid model */ 122 u_int32_t ci_feature_flags; /* X86 CPUID feature bits */ 123 u_int32_t cpu_class; /* CPU class */ 124 u_int32_t ci_cflushsz; /* clflush cache-line size */ 125 126 struct cpu_functions *ci_func; /* start/stop functions */ 127 void (*cpu_setup)(struct cpu_info *); /* proc-dependant init */ 128 129 int ci_want_resched; 130 131 union descriptor *ci_gdt; 132 union descriptor *ci_ldt; /* per-cpu default LDT */ 133 int ci_ldt_len; /* in bytes */ 134 135 volatile int ci_ddb_paused; /* paused due to other proc in ddb */ 136 #define CI_DDB_RUNNING 0 137 #define CI_DDB_SHOULDSTOP 1 138 #define CI_DDB_STOPPED 2 139 #define CI_DDB_ENTERDDB 3 140 #define CI_DDB_INDDB 4 141 142 volatile int ci_setperf_state; 143 #define CI_SETPERF_READY 0 144 #define CI_SETPERF_SHOULDSTOP 1 145 #define CI_SETPERF_INTRANSIT 2 146 #define CI_SETPERF_DONE 3 147 148 struct ksensordev ci_sensordev; 149 struct ksensor ci_sensor; 150 }; 151 152 /* 153 * Processor flag notes: The "primary" CPU has certain MI-defined 154 * roles (mostly relating to hardclock handling); we distinguish 155 * betwen the processor which booted us, and the processor currently 156 * holding the "primary" role just to give us the flexibility later to 157 * change primaries should we be sufficiently twisted. 158 */ 159 160 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 161 #define CPUF_AP 0x0002 /* CPU is an AP */ 162 #define CPUF_SP 0x0004 /* CPU is only processor */ 163 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 164 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */ 165 166 #define CPUF_PRESENT 0x1000 /* CPU is present */ 167 #define CPUF_RUNNING 0x2000 /* CPU is running */ 168 169 /* 170 * We statically allocate the CPU info for the primary CPU (or, 171 * the only CPU on uniprocessors), and the primary CPU is the 172 * first CPU on the CPU info list. 173 */ 174 extern struct cpu_info cpu_info_primary; 175 extern struct cpu_info *cpu_info_list; 176 177 #define CPU_INFO_ITERATOR int 178 #define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \ 179 ci != NULL; ci = ci->ci_next) 180 181 #define CPU_INFO_UNIT(ci) ((ci)->ci_dev.dv_unit) 182 183 #ifdef MULTIPROCESSOR 184 185 #define MAXCPUS 32 /* because we use a bitmask */ 186 187 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 188 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 189 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 190 191 static struct cpu_info *curcpu(void); 192 193 __inline static struct cpu_info * 194 curcpu(void) 195 { 196 struct cpu_info *ci; 197 198 /* Can't include sys/param.h for offsetof() since it includes us */ 199 __asm __volatile("movl %%fs:%1, %0" : 200 "=r" (ci) : "m" 201 (*(struct cpu_info * const *)&((struct cpu_info *)0)->ci_self)); 202 return ci; 203 } 204 #define cpu_number() (curcpu()->ci_cpuid) 205 206 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 207 208 extern struct cpu_info *cpu_info[MAXCPUS]; 209 210 extern void cpu_boot_secondary_processors(void); 211 extern void cpu_init_idle_pcbs(void); 212 213 void cpu_unidle(struct cpu_info *); 214 215 #else /* MULTIPROCESSOR */ 216 217 #define MAXCPUS 1 218 219 #define cpu_number() 0 220 #define curcpu() (&cpu_info_primary) 221 222 #define CPU_IS_PRIMARY(ci) 1 223 224 #define cpu_unidle(ci) 225 226 #endif 227 228 #define aston(p) ((p)->p_md.md_astpending = 1) 229 230 #define curpcb curcpu()->ci_curpcb 231 232 #define want_resched (curcpu()->ci_want_resched) 233 234 /* 235 * Preempt the current process if in interrupt from user mode, 236 * or after the current trap/syscall if in system mode. 237 */ 238 extern void need_resched(struct cpu_info *); 239 #define clear_resched(ci) (ci)->ci_want_resched = 0 240 241 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_eflags) 242 #define CLKF_PC(frame) ((frame)->if_eip) 243 #define CLKF_INTR(frame) (IDXSEL((frame)->if_cs) == GICODE_SEL) 244 245 /* 246 * This is used during profiling to integrate system time. 247 */ 248 #define PROC_PC(p) ((p)->p_md.md_regs->tf_eip) 249 250 /* 251 * Give a profiling tick to the current process when the user profiling 252 * buffer pages are invalid. On the i386, request an ast to send us 253 * through trap(), marking the proc as needing a profiling tick. 254 */ 255 #define need_proftick(p) aston(p) 256 257 /* 258 * Notify the current process (p) that it has a signal pending, 259 * process as soon as possible. 260 */ 261 void signotify(struct proc *); 262 263 /* 264 * We need a machine-independent name for this. 265 */ 266 extern void (*delay_func)(int); 267 struct timeval; 268 269 #define DELAY(x) (*delay_func)(x) 270 #define delay(x) (*delay_func)(x) 271 272 /* 273 * High resolution clock support (Pentium only) 274 */ 275 void calibrate_cyclecounter(void); 276 277 /* 278 * pull in #defines for kinds of processors 279 */ 280 #include <machine/cputypes.h> 281 282 struct cpu_nocpuid_nameclass { 283 int cpu_vendor; 284 const char *cpu_vendorname; 285 const char *cpu_name; 286 int cpu_class; 287 void (*cpu_setup)(struct cpu_info *); 288 }; 289 290 struct cpu_cpuid_nameclass { 291 const char *cpu_id; 292 int cpu_vendor; 293 const char *cpu_vendorname; 294 struct cpu_cpuid_family { 295 int cpu_class; 296 const char *cpu_models[CPU_MAXMODEL+2]; 297 void (*cpu_setup)(struct cpu_info *); 298 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1]; 299 }; 300 301 struct cpu_cpuid_feature { 302 int feature_bit; 303 const char *feature_name; 304 }; 305 306 /* locore.s */ 307 extern int cpu; 308 extern int cpu_id; 309 extern char cpu_vendor[]; /* note: NOT nul-terminated */ 310 extern char cpu_brandstr[]; 311 extern int cpuid_level; 312 extern int cpu_miscinfo; 313 extern int cpu_feature; 314 extern int ecpu_feature; 315 extern int cpu_ecxfeature; 316 extern int ecpu_ecxfeature; 317 extern int cpu_cache_eax; 318 extern int cpu_cache_ebx; 319 extern int cpu_cache_ecx; 320 extern int cpu_cache_edx; 321 322 /* machdep.c */ 323 extern int cpu_apmhalt; 324 extern int cpu_class; 325 extern char cpu_model[]; 326 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[]; 327 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; 328 extern void (*cpu_idle_enter_fcn)(void); 329 extern void (*cpu_idle_cycle_fcn)(void); 330 extern void (*cpu_idle_leave_fcn)(void); 331 332 /* apm.c */ 333 extern int cpu_apmwarn; 334 335 extern int cpuspeed; 336 337 #if !defined(SMALL_KERNEL) 338 #define BUS66 6667 339 #define BUS100 10000 340 #define BUS133 13333 341 #define BUS166 16667 342 #define BUS200 20000 343 #define BUS266 26667 344 #define BUS333 33333 345 extern int bus_clock; 346 #endif 347 348 /* F00F bug fix stuff for pentium cpu */ 349 extern int cpu_f00f_bug; 350 void fix_f00f(void); 351 352 /* dkcsum.c */ 353 void dkcsumattach(void); 354 355 extern int i386_use_fxsave; 356 extern int i386_has_sse; 357 extern int i386_has_sse2; 358 359 extern void (*update_cpuspeed)(void); 360 361 /* machdep.c */ 362 void dumpconf(void); 363 void cpu_reset(void); 364 void i386_proc0_tss_ldt_init(void); 365 void i386_init_pcb_tss_ldt(struct cpu_info *); 366 void cpuid(u_int32_t, u_int32_t *); 367 368 /* locore.s */ 369 struct region_descriptor; 370 void lgdt(struct region_descriptor *); 371 372 struct pcb; 373 void savectx(struct pcb *); 374 void switch_exit(struct proc *); 375 void proc_trampoline(void); 376 377 /* clock.c */ 378 extern void (*initclock_func)(void); 379 void startclocks(void); 380 void rtcdrain(void *); 381 void rtcstart(void); 382 void rtcstop(void); 383 void i8254_delay(int); 384 void i8254_initclocks(void); 385 void i8254_startclock(void); 386 void i8254_inittimecounter(void); 387 void i8254_inittimecounter_simple(void); 388 389 #if !defined(SMALL_KERNEL) 390 /* est.c */ 391 void est_init(struct cpu_info *, int); 392 void est_setperf(int); 393 /* longrun.c */ 394 void longrun_init(void); 395 void longrun_setperf(int); 396 /* p4tcc.c */ 397 void p4tcc_init(int, int); 398 void p4tcc_setperf(int); 399 /* powernow.c */ 400 void k6_powernow_init(void); 401 void k6_powernow_setperf(int); 402 /* powernow-k7.c */ 403 void k7_powernow_init(void); 404 void k7_powernow_setperf(int); 405 /* powernow-k8.c */ 406 void k8_powernow_init(void); 407 void k8_powernow_setperf(int); 408 /* k1x-pstate.c */ 409 void k1x_init(struct cpu_info *); 410 void k1x_setperf(int); 411 #endif 412 413 /* npx.c */ 414 void npxdrop(struct proc *); 415 void npxsave_proc(struct proc *, int); 416 void npxsave_cpu(struct cpu_info *, int); 417 418 #ifdef USER_LDT 419 /* sys_machdep.h */ 420 extern int user_ldt_enable; 421 int i386_get_ldt(struct proc *, void *, register_t *); 422 int i386_set_ldt(struct proc *, void *, register_t *); 423 #endif 424 425 /* isa_machdep.c */ 426 void isa_defaultirq(void); 427 void isa_nodefaultirq(void); 428 int isa_nmi(void); 429 430 /* pmap.c */ 431 void pmap_bootstrap(vaddr_t); 432 433 /* vm_machdep.c */ 434 int kvtop(caddr_t); 435 436 #ifdef MULTIPROCESSOR 437 /* mp_setperf.c */ 438 void mp_setperf_init(void); 439 #endif 440 441 #ifdef VM86 442 /* vm86.c */ 443 void vm86_gpfault(struct proc *, int); 444 #endif /* VM86 */ 445 446 #endif /* _KERNEL */ 447 448 /* 449 * CTL_MACHDEP definitions. 450 */ 451 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 452 #define CPU_BIOS 2 /* BIOS variables */ 453 #define CPU_BLK2CHR 3 /* convert blk maj into chr one */ 454 #define CPU_CHR2BLK 4 /* convert chr maj into blk one */ 455 #define CPU_ALLOWAPERTURE 5 /* allow mmap of /dev/xf86 */ 456 #define CPU_CPUVENDOR 6 /* cpuid vendor string */ 457 #define CPU_CPUID 7 /* cpuid */ 458 #define CPU_CPUFEATURE 8 /* cpuid features */ 459 #define CPU_APMWARN 9 /* APM battery warning percentage */ 460 #define CPU_KBDRESET 10 /* keyboard reset under pcvt */ 461 #define CPU_APMHALT 11 /* halt -p hack */ 462 #define CPU_USERLDT 12 463 #define CPU_OSFXSR 13 /* uses FXSAVE/FXRSTOR */ 464 #define CPU_SSE 14 /* supports SSE */ 465 #define CPU_SSE2 15 /* supports SSE2 */ 466 #define CPU_XCRYPT 16 /* supports VIA xcrypt in userland */ 467 #define CPU_LIDSUSPEND 17 /* lid close causes a suspend */ 468 #define CPU_MAXID 18 /* number of valid machdep ids */ 469 470 #define CTL_MACHDEP_NAMES { \ 471 { 0, 0 }, \ 472 { "console_device", CTLTYPE_STRUCT }, \ 473 { "bios", CTLTYPE_INT }, \ 474 { "blk2chr", CTLTYPE_STRUCT }, \ 475 { "chr2blk", CTLTYPE_STRUCT }, \ 476 { "allowaperture", CTLTYPE_INT }, \ 477 { "cpuvendor", CTLTYPE_STRING }, \ 478 { "cpuid", CTLTYPE_INT }, \ 479 { "cpufeature", CTLTYPE_INT }, \ 480 { "apmwarn", CTLTYPE_INT }, \ 481 { "kbdreset", CTLTYPE_INT }, \ 482 { "apmhalt", CTLTYPE_INT }, \ 483 { "userldt", CTLTYPE_INT }, \ 484 { "osfxsr", CTLTYPE_INT }, \ 485 { "sse", CTLTYPE_INT }, \ 486 { "sse2", CTLTYPE_INT }, \ 487 { "xcrypt", CTLTYPE_INT }, \ 488 { "lidsuspend", CTLTYPE_INT }, \ 489 } 490 491 /* 492 * This needs to be included late since it relies on definitions higher 493 * up in this file. 494 */ 495 #if defined(MULTIPROCESSOR) && defined(_KERNEL) 496 #include <sys/mplock.h> 497 #endif 498 499 #endif /* !_MACHINE_CPU_H_ */ 500