1 /* $OpenBSD: frame.h,v 1.11 1999/11/25 18:28:06 mickey Exp $ */ 2 3 /* 4 * Copyright (c) 1999 Michael Shalayeff 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Michael Shalayeff. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 30 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 35 #ifndef _MACHINE_FRAME_H_ 36 #define _MACHINE_FRAME_H_ 37 38 #include <machine/reg.h> 39 40 /* 41 * Call frame definitions 42 */ 43 #define HPPA_FRAME_NARGS (12) 44 #define HPPA_FRAME_MAXARGS (HPPA_FRAME_NARGS * 4) 45 #define HPPA_FRAME_ARG(n) (-(32 + 4*((n) + 1))) 46 #define HPPA_FRAME_CARG(n,sp) ((register_t *)((sp) + HPPA_FRAME_ARG(n))) 47 #define HPPA_FRAME_SIZE (64) 48 #define HPPA_FRAME_PSP (-4) 49 #define HPPA_FRAME_EP (-8) 50 #define HPPA_FRAME_CLUP (-12) 51 #define HPPA_FRAME_SL (-16) 52 #define HPPA_FRAME_CRP (-20) 53 #define HPPA_FRAME_ERP (-24) 54 #define HPPA_FRAME_ESR4 (-28) 55 #define HPPA_FRAME_EDP (-32) 56 57 /* 58 * Macros to decode processor status word. 59 */ 60 #define HPPA_PC_PRIV_MASK 3 61 #define HPPA_PC_PRIV_KERN 0 62 #define HPPA_PC_PRIV_USER 3 63 #define USERMODE(pc) ((((register_t)pc) & HPPA_PC_PRIV_MASK) != HPPA_PC_PRIV_KERN) 64 #define KERNMODE(pc) (((register_t)pc) & ~HPPA_PC_PRIV_MASK) 65 66 #ifndef _LOCORE 67 /* 68 * the trapframe is divided into two parts: 69 * one is saved while we are in the physical mode (beginning of the trap), 70 * and should be kept as small as possible, since all the interrupts will 71 * be lost during this phase, also it must be 64-bytes aligned, per 72 * pa-risc stack conventions, and it's dependancies in the code (; 73 * the other part is filled out when we are already in the virtual mode, 74 * are able to catch interrupts (they are kept pending) and perform 75 * other trap activities (like tlb misses). 76 */ 77 struct trapframe { 78 /* the `physical' part of the trapframe */ 79 u_int tf_t1; /* r22 */ 80 u_int tf_t2; /* r21 */ 81 u_int tf_sp; /* r30 */ 82 u_int tf_t3; /* r20 */ 83 u_int tf_iisq_head; /* cr17 */ 84 u_int tf_iisq_tail; 85 u_int tf_iioq_head; /* cr18 */ 86 u_int tf_iioq_tail; 87 u_int tf_eiem; /* cr15 */ 88 u_int tf_ipsw; /* cr22 */ 89 u_int tf_sr3; 90 u_int tf_pidr1; /* cr8 */ 91 u_int tf_isr; /* cr20 */ 92 u_int tf_ior; /* cr21 */ 93 u_int tf_iir; /* cr19 */ 94 u_int tf_flags; 95 96 /* here starts the `virtual' part */ 97 u_int tf_sar; /* cr11 */ 98 u_int tf_r1; 99 u_int tf_rp; /* r2 */ 100 u_int tf_r3; /* frame pointer when -g */ 101 u_int tf_r4; 102 u_int tf_r5; 103 u_int tf_r6; 104 u_int tf_r7; 105 u_int tf_r8; 106 u_int tf_r9; 107 u_int tf_r10; 108 u_int tf_r11; 109 u_int tf_r12; 110 u_int tf_r13; 111 u_int tf_r14; 112 u_int tf_r15; 113 u_int tf_r16; 114 u_int tf_r17; 115 u_int tf_r18; 116 u_int tf_t4; /* r19 */ 117 u_int tf_arg3; /* r23 */ 118 u_int tf_arg2; /* r24 */ 119 u_int tf_arg1; /* r25 */ 120 u_int tf_arg0; /* r26 */ 121 u_int tf_dp; /* r27 */ 122 u_int tf_ret0; /* r28 */ 123 u_int tf_ret1; /* r29 */ 124 u_int tf_r31; 125 u_int tf_sr0; 126 u_int tf_sr1; 127 u_int tf_sr2; 128 u_int tf_sr4; 129 u_int tf_sr5; 130 u_int tf_sr6; 131 u_int tf_sr7; 132 u_int tf_pidr2; /* cr9 */ 133 u_int tf_pidr3; /* cr12 */ 134 u_int tf_pidr4; /* cr13 */ 135 u_int tf_rctr; /* cr0 */ 136 u_int tf_ccr; /* cr10 */ 137 u_int tf_eirr; /* cr23 - DDB */ 138 u_int tf_hptm; /* cr24 - DDB */ 139 u_int tf_vtop; /* cr25 - DDB */ 140 u_int tf_cr28; /* - DDB */ 141 u_int tf_cr30; /* uaddr */ 142 143 u_int tf_pad[3]; /* pad to 256 bytes */ 144 }; 145 #endif /* !_LOCORE */ 146 147 #endif /* !_MACHINE_FRAME_H_ */ 148