1 /* $OpenBSD: cpu.h,v 1.89 2016/05/10 14:52:03 deraadt Exp $ */ 2 3 /* 4 * Copyright (c) 2000-2004 Michael Shalayeff 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 * THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 /* 29 * Copyright (c) 1988-1994, The University of Utah and 30 * the Computer Systems Laboratory at the University of Utah (CSL). 31 * All rights reserved. 32 * 33 * Permission to use, copy, modify and distribute this software is hereby 34 * granted provided that (1) source code retains these copyright, permission, 35 * and disclaimer notices, and (2) redistributions including binaries 36 * reproduce the notices in supporting documentation, and (3) all advertising 37 * materials mentioning features or use of this software display the following 38 * acknowledgement: ``This product includes software developed by the 39 * Computer Systems Laboratory at the University of Utah.'' 40 * 41 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS 42 * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF 43 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 44 * 45 * CSL requests users of this software to return to csl-dist@cs.utah.edu any 46 * improvements that they make and grant CSL redistribution rights. 47 * 48 * Utah $Hdr: cpu.h 1.19 94/12/16$ 49 */ 50 51 #ifndef _MACHINE_CPU_H_ 52 #define _MACHINE_CPU_H_ 53 54 #ifdef _KERNEL 55 #include <machine/trap.h> 56 #include <machine/frame.h> 57 #endif /* _KERNEL */ 58 59 /* 60 * CPU types and features 61 */ 62 #define HPPA_FTRS_TLBU 0x00000001 63 #define HPPA_FTRS_BTLBU 0x00000002 64 #define HPPA_FTRS_HVT 0x00000004 65 #define HPPA_FTRS_W32B 0x00000008 66 67 #ifndef _LOCORE 68 #ifdef _KERNEL 69 #include <sys/device.h> 70 #include <sys/queue.h> 71 #include <sys/sched.h> 72 73 #include <machine/mutex.h> 74 75 /* 76 * Note that the alignment of ci_trap_save is important since we want to keep 77 * it within a single cache line. As a result, it must be kept as the first 78 * entry within the cpu_info struct. 79 */ 80 struct cpu_info { 81 register_t ci_trap_save[16]; 82 83 struct device *ci_dev; 84 int ci_cpuid; 85 hppa_hpa_t ci_hpa; 86 volatile int ci_flags; 87 88 struct proc *ci_curproc; 89 paddr_t ci_fpu_state; /* Process FPU state. */ 90 paddr_t ci_stack; 91 92 #if defined(MULTIPROCESSOR) 93 struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM]; 94 #endif 95 96 register_t ci_psw; /* Processor Status Word. */ 97 volatile int ci_cpl; 98 volatile u_long ci_mask; /* Hardware interrupt mask. */ 99 volatile u_long ci_ipending; 100 volatile int ci_in_intr; 101 int ci_want_resched; 102 u_long ci_itmr; 103 104 volatile u_long ci_ipi; /* IPIs pending. */ 105 struct mutex ci_ipi_mtx; 106 107 struct schedstate_percpu ci_schedstate; 108 u_int32_t ci_randseed; 109 #ifdef DIAGNOSTIC 110 int ci_mutex_level; 111 #endif 112 #ifdef GPROF 113 struct gmonparam *ci_gmon; 114 #endif 115 } __attribute__((__aligned__(64))); 116 117 #define CPUF_RUNNING 0x0001 /* CPU is running. */ 118 119 #ifdef MULTIPROCESSOR 120 #define HPPA_MAXCPUS 4 121 #else 122 #define HPPA_MAXCPUS 1 123 #endif 124 125 extern struct cpu_info cpu_info[HPPA_MAXCPUS]; 126 127 #define MAXCPUS HPPA_MAXCPUS 128 129 static __inline struct cpu_info * 130 curcpu(void) 131 { 132 struct cpu_info *ci; 133 134 asm volatile ("mfctl %%cr29, %0" : "=r"(ci)); 135 136 return ci; 137 } 138 139 #define cpu_number() (curcpu()->ci_cpuid) 140 141 #define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0) 142 #define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) 143 #define CPU_INFO_ITERATOR int 144 #define CPU_INFO_FOREACH(cii, ci) \ 145 for (cii = 0, ci = &cpu_info[0]; cii < ncpus; cii++, ci++) 146 147 #define CPU_BUSY_CYCLE() do {} while (0) 148 149 /* types */ 150 enum hppa_cpu_type { 151 hpcxs, hpcxt, hpcxta, hpcxl, hpcxl2, hpcxu, hpcxu2, hpcxw 152 }; 153 extern enum hppa_cpu_type cpu_type; 154 extern const char *cpu_typename; 155 extern int cpu_hvers; 156 #endif 157 #endif 158 159 /* 160 * COPR/SFUs 161 */ 162 #define HPPA_FPUS 0xc0 163 #define HPPA_FPUVER(w) (((w) & 0x003ff800) >> 11) 164 #define HPPA_FPU_OP(w) ((w) >> 26) 165 #define HPPA_FPU_UNMPL 0x01 /* exception reg, the rest is << 1 */ 166 #define HPPA_FPU_ILL 0x80 /* software-only */ 167 #define HPPA_FPU_I 0x01 168 #define HPPA_FPU_U 0x02 169 #define HPPA_FPU_O 0x04 170 #define HPPA_FPU_Z 0x08 171 #define HPPA_FPU_V 0x10 172 #define HPPA_FPU_D 0x20 173 #define HPPA_FPU_T 0x40 174 #define HPPA_FPU_XMASK 0x7f 175 #define HPPA_FPU_T_POS 25 176 #define HPPA_FPU_RM 0x00000600 177 #define HPPA_FPU_CQ 0x00fff800 178 #define HPPA_FPU_C 0x04000000 179 #define HPPA_FPU_FLSH 27 180 #define HPPA_FPU_INIT (0) 181 #define HPPA_FPU_FORK(s) ((s) & ~((u_int64_t)(HPPA_FPU_XMASK)<<32)) 182 #define HPPA_PMSFUS 0x20 /* ??? */ 183 184 /* 185 * Exported definitions unique to hp700/PA-RISC cpu support. 186 */ 187 188 #define HPPA_PGALIAS 0x00400000 189 #define HPPA_PGAMASK 0xffc00000 190 #define HPPA_PGAOFF 0x003fffff 191 192 #define HPPA_IOBEGIN 0xf0000000 193 #define HPPA_IOLEN 0x10000000 194 #define HPPA_PDC_LOW 0xef000000 195 #define HPPA_PDC_HIGH 0xf1000000 196 #define HPPA_IOBCAST 0xfffc0000 197 #define HPPA_LBCAST 0xfffc0000 198 #define HPPA_GBCAST 0xfffe0000 199 #define HPPA_FPA 0xfff80000 200 #define HPPA_FLEX_DATA 0xfff80001 201 #define HPPA_DMA_ENABLE 0x00000001 202 #define HPPA_FLEX_MASK 0xfffc0000 203 #define HPPA_FLEX_SIZE (1 + ~HPPA_FLEX_MASK) 204 #define HPPA_FLEX(a) (((a) & HPPA_FLEX_MASK) >> 18) 205 #define HPPA_SPA_ENABLE 0x00000020 206 #define HPPA_NMODSPBUS 64 207 208 #define clockframe trapframe 209 #define CLKF_PC(framep) ((framep)->tf_iioq_head) 210 #define CLKF_INTR(framep) ((framep)->tf_flags & TFF_INTR) 211 #define CLKF_USERMODE(framep) ((framep)->tf_flags & T_USER) 212 #define CLKF_SYSCALL(framep) ((framep)->tf_flags & TFF_SYS) 213 214 #define need_proftick(p) setsoftast(p) 215 #define PROC_PC(p) ((p)->p_md.md_regs->tf_iioq_head & ~HPPA_PC_PRIV_MASK) 216 #define PROC_STACK(p) ((p)->p_md.md_regs->tf_sp) 217 218 #ifndef _LOCORE 219 #ifdef _KERNEL 220 221 #define DELAY(x) delay(x) 222 223 extern int (*cpu_desidhash)(void); 224 225 void signotify(struct proc *); 226 void delay(u_int us); 227 void hppa_init(paddr_t start); 228 void trap(int type, struct trapframe *frame); 229 int spcopy(pa_space_t ssp, const void *src, 230 pa_space_t dsp, void *dst, size_t size); 231 int spstrcpy(pa_space_t ssp, const void *src, 232 pa_space_t dsp, void *dst, size_t size, size_t *rsize); 233 int copy_on_fault(void); 234 void switch_trampoline(void); 235 int cpu_dumpsize(void); 236 int cpu_dump(void); 237 238 #ifdef MULTIPROCESSOR 239 void cpu_boot_secondary_processors(void); 240 void cpu_hw_init(void); 241 void cpu_hatch(void); 242 void cpu_unidle(struct cpu_info *); 243 #else 244 #define cpu_unidle(ci) 245 #endif 246 247 extern void need_resched(struct cpu_info *); 248 #define clear_resched(ci) (ci)->ci_want_resched = 0 249 250 #endif 251 252 /* 253 * Boot arguments stuff 254 */ 255 256 #define BOOTARG_LEN PAGE_SIZE 257 #define BOOTARG_OFF 0x10000 258 259 /* 260 * CTL_MACHDEP definitions. 261 */ 262 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 263 #define CPU_FPU 2 /* int: fpu present/enabled */ 264 #define CPU_LED_BLINK 3 /* int: twiddle heartbeat LED/LCD */ 265 #define CPU_MAXID 4 /* number of valid machdep ids */ 266 267 #define CTL_MACHDEP_NAMES { \ 268 { 0, 0 }, \ 269 { "console_device", CTLTYPE_STRUCT }, \ 270 { "fpu", CTLTYPE_INT }, \ 271 { "led_blink", CTLTYPE_INT }, \ 272 } 273 274 #ifdef _KERNEL 275 #include <sys/queue.h> 276 277 #ifdef MULTIPROCESSOR 278 #include <sys/mplock.h> 279 #endif 280 281 struct blink_led { 282 void (*bl_func)(void *, int); 283 void *bl_arg; 284 SLIST_ENTRY(blink_led) bl_next; 285 }; 286 287 extern void blink_led_register(struct blink_led *); 288 #endif 289 #endif 290 291 #endif /* _MACHINE_CPU_H_ */ 292