xref: /openbsd-src/sys/arch/hppa/include/cpu.h (revision b2ea75c1b17e1a9a339660e7ed45cd24946b230e)
1 /*	$OpenBSD: cpu.h,v 1.20 2001/01/29 00:01:58 mickey Exp $	*/
2 
3 /*
4  * Copyright (c) 2000-2001 Michael Shalayeff
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *      This product includes software developed by Michael Shalayeff.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
25  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
30  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31  * THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 /*
34  * Copyright (c) 1988-1994, The University of Utah and
35  * the Computer Systems Laboratory at the University of Utah (CSL).
36  * All rights reserved.
37  *
38  * Permission to use, copy, modify and distribute this software is hereby
39  * granted provided that (1) source code retains these copyright, permission,
40  * and disclaimer notices, and (2) redistributions including binaries
41  * reproduce the notices in supporting documentation, and (3) all advertising
42  * materials mentioning features or use of this software display the following
43  * acknowledgement: ``This product includes software developed by the
44  * Computer Systems Laboratory at the University of Utah.''
45  *
46  * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
47  * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
48  * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49  *
50  * CSL requests users of this software to return to csl-dist@cs.utah.edu any
51  * improvements that they make and grant CSL redistribution rights.
52  *
53  * 	Utah $Hdr: cpu.h 1.19 94/12/16$
54  */
55 
56 #ifndef	_MACHINE_CPU_H_
57 #define	_MACHINE_CPU_H_
58 
59 #include <machine/trap.h>
60 #include <machine/frame.h>
61 
62 /*
63  * CPU types and features
64  */
65 #define	HPPA_FTRS_BTLBS		0x00000001
66 #define	HPPA_FTRS_BTLBU		0x00000002
67 #define	HPPA_FTRS_HVT		0x00000004
68 #define	HPPA_FTRS_W32B		0x00000008
69 
70 #ifndef _LOCORE
71 /* types */
72 enum hppa_cpu_type {
73 	hpcx, hpcxs, hpcxt, hpcxta, hpcxl, hpcxl2, hpcxu, hpcxu2, hpcxw
74 };
75 extern enum hppa_cpu_type cpu_type;
76 extern const char *cpu_typename;
77 #endif
78 
79 /*
80  * COPR/SFUs
81  */
82 #define	HPPA_FPUS	0xc0
83 #define	HPPA_PMSFUS	0x20	/* ??? */
84 
85 /*
86  * Exported definitions unique to hp700/PA-RISC cpu support.
87  */
88 
89 /*
90  * definitions of cpu-dependent requirements
91  * referenced in generic code
92  */
93 #undef	COPY_SIGCODE		/* copy sigcode above user stack in exec */
94 
95 #define	HPPA_PGALIAS	0x00100000
96 #define	HPPA_PGAMASK	0xfff00000
97 #define	HPPA_PGAOFF	0x000fffff
98 
99 #define	HPPA_IOSPACE	0xf0000000
100 #define	HPPA_IOBCAST	0xfffc0000
101 #define	HPPA_PDC_LOW	0xef000000
102 #define	HPPA_PDC_HIGH	0xf1000000
103 #define	HPPA_FPA	0xfff80000
104 #define	HPPA_FLEX_DATA	0xfff80001
105 #define	HPPA_DMA_ENABLE	0x00000001
106 #define	HPPA_FLEX_MASK	0xfffc0000
107 #define	HPPA_SPA_ENABLE	0x00000020
108 #define	HPPA_NMODSPBUS	64
109 
110 #define	clockframe		trapframe
111 #define	CLKF_BASEPRI(framep)	((framep)->tf_eiem == ~0U)
112 #define	CLKF_PC(framep)		((framep)->tf_iioq_head)
113 #define	CLKF_INTR(framep)	((framep)->tf_flags & TFF_INTR)
114 #define	CLKF_USERMODE(framep)	((framep)->tf_flags & T_USER)
115 #define	CLKF_SYSCALL(framep)	((framep)->tf_flags & TFF_SYS)
116 
117 #define	signotify(p)		(setsoftast())
118 #define	need_resched()		(want_resched = 1, setsoftast())
119 #define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, setsoftast())
120 
121 #ifndef _LOCORE
122 #ifdef _KERNEL
123 #define MD_CACHE_FLUSH 0
124 #define MD_CACHE_PURGE 1
125 #define MD_CACHE_CTL(a,s,t)	\
126 	(((t)? pdcache : fdcache) (HPPA_SID_KERNEL,(vaddr_t)(a),(s)))
127 
128 extern int want_resched;
129 
130 #define DELAY(x) delay(x)
131 
132 static __inline long
133 kvtop (const caddr_t va)
134 {
135 	long ret;
136 	__asm __volatile ("lpa %%r0(%1), %0" : "=r" (ret) : "r" (va));
137 	return ret;
138 }
139 
140 extern int (*cpu_desidhash) __P((void));
141 
142 void	delay __P((u_int us));
143 void	hppa_init __P((paddr_t start));
144 void	trap __P((int type, struct trapframe *frame));
145 int	dma_cachectl __P((caddr_t p, int size));
146 int	spcopy __P((pa_space_t ssp, const void *src,
147 		    pa_space_t dsp, void *dst, size_t size));
148 int	spstrcpy __P((pa_space_t ssp, const void *src,
149 		      pa_space_t dsp, void *dst, size_t size, size_t *rsize));
150 int	copy_on_fault __P((void));
151 void	child_return __P((struct proc *p));
152 void	switch_trampoline __P((void));
153 void	switch_exit __P((struct proc *p));
154 int	cpu_dumpsize __P((void));
155 int	cpu_dump __P((void));
156 #endif
157 
158 /*
159  * Boot arguments stuff
160  */
161 
162 #define	BOOTARG_LEN	(NBPG)
163 #define	BOOTARG_OFF	(0x10000)
164 
165 /*
166  * CTL_MACHDEP definitions.
167  */
168 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
169 #define	CPU_MAXID		2	/* number of valid machdep ids */
170 
171 #define CTL_MACHDEP_NAMES { \
172 	{ 0, 0 }, \
173 	{ "console_device", CTLTYPE_STRUCT }, \
174 }
175 #endif
176 
177 #endif /* _MACHINE_CPU_H_ */
178