xref: /openbsd-src/sys/arch/hppa/include/cpu.h (revision 2b0358df1d88d06ef4139321dd05bd5e05d91eaf)
1 /*	$OpenBSD: cpu.h,v 1.60 2009/02/01 14:53:04 miod Exp $	*/
2 
3 /*
4  * Copyright (c) 2000-2004 Michael Shalayeff
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
25  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26  * THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 /*
29  * Copyright (c) 1988-1994, The University of Utah and
30  * the Computer Systems Laboratory at the University of Utah (CSL).
31  * All rights reserved.
32  *
33  * Permission to use, copy, modify and distribute this software is hereby
34  * granted provided that (1) source code retains these copyright, permission,
35  * and disclaimer notices, and (2) redistributions including binaries
36  * reproduce the notices in supporting documentation, and (3) all advertising
37  * materials mentioning features or use of this software display the following
38  * acknowledgement: ``This product includes software developed by the
39  * Computer Systems Laboratory at the University of Utah.''
40  *
41  * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
42  * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
43  * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
44  *
45  * CSL requests users of this software to return to csl-dist@cs.utah.edu any
46  * improvements that they make and grant CSL redistribution rights.
47  *
48  * 	Utah $Hdr: cpu.h 1.19 94/12/16$
49  */
50 
51 #ifndef	_MACHINE_CPU_H_
52 #define	_MACHINE_CPU_H_
53 
54 #include <machine/trap.h>
55 #include <machine/frame.h>
56 
57 /*
58  * CPU types and features
59  */
60 #define	HPPA_FTRS_TLBU		0x00000001
61 #define	HPPA_FTRS_BTLBU		0x00000002
62 #define	HPPA_FTRS_HVT		0x00000004
63 #define	HPPA_FTRS_W32B		0x00000008
64 
65 #ifndef _LOCORE
66 #ifdef _KERNEL
67 #include <sys/queue.h>
68 #include <sys/sched.h>
69 
70 struct cpu_info {
71 	struct proc	*ci_curproc;
72 
73 	struct schedstate_percpu ci_schedstate;
74 	u_int32_t	ci_randseed;
75 };
76 
77 extern struct cpu_info cpu_info_primary;
78 
79 #define curcpu()	(&cpu_info_primary)
80 
81 #define CPU_IS_PRIMARY(ci)	1
82 #define CPU_INFO_ITERATOR	int
83 #define CPU_INFO_FOREACH(cii, ci)	\
84 	for (cii = 0, ci = curcpu(); ci != NULL; ci = NULL)
85 #define CPU_INFO_UNIT(ci)	0
86 #define MAXCPUS	1
87 #define cpu_number()	0
88 #define cpu_unidle(ci)
89 
90 /* types */
91 enum hppa_cpu_type {
92 	hpcxs, hpcxt, hpcxta, hpcxl, hpcxl2, hpcxu, hpcxu2, hpcxw
93 };
94 extern enum hppa_cpu_type cpu_type;
95 extern const char *cpu_typename;
96 extern int cpu_hvers;
97 extern register_t kpsw;
98 #endif
99 #endif
100 
101 /*
102  * COPR/SFUs
103  */
104 #define	HPPA_FPUS	0xc0
105 #define	HPPA_FPUVER(w)	(((w) & 0x003ff800) >> 11)
106 #define	HPPA_FPU_OP(w)	((w) >> 26)
107 #define	HPPA_FPU_UNMPL	0x01	/* exception reg, the rest is << 1 */
108 #define	HPPA_FPU_ILL	0x80	/* software-only */
109 #define	HPPA_FPU_I	0x01
110 #define	HPPA_FPU_U	0x02
111 #define	HPPA_FPU_O	0x04
112 #define	HPPA_FPU_Z	0x08
113 #define	HPPA_FPU_V	0x10
114 #define	HPPA_FPU_D	0x20
115 #define	HPPA_FPU_T	0x40
116 #define	HPPA_FPU_XMASK	0x7f
117 #define	HPPA_FPU_T_POS	25
118 #define	HPPA_FPU_RM	0x00000600
119 #define	HPPA_FPU_CQ	0x00fff800
120 #define	HPPA_FPU_C	0x04000000
121 #define	HPPA_FPU_FLSH	27
122 #define	HPPA_FPU_INIT	(0)
123 #define	HPPA_FPU_FORK(s) ((s) & ~((u_int64_t)(HPPA_FPU_XMASK)<<32))
124 #define	HPPA_PMSFUS	0x20	/* ??? */
125 
126 /*
127  * Exported definitions unique to hp700/PA-RISC cpu support.
128  */
129 
130 #define	HPPA_PGALIAS	0x00400000
131 #define	HPPA_PGAMASK	0xffc00000
132 #define	HPPA_PGAOFF	0x003fffff
133 
134 #define	HPPA_IOBEGIN    0xf0000000
135 #define	HPPA_IOLEN      0x10000000
136 #define	HPPA_PDC_LOW	0xef000000
137 #define	HPPA_PDC_HIGH	0xf1000000
138 #define	HPPA_IOBCAST	0xfffc0000
139 #define	HPPA_LBCAST	0xfffc0000
140 #define	HPPA_GBCAST	0xfffe0000
141 #define	HPPA_FPA	0xfff80000
142 #define	HPPA_FLEX_DATA	0xfff80001
143 #define	HPPA_DMA_ENABLE	0x00000001
144 #define	HPPA_FLEX_MASK	0xfffc0000
145 #define	HPPA_FLEX_SIZE	(1 + ~HPPA_FLEX_MASK)
146 #define	HPPA_FLEX(a)	(((a) & HPPA_FLEX_MASK) >> 18)
147 #define	HPPA_SPA_ENABLE	0x00000020
148 #define	HPPA_NMODSPBUS	64
149 
150 #define	clockframe		trapframe
151 #define	CLKF_PC(framep)		((framep)->tf_iioq_head)
152 #define	CLKF_INTR(framep)	((framep)->tf_flags & TFF_INTR)
153 #define	CLKF_USERMODE(framep)	((framep)->tf_flags & T_USER)
154 #define	CLKF_SYSCALL(framep)	((framep)->tf_flags & TFF_SYS)
155 
156 #define	signotify(p)		(setsoftast())
157 #define	need_resched(ci)	(want_resched = 1, setsoftast())
158 #define clear_resched(ci) 	want_resched = 0
159 #define	need_proftick(p)	setsoftast()
160 #define	PROC_PC(p)		((p)->p_md.md_regs->tf_iioq_head)
161 
162 #ifndef _LOCORE
163 #ifdef _KERNEL
164 #define MD_CACHE_FLUSH 0
165 #define MD_CACHE_PURGE 1
166 #define MD_CACHE_CTL(a,s,t)	\
167 	(((t)? pdcache : fdcache) (HPPA_SID_KERNEL,(vaddr_t)(a),(s)))
168 
169 extern int want_resched;
170 
171 #define DELAY(x) delay(x)
172 
173 extern int (*cpu_desidhash)(void);
174 
175 void	delay(u_int us);
176 void	hppa_init(paddr_t start);
177 void	trap(int type, struct trapframe *frame);
178 int	spcopy(pa_space_t ssp, const void *src,
179 		    pa_space_t dsp, void *dst, size_t size);
180 int	spstrcpy(pa_space_t ssp, const void *src,
181 		      pa_space_t dsp, void *dst, size_t size, size_t *rsize);
182 int	copy_on_fault(void);
183 void	switch_trampoline(void);
184 int	cpu_dumpsize(void);
185 int	cpu_dump(void);
186 #endif
187 
188 /*
189  * Boot arguments stuff
190  */
191 
192 #define	BOOTARG_LEN	(NBPG)
193 #define	BOOTARG_OFF	(0x10000)
194 
195 /*
196  * CTL_MACHDEP definitions.
197  */
198 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
199 #define	CPU_FPU			2	/* int: fpu present/enabled */
200 #define	CPU_LED_BLINK		3	/* int: twiddle heartbeat LED/LCD */
201 #define	CPU_MAXID		4	/* number of valid machdep ids */
202 
203 #define CTL_MACHDEP_NAMES { \
204 	{ 0, 0 }, \
205 	{ "console_device", CTLTYPE_STRUCT }, \
206 	{ "fpu", CTLTYPE_INT }, \
207 	{ "led_blink", CTLTYPE_INT }, \
208 }
209 
210 #ifdef _KERNEL
211 #include <sys/queue.h>
212 
213 struct blink_led {
214 	void (*bl_func)(void *, int);
215 	void *bl_arg;
216 	SLIST_ENTRY(blink_led) bl_next;
217 };
218 
219 extern void blink_led_register(struct blink_led *);
220 #endif
221 #endif
222 
223 #endif /* _MACHINE_CPU_H_ */
224