1 /* $OpenBSD: asm.h,v 1.12 2001/03/29 02:15:57 mickey Exp $ */ 2 3 /* 4 * Copyright (c) 1990,1991,1994 The University of Utah and 5 * the Computer Systems Laboratory (CSL). All rights reserved. 6 * 7 * Permission to use, copy, modify and distribute this software is hereby 8 * granted provided that (1) source code retains these copyright, permission, 9 * and disclaimer notices, and (2) redistributions including binaries 10 * reproduce the notices in supporting documentation, and (3) all advertising 11 * materials mentioning features or use of this software display the following 12 * acknowledgement: ``This product includes software developed by the 13 * Computer Systems Laboratory at the University of Utah.'' 14 * 15 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS 16 * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF 17 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * CSL requests users of this software to return to csl-dist@cs.utah.edu any 20 * improvements that they make and grant CSL redistribution rights. 21 * 22 * Utah $Hdr: asm.h 1.8 94/12/14$ 23 */ 24 25 #ifndef _MACHINE_ASM_H_ 26 #define _MACHINE_ASM_H_ 27 28 /* 29 * hppa assembler definitions 30 */ 31 32 /* 33 * Hardware General Registers 34 */ 35 r0 .reg %r0 36 r1 .reg %r1 37 r2 .reg %r2 38 r3 .reg %r3 39 r4 .reg %r4 40 r5 .reg %r5 41 r6 .reg %r6 42 r7 .reg %r7 43 r8 .reg %r8 44 r9 .reg %r9 45 r10 .reg %r10 46 r11 .reg %r11 47 r12 .reg %r12 48 r13 .reg %r13 49 r14 .reg %r14 50 r15 .reg %r15 51 r16 .reg %r16 52 r17 .reg %r17 53 r18 .reg %r18 54 r19 .reg %r19 55 r20 .reg %r20 56 r21 .reg %r21 57 r22 .reg %r22 58 r23 .reg %r23 59 r24 .reg %r24 60 r25 .reg %r25 61 r26 .reg %r26 62 r27 .reg %r27 63 r28 .reg %r28 64 r29 .reg %r29 65 r30 .reg %r30 66 r31 .reg %r31 67 68 /* 69 * Hardware Space Registers 70 */ 71 sr0 .reg %sr0 72 sr1 .reg %sr1 73 sr2 .reg %sr2 74 sr3 .reg %sr3 75 sr4 .reg %sr4 76 sr5 .reg %sr5 77 sr6 .reg %sr6 78 sr7 .reg %sr7 79 80 /* 81 * Hardware Floating Point Registers 82 */ 83 fr0 .reg %fr0 84 fr1 .reg %fr1 85 fr2 .reg %fr2 86 fr3 .reg %fr3 87 fr4 .reg %fr4 88 fr5 .reg %fr5 89 fr6 .reg %fr6 90 fr7 .reg %fr7 91 fr8 .reg %fr8 92 fr9 .reg %fr9 93 fr10 .reg %fr10 94 fr11 .reg %fr11 95 fr12 .reg %fr12 96 fr13 .reg %fr13 97 fr14 .reg %fr14 98 fr15 .reg %fr15 99 fr16 .reg %fr16 100 fr17 .reg %fr17 101 fr18 .reg %fr18 102 fr19 .reg %fr19 103 fr20 .reg %fr20 104 fr21 .reg %fr21 105 fr22 .reg %fr22 106 fr23 .reg %fr23 107 fr24 .reg %fr24 108 fr25 .reg %fr25 109 fr26 .reg %fr26 110 fr27 .reg %fr27 111 fr28 .reg %fr28 112 fr29 .reg %fr29 113 fr30 .reg %fr30 114 fr31 .reg %fr31 115 116 /* 117 * Hardware Control Registers 118 */ 119 cr0 .reg %cr0 120 cr8 .reg %cr8 121 cr9 .reg %cr9 122 cr10 .reg %cr10 123 cr11 .reg %cr11 124 cr12 .reg %cr12 125 cr13 .reg %cr13 126 cr14 .reg %cr14 127 cr15 .reg %cr15 128 cr16 .reg %cr16 129 cr17 .reg %cr17 130 cr18 .reg %cr18 131 cr19 .reg %cr19 132 cr20 .reg %cr20 133 cr21 .reg %cr21 134 cr22 .reg %cr22 135 cr23 .reg %cr23 136 cr24 .reg %cr24 137 cr25 .reg %cr25 138 cr26 .reg %cr26 139 cr27 .reg %cr27 140 cr28 .reg %cr28 141 cr29 .reg %cr29 142 cr30 .reg %cr30 143 cr31 .reg %cr31 144 145 rctr .reg %cr0 146 pidr1 .reg %cr8 147 pidr2 .reg %cr9 148 ccr .reg %cr10 149 sar .reg %cr11 150 pidr3 .reg %cr12 151 pidr4 .reg %cr13 152 iva .reg %cr14 153 eiem .reg %cr15 154 itmr .reg %cr16 155 pcsq .reg %cr17 156 pcoq .reg %cr18 157 iir .reg %cr19 158 isr .reg %cr20 159 ior .reg %cr21 160 ipsw .reg %cr22 161 eirr .reg %cr23 162 hptmask .reg %cr24 163 tr0 .reg %cr24 164 vtop .reg %cr25 165 tr1 .reg %cr25 166 tr2 .reg %cr26 167 tr3 .reg %cr27 168 tr4 .reg %cr28 169 tr5 .reg %cr29 170 tr6 .reg %cr30 171 tr7 .reg %cr31 172 173 /* 174 * Calling Convention 175 */ 176 rp .reg %r2 177 arg3 .reg %r23 178 arg2 .reg %r24 179 arg1 .reg %r25 180 arg0 .reg %r26 181 dp .reg %r27 182 ret0 .reg %r28 183 ret1 .reg %r29 184 sl .reg %r29 185 sp .reg %r30 186 187 /* 188 * Temporary registers 189 */ 190 t1 .reg %r22 191 t2 .reg %r21 192 t3 .reg %r20 193 t4 .reg %r19 194 195 /* 196 * Temporary space registers 197 */ 198 ts1 .reg %sr2 199 200 /* 201 * Space Registers - SW Conventions 202 */ 203 sret .reg %sr1 ; return value 204 sarg .reg %sr1 ; argument 205 206 /* 207 * Floating Point Registers - SW Conventions 208 */ 209 farg0 .reg %fr5 210 farg1 .reg %fr6 211 farg2 .reg %fr7 212 farg3 .reg %fr8 213 fret .reg %fr4 214 215 /* 216 * Temporary floating point registers 217 */ 218 tf1 .reg %fr11 219 tf2 .reg %fr10 220 tf3 .reg %fr9 221 tf4 .reg %fr8 222 223 #ifdef __STDC__ 224 #define __CONCAT(a,b) a ## b 225 #else 226 #define __CONCAT(a,b) a/**/b 227 #endif 228 229 #ifdef PROF 230 #define _PROF_PROLOGUE !\ 231 stw rp, HPPA_FRAME_CRP(sr0,sp) !\ 232 ldil L%_mcount,r1 !\ 233 ble R%_mcount(sr0,r1) !\ 234 ldo HPPA_FRAME_SIZE(sp),sp !\ 235 ldw HPPA_FRAME_CRP(sr0,sp),rp 236 #else 237 #define _PROF_PROLOGUE 238 #endif 239 240 #define LEAF_ENTRY(x) ! .text ! .align 4 !\ 241 .export x, entry ! .label x ! .proc !\ 242 .callinfo frame=0,no_calls,save_rp !\ 243 .entry ! _PROF_PROLOGUE 244 245 #define ENTRY(x,n) ! .text ! .align 4 !\ 246 .export x, entry ! .label x ! .proc !\ 247 .callinfo frame=n,calls, save_rp, save_sp !\ 248 .entry ! _PROF_PROLOGUE 249 250 #define ALTENTRY(x) ! .export x, entry ! .label x 251 #define EXIT(x) ! .exit ! .procend 252 253 #endif /* _MACHINE_ASM_H_ */ 254