xref: /openbsd-src/sys/arch/hppa/dev/cpu.c (revision 8500990981f885cbe5e6a4958549cacc238b5ae6)
1 /*	$OpenBSD: cpu.c,v 1.23 2003/08/22 18:09:52 mickey Exp $	*/
2 
3 /*
4  * Copyright (c) 1998-2002 Michael Shalayeff
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Michael Shalayeff.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND,
27  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/device.h>
36 #include <sys/reboot.h>
37 
38 #include <machine/cpufunc.h>
39 #include <machine/pdc.h>
40 #include <machine/reg.h>
41 #include <machine/iomod.h>
42 #include <machine/autoconf.h>
43 
44 #include <hppa/dev/cpudevs.h>
45 
46 struct cpu_softc {
47 	struct  device sc_dev;
48 
49 	hppa_hpa_t sc_hpa;
50 	void *sc_ih;
51 };
52 
53 int	cpumatch(struct device *, void *, void *);
54 void	cpuattach(struct device *, struct device *, void *);
55 
56 struct cfattach cpu_ca = {
57 	sizeof(struct cpu_softc), cpumatch, cpuattach
58 };
59 
60 struct cfdriver cpu_cd = {
61 	NULL, "cpu", DV_DULL
62 };
63 
64 int
65 cpumatch(parent, cfdata, aux)
66 	struct device *parent;
67 	void *cfdata;
68 	void *aux;
69 {
70 	struct confargs *ca = aux;
71 	struct cfdata *cf = cfdata;
72 
73 	/* there will be only one for now XXX */
74 	/* probe any 1.0, 1.1 or 2.0 */
75 	if (cf->cf_unit > 0 ||
76 	    ca->ca_type.iodc_type != HPPA_TYPE_NPROC ||
77 	    ca->ca_type.iodc_sv_model != HPPA_NPROC_HPPA)
78 		return 0;
79 
80 	return 1;
81 }
82 
83 int
84 cpu_hardclock(void *v)
85 {
86 	hardclock(v);
87 	return (1);
88 }
89 
90 void
91 cpuattach(parent, self, aux)
92 	struct device *parent;
93 	struct device *self;
94 	void *aux;
95 {
96 	/* machdep.c */
97 	extern struct pdc_model pdc_model;
98 	extern struct pdc_cache pdc_cache;
99 	extern struct pdc_btlb pdc_btlb;
100 	extern u_int cpu_ticksnum, cpu_ticksdenom;
101 	extern u_int fpu_enable;
102 
103 	struct cpu_softc *sc = (struct cpu_softc *)self;
104 	struct confargs *ca = aux;
105 	u_int mhz = 100 * cpu_ticksnum / cpu_ticksdenom;
106 	const char *p;
107 
108 	printf (": %s ", cpu_typename);
109 	if (pdc_model.hvers) {
110 		static const char lvls[4][4] = { "0", "1", "1.5", "2" };
111 
112 		printf("L%s-%c ", lvls[pdc_model.pa_lvl], "AB"[pdc_model.mc]);
113 	}
114 
115 	printf ("%d", mhz / 100);
116 	if (mhz % 100 > 9)
117 		printf(".%02d", mhz % 100);
118 	printf("MHz");
119 
120 	if (fpu_enable) {
121 		u_int32_t ver[2];
122 
123 		mtctl(fpu_enable, CR_CCR);
124 		__asm volatile(
125 		    "fstds   %%fr0,0(%0)\n\t"
126 		    "copr,0,0\n\t"
127 		    "fstds   %%fr0,0(%0)"
128 		    :: "r" (&ver) : "memory");
129 		mtctl(0, CR_CCR);
130 		ver[0] = HPPA_FPUVER(ver[0]);
131 		printf(", FPU %s rev %d",
132 		    hppa_mod_info(HPPA_TYPE_FPU, ver[0] >> 5), ver[0] & 0x1f);
133 	}
134 
135 	printf("\n%s: ", self->dv_xname);
136 	p = "";
137 	if (!pdc_cache.dc_conf.cc_sh) {
138 		printf("%uK(%db/l) Icache, ",
139 		    pdc_cache.ic_size / 1024, pdc_cache.ic_conf.cc_line * 16);
140 		p = "D";
141 	}
142 	/* TODO decode associativity */
143 	printf("%uK(%db/l) wr-%s %scoherent %scache, ",
144 	    pdc_cache.dc_size / 1024, pdc_cache.dc_conf.cc_line * 16,
145 	    pdc_cache.dc_conf.cc_wt? "thru" : "back",
146 	    pdc_cache.dc_conf.cc_cst? "" : "in", p);
147 
148 	p = "";
149 	if (!pdc_cache.dt_conf.tc_sh) {
150 		printf("%u ITLB, ", pdc_cache.it_size);
151 		p = "D";
152 	}
153 	printf("%u %scoherent %sTLB",
154 	    pdc_cache.dt_size, pdc_cache.dt_conf.tc_cst? "" : "in", p);
155 
156 	if (pdc_btlb.finfo.num_c)
157 		printf(", %u BTLB\n", pdc_btlb.finfo.num_c);
158 	else
159 		printf(", %u/%u D/I BTLBs\n",
160 		    pdc_btlb.finfo.num_i, pdc_btlb.finfo.num_d);
161 
162 	/* sanity against lusers amongst config editors */
163 	if (ca->ca_irq == 31)
164 		sc->sc_ih = cpu_intr_establish(IPL_CLOCK, ca->ca_irq,
165 		    cpu_hardclock, NULL /*frame*/, sc->sc_dev.dv_xname);
166 	else
167 		printf ("%s: bad irq %d\n", sc->sc_dev.dv_xname, ca->ca_irq);
168 }
169