1 /* $OpenBSD: sxiahci.c,v 1.11 2016/08/22 11:24:45 kettenis Exp $ */ 2 /* 3 * Copyright (c) 2013 Patrick Wildt <patrick@blueri.se> 4 * Copyright (c) 2013,2014 Artturi Alm 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/param.h> 20 #include <sys/systm.h> 21 #include <sys/buf.h> 22 #include <sys/kernel.h> 23 #include <sys/malloc.h> 24 #include <sys/device.h> 25 #include <sys/queue.h> 26 27 #include <machine/bus.h> 28 #include <machine/fdt.h> 29 30 #include <dev/ic/ahcireg.h> 31 #include <dev/ic/ahcivar.h> 32 33 #include <armv7/armv7/armv7var.h> 34 #include <armv7/sunxi/sunxireg.h> 35 36 #include <dev/ofw/openfirm.h> 37 #include <dev/ofw/ofw_clock.h> 38 #include <dev/ofw/ofw_regulator.h> 39 #include <dev/ofw/fdt.h> 40 41 #define SXIAHCI_CAP 0x0000 42 #define SXIAHCI_GHC 0x0004 43 #define SXIAHCI_PI 0x000c 44 #define SXIAHCI_PHYCS0 0x00c0 45 #define SXIAHCI_PHYCS1 0x00c4 46 #define SXIAHCI_PHYCS2 0x00c8 47 #define SXIAHCI_TIMER1MS 0x00e0 48 #define SXIAHCI_RWC 0x00fc 49 #define SXIAHCI_TIMEOUT 0x100000 50 #define SXIAHCI_PWRPIN 40 51 52 #define SXIAHCI_PREG_DMA 0x70 53 #define SXIAHCI_PREG_DMA_MASK (0xff<<8) 54 #define SXIAHCI_PREG_DMA_INIT (0x44<<8) 55 56 int sxiahci_match(struct device *, void *, void *); 57 void sxiahci_attach(struct device *, struct device *, void *); 58 int sxiahci_detach(struct device *, int); 59 int sxiahci_activate(struct device *, int); 60 int sxiahci_port_start(struct ahci_port *, int); 61 62 extern int ahci_intr(void *); 63 extern u_int32_t ahci_read(struct ahci_softc *, bus_size_t); 64 extern void ahci_write(struct ahci_softc *, bus_size_t, u_int32_t); 65 extern u_int32_t ahci_pread(struct ahci_port *, bus_size_t); 66 extern void ahci_pwrite(struct ahci_port *, bus_size_t, u_int32_t); 67 extern int ahci_default_port_start(struct ahci_port *, int); 68 69 struct sxiahci_softc { 70 struct ahci_softc sc; 71 72 }; 73 74 struct cfattach sxiahci_ca = { 75 sizeof(struct sxiahci_softc), 76 sxiahci_match, 77 sxiahci_attach, 78 sxiahci_detach, 79 sxiahci_activate 80 }; 81 82 struct cfdriver sxiahci_cd = { 83 NULL, "sxiahci", DV_DULL 84 }; 85 86 int 87 sxiahci_match(struct device *parent, void *match, void *aux) 88 { 89 struct fdt_attach_args *faa = aux; 90 91 return OF_is_compatible(faa->fa_node, "allwinner,sun4i-a10-ahci"); 92 } 93 94 void 95 sxiahci_attach(struct device *parent, struct device *self, void *aux) 96 { 97 struct sxiahci_softc *sxisc = (struct sxiahci_softc *)self; 98 struct ahci_softc *sc = &sxisc->sc; 99 struct fdt_attach_args *faa = aux; 100 uint32_t target_supply; 101 uint32_t timo; 102 103 if (faa->fa_nreg < 1) 104 return; 105 106 sc->sc_iot = faa->fa_iot; 107 sc->sc_ios = faa->fa_reg[0].size; 108 sc->sc_dmat = faa->fa_dmat; 109 110 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, 111 faa->fa_reg[0].size, 0, &sc->sc_ioh)) 112 panic("sxiahci_attach: bus_space_map failed!"); 113 114 /* enable clocks */ 115 clock_enable_all(faa->fa_node); 116 delay(5000); 117 118 /* XXX setup magix */ 119 SXIWRITE4(sc, SXIAHCI_RWC, 0); 120 delay(10); 121 122 SXISET4(sc, SXIAHCI_PHYCS1, 1 << 19); 123 delay(10); 124 125 SXICMS4(sc, SXIAHCI_PHYCS0, 7 << 24, 126 1 << 23 | 5 << 24 | 1 << 18); 127 delay(10); 128 129 SXICMS4(sc, SXIAHCI_PHYCS1, 130 3 << 16 | 0x1f << 8 | 3 << 6, 131 2 << 16 | 0x06 << 8 | 2 << 6); 132 delay(10); 133 134 SXISET4(sc, SXIAHCI_PHYCS1, 1 << 28 | 1 << 15); 135 delay(10); 136 137 SXICLR4(sc, SXIAHCI_PHYCS1, 1 << 19); 138 delay(10); 139 140 SXICMS4(sc, SXIAHCI_PHYCS0, 0x07 << 20, 0x03 << 20); 141 SXICMS4(sc, SXIAHCI_PHYCS2, 0x1f << 5, 0x19 << 5); 142 delay(5000); 143 144 SXISET4(sc, SXIAHCI_PHYCS0, 1 << 19); 145 delay(20); 146 147 timo = SXIAHCI_TIMEOUT; 148 while ((SXIREAD4(sc, SXIAHCI_PHYCS0) >> 28 & 7) != 2 && --timo) 149 delay(10); 150 if (!timo) { 151 printf(": AHCI phy power up failed.\n"); 152 goto dismod; 153 } 154 155 SXISET4(sc, SXIAHCI_PHYCS2, 1 << 24); 156 157 timo = SXIAHCI_TIMEOUT; 158 while ((SXIREAD4(sc, SXIAHCI_PHYCS2) & (1 << 24)) && --timo) 159 delay(10); 160 if (!timo) { 161 printf(": AHCI phy calibration failed.\n"); 162 goto dismod; 163 } 164 165 delay(15000); 166 SXIWRITE4(sc, SXIAHCI_RWC, 7); 167 168 /* power up phy */ 169 target_supply = OF_getpropint(faa->fa_node, "target-supply", 0); 170 if (target_supply) 171 regulator_enable(target_supply); 172 173 sc->sc_ih = arm_intr_establish_fdt(faa->fa_node, IPL_BIO, 174 ahci_intr, sc, sc->sc_dev.dv_xname); 175 if (sc->sc_ih == NULL) { 176 printf(": unable to establish interrupt\n"); 177 goto clrpwr; 178 } 179 180 printf(":"); 181 182 SXIWRITE4(sc, SXIAHCI_PI, 1); 183 SXICLR4(sc, SXIAHCI_CAP, AHCI_REG_CAP_SPM); 184 sc->sc_flags |= AHCI_F_NO_PMP; 185 sc->sc_port_start = sxiahci_port_start; 186 if (ahci_attach(sc) != 0) { 187 /* error printed by ahci_attach */ 188 goto irq; 189 } 190 191 return; 192 irq: 193 arm_intr_disestablish(sc->sc_ih); 194 clrpwr: 195 if (target_supply) 196 regulator_disable(target_supply); 197 dismod: 198 clock_disable_all(faa->fa_node); 199 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 200 } 201 202 int 203 sxiahci_detach(struct device *self, int flags) 204 { 205 struct sxiahci_softc *sxisc = (struct sxiahci_softc *) self; 206 struct ahci_softc *sc = &sxisc->sc; 207 208 ahci_detach(sc, flags); 209 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 210 return 0; 211 } 212 213 int 214 sxiahci_activate(struct device *self, int act) 215 { 216 struct sxiahci_softc *sxisc = (struct sxiahci_softc *) self; 217 struct ahci_softc *sc = &sxisc->sc; 218 219 return ahci_activate((struct device *)sc, act); 220 } 221 222 int 223 sxiahci_port_start(struct ahci_port *ap, int fre_only) 224 { 225 uint32_t r; 226 227 /* Setup DMA */ 228 r = ahci_pread(ap, SXIAHCI_PREG_DMA); 229 r &= ~SXIAHCI_PREG_DMA_MASK; 230 r |= SXIAHCI_PREG_DMA_INIT; /* XXX if fre_only? */ 231 ahci_pwrite(ap, SXIAHCI_PREG_DMA, r); 232 233 return (ahci_default_port_start(ap, fre_only)); 234 } 235