xref: /openbsd-src/sys/arch/armv7/omap/omap4.c (revision f2da64fbbbf1b03f09f390ab01267c93dfd77c4c)
1 /* $OpenBSD: omap4.c,v 1.4 2016/07/10 02:55:15 jsg Exp $ */
2 
3 /*
4  * Copyright (c) 2011 Uwe Stuehler <uwe@openbsd.org>
5  *
6  * Permission to use, copy, modify, and distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #include <sys/param.h>
20 #include <sys/systm.h>
21 #include <sys/device.h>
22 
23 #include <machine/bus.h>
24 
25 #include <armv7/armv7/armv7var.h>
26 
27 #define OMAPID_ADDR	0x4a002000
28 #define OMAPID_SIZE	0x1000
29 
30 #define GPIOx_SIZE	0x1000
31 #define GPIO1_ADDR	0x4a310000
32 #define GPIO2_ADDR	0x48055000
33 #define GPIO3_ADDR	0x48057000
34 #define GPIO4_ADDR	0x48059000
35 #define GPIO5_ADDR	0x4805b000
36 #define GPIO6_ADDR	0x4805d000
37 
38 #define GPIO1_IRQ	29
39 #define GPIO2_IRQ	30
40 #define GPIO3_IRQ	31
41 #define GPIO4_IRQ	32
42 #define GPIO5_IRQ	33
43 #define GPIO6_IRQ	34
44 
45 #define PRM_ADDR	0x4a306000
46 #define PRM_SIZE	0x2000
47 #define CM1_ADDR	0x4a004000
48 #define CM1_SIZE	0x1000
49 #define CM2_ADDR	0x4a008000
50 #define CM2_SIZE	0x2000
51 #define SCRM_ADDR	0x4a30a000
52 #define SCRM_SIZE	0x1000
53 #define PCNF1_ADDR	0x4a100000
54 #define PCNF1_SIZE	0x1000
55 #define PCNF2_ADDR	0x4a31e000
56 #define PCNF2_SIZE	0x1000
57 
58 #define HSUSBHOST_ADDR	0x4a064000
59 #define HSUSBHOST_SIZE	0x800
60 #define USBEHCI_ADDR	0x4a064c00
61 #define USBEHCI_SIZE	0x400
62 #define USBOHCI_ADDR	0x4a064800
63 #define USBOHCI_SIZE	0x400
64 #define USBEHCI_IRQ	77
65 
66 struct armv7_dev omap4_devs[] = {
67 
68 	/*
69 	 * Power, Reset and Clock Manager
70 	 */
71 
72 	{ .name = "prcm",
73 	  .unit = 0,
74 	  .mem = {
75 	    { PRM_ADDR, PRM_SIZE },
76 	    { CM1_ADDR, CM1_SIZE },
77 	    { CM2_ADDR, CM2_SIZE },
78 	  },
79 	},
80 
81 	/*
82 	 * OMAP identification registers/fuses
83 	 */
84 
85 	{ .name = "omapid",
86 	  .unit = 0,
87 	  .mem = { { OMAPID_ADDR, OMAPID_SIZE } },
88 	},
89 
90 	/*
91 	 * GPIO
92 	 */
93 
94 	{ .name = "omgpio",
95 	  .unit = 0,
96 	  .mem = { { GPIO1_ADDR, GPIOx_SIZE } },
97 	  .irq = { GPIO1_IRQ }
98 	},
99 
100 	{ .name = "omgpio",
101 	  .unit = 1,
102 	  .mem = { { GPIO2_ADDR, GPIOx_SIZE } },
103 	  .irq = { GPIO2_IRQ }
104 	},
105 
106 	{ .name = "omgpio",
107 	  .unit = 2,
108 	  .mem = { { GPIO3_ADDR, GPIOx_SIZE } },
109 	  .irq = { GPIO3_IRQ }
110 	},
111 
112 	{ .name = "omgpio",
113 	  .unit = 3,
114 	  .mem = { { GPIO4_ADDR, GPIOx_SIZE } },
115 	  .irq = { GPIO4_IRQ }
116 	},
117 
118 	{ .name = "omgpio",
119 	  .unit = 4,
120 	  .mem = { { GPIO5_ADDR, GPIOx_SIZE } },
121 	  .irq = { GPIO5_IRQ }
122 	},
123 
124 	{ .name = "omgpio",
125 	  .unit = 5,
126 	  .mem = { { GPIO6_ADDR, GPIOx_SIZE } },
127 	  .irq = { GPIO6_IRQ }
128 	},
129 
130 	/*
131 	 * USB
132 	 */
133 
134 	{ .name = "ehci",
135 	  .unit = 0,
136 	  .mem = {
137 		  { USBEHCI_ADDR, USBEHCI_SIZE },
138 		  { HSUSBHOST_ADDR, HSUSBHOST_SIZE },
139 	  },
140 	  .irq = { USBEHCI_IRQ }
141 	},
142 
143 	/* Terminator */
144 	{ .name = NULL,
145 	  .unit = 0,
146 	}
147 };
148 
149 void
150 omap4_init(void)
151 {
152 	armv7_set_devs(omap4_devs);
153 }
154