1 /* $OpenBSD: am335x.c,v 1.8 2016/07/10 02:55:15 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2011 Uwe Stuehler <uwe@openbsd.org> 5 * Copyright (c) 2013 Raphael Graf <r@undefined.ch> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/types.h> 21 #include <sys/param.h> 22 #include <machine/bus.h> 23 24 #include <armv7/armv7/armv7var.h> 25 26 #define PRCM_SIZE 0x2000 27 #define PRCM_ADDR 0x44E00000 28 29 #define SCM_SIZE 0x2000 30 #define SCM_ADDR 0x44E10000 31 32 #define INTC_SIZE 0x300 33 #define INTC_ADDR 0x48200000 34 35 #define DMTIMERx_SIZE 0x80 36 #define DMTIMER0_ADDR 0x44E05000 37 #define DMTIMER1_ADDR 0x44E31000 /* 1MS */ 38 #define DMTIMER2_ADDR 0x48040000 39 #define DMTIMER3_ADDR 0x48042000 40 #define DMTIMER4_ADDR 0x48044000 41 #define DMTIMER5_ADDR 0x48046000 42 #define DMTIMER6_ADDR 0x48048000 43 #define DMTIMER7_ADDR 0x4804A000 44 #define DMTIMER0_IRQ 66 45 #define DMTIMER1_IRQ 67 46 #define DMTIMER2_IRQ 68 47 #define DMTIMER3_IRQ 69 48 #define DMTIMER4_IRQ 92 49 #define DMTIMER5_IRQ 93 50 #define DMTIMER6_IRQ 94 51 #define DMTIMER7_IRQ 95 52 53 #define GPIOx_SIZE 0x200 54 #define GPIO0_ADDR 0x44E07000 55 #define GPIO1_ADDR 0x4804C000 56 #define GPIO2_ADDR 0x481AC000 57 #define GPIO3_ADDR 0x481AE000 58 #define GPIO0_IRQ 96 59 #define GPIO1_IRQ 98 60 #define GPIO2_IRQ 32 61 #define GPIO3_IRQ 62 62 63 #define TPCC_SIZE 0x100000 64 #define TPCC_ADDR 0x49000000 65 #define TPTC0_ADDR 0x49800000 66 #define TPTC1_ADDR 0x49900000 67 #define TPTC2_ADDR 0x49a00000 68 #define EDMACOMP_IRQ 12 69 #define EDMAMPERR_IRQ 13 70 #define EDMAERR_IRQ 14 71 72 struct armv7_dev am335x_devs[] = { 73 74 /* 75 * Power, Reset and Clock Manager 76 */ 77 78 { .name = "prcm", 79 .unit = 0, 80 .mem = { { PRCM_ADDR, PRCM_SIZE } }, 81 }, 82 83 /* 84 * System Control Module 85 */ 86 87 { .name = "sitaracm", 88 .unit = 0, 89 .mem = { { SCM_ADDR, SCM_SIZE } }, 90 }, 91 92 /* 93 * Interrupt Controller 94 */ 95 96 { .name = "intc", 97 .unit = 0, 98 .mem = { { INTC_ADDR, INTC_SIZE } }, 99 }, 100 101 /* 102 * EDMA Controller 103 */ 104 { .name = "edma", 105 .unit = 0, 106 .mem = { { TPCC_ADDR, TPCC_SIZE } }, 107 .irq = { EDMACOMP_IRQ } 108 }, 109 110 /* 111 * General Purpose Timers 112 */ 113 114 { .name = "dmtimer", 115 .unit = 0, 116 .mem = { { DMTIMER2_ADDR, DMTIMERx_SIZE } }, 117 .irq = { DMTIMER2_IRQ } 118 }, 119 120 { .name = "dmtimer", 121 .unit = 1, 122 .mem = { { DMTIMER3_ADDR, DMTIMERx_SIZE } }, 123 .irq = { DMTIMER3_IRQ } 124 }, 125 126 /* 127 * GPIO 128 */ 129 130 { .name = "omgpio", 131 .unit = 0, 132 .mem = { { GPIO0_ADDR, GPIOx_SIZE } }, 133 .irq = { GPIO0_IRQ } 134 }, 135 136 { .name = "omgpio", 137 .unit = 1, 138 .mem = { { GPIO1_ADDR, GPIOx_SIZE } }, 139 .irq = { GPIO1_IRQ } 140 }, 141 142 { .name = "omgpio", 143 .unit = 2, 144 .mem = { { GPIO2_ADDR, GPIOx_SIZE } }, 145 .irq = { GPIO2_IRQ } 146 }, 147 148 { .name = "omgpio", 149 .unit = 3, 150 .mem = { { GPIO3_ADDR, GPIOx_SIZE } }, 151 .irq = { GPIO3_IRQ } 152 }, 153 154 /* Terminator */ 155 { .name = NULL, 156 .unit = 0 157 } 158 }; 159 160 void 161 am335x_init(void) 162 { 163 armv7_set_devs(am335x_devs); 164 } 165