xref: /openbsd-src/sys/arch/arm/include/trap.h (revision 821d13533493c6e3142d773ed339a97d1797cb83)
1*821d1353Sderaadt /*	$OpenBSD: trap.h,v 1.2 2018/06/30 15:23:37 deraadt Exp $	*/
2e1e4f5b1Sdrahn /*	$NetBSD: trap.h,v 1.4 2003/04/28 01:54:50 briggs Exp $	*/
3e1e4f5b1Sdrahn 
4e1e4f5b1Sdrahn /*
5e1e4f5b1Sdrahn  * Copyright (c) 1995 Mark Brinicombe.
6e1e4f5b1Sdrahn  * All rights reserved.
7e1e4f5b1Sdrahn  *
8e1e4f5b1Sdrahn  * Redistribution and use in source and binary forms, with or without
9e1e4f5b1Sdrahn  * modification, are permitted provided that the following conditions
10e1e4f5b1Sdrahn  * are met:
11e1e4f5b1Sdrahn  * 1. Redistributions of source code must retain the above copyright
12e1e4f5b1Sdrahn  *    notice, this list of conditions and the following disclaimer.
13e1e4f5b1Sdrahn  * 2. Redistributions in binary form must reproduce the above copyright
14e1e4f5b1Sdrahn  *    notice, this list of conditions and the following disclaimer in the
15e1e4f5b1Sdrahn  *    documentation and/or other materials provided with the distribution.
16e1e4f5b1Sdrahn  * 3. All advertising materials mentioning features or use of this software
17e1e4f5b1Sdrahn  *    must display the following acknowledgement:
18e1e4f5b1Sdrahn  *	This product includes software developed by Mark Brinicombe.
19e1e4f5b1Sdrahn  * 4. The name of the company nor the name of the author may be used to
20e1e4f5b1Sdrahn  *    endorse or promote products derived from this software without specific
21e1e4f5b1Sdrahn  *    prior written permission.
22e1e4f5b1Sdrahn  *
23e1e4f5b1Sdrahn  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
24e1e4f5b1Sdrahn  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25e1e4f5b1Sdrahn  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26e1e4f5b1Sdrahn  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27e1e4f5b1Sdrahn  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28e1e4f5b1Sdrahn  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29e1e4f5b1Sdrahn  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30e1e4f5b1Sdrahn  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31e1e4f5b1Sdrahn  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32e1e4f5b1Sdrahn  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33e1e4f5b1Sdrahn  * SUCH DAMAGE.
34e1e4f5b1Sdrahn  *
35e1e4f5b1Sdrahn  * RiscBSD kernel project
36e1e4f5b1Sdrahn  *
37e1e4f5b1Sdrahn  * trap.h
38e1e4f5b1Sdrahn  *
39e1e4f5b1Sdrahn  * Various trap definitions
40e1e4f5b1Sdrahn  */
41e1e4f5b1Sdrahn 
42e1e4f5b1Sdrahn /*
43e1e4f5b1Sdrahn  * Instructions used for breakpoints.
44e1e4f5b1Sdrahn  *
45e1e4f5b1Sdrahn  * These are undefined instructions.
46e1e4f5b1Sdrahn  * Technically the userspace breakpoint could be a SWI but we want to
47e1e4f5b1Sdrahn  * keep this the same as IPKDB which needs an undefined instruction as
48e1e4f5b1Sdrahn  * a break point.
49e1e4f5b1Sdrahn  *
50e1e4f5b1Sdrahn  * Ideally ARM would define several standard instruction sequences for
51e1e4f5b1Sdrahn  * use as breakpoints.
52e1e4f5b1Sdrahn  *
53e1e4f5b1Sdrahn  * The BKPT instruction isn't much use to us, since its behaviour is
54e1e4f5b1Sdrahn  * unpredictable on ARMv3 and lower.
55e1e4f5b1Sdrahn  *
56e1e4f5b1Sdrahn  * The ARM ARM says that for maximum compatibility, we should use undefined
57e1e4f5b1Sdrahn  * instructions that look like 0x.7f...f. .
58e1e4f5b1Sdrahn  */
59e1e4f5b1Sdrahn 
60e1e4f5b1Sdrahn #define GDB_BREAKPOINT		0xe6000011	/* Used by GDB 4.x */
61e1e4f5b1Sdrahn #define IPKDB_BREAKPOINT	0xe6000010	/* Used by IPKDB */
62e1e4f5b1Sdrahn #define GDB5_BREAKPOINT		0xe7ffdefe	/* Used by GDB 5.0 */
63e1e4f5b1Sdrahn #define KERNEL_BREAKPOINT	0xe7ffffff	/* Used by DDB */
64e1e4f5b1Sdrahn 
65e1e4f5b1Sdrahn #define KBPT_ASM		".word 0xe7ffdefe"
66e1e4f5b1Sdrahn 
67e1e4f5b1Sdrahn #define USER_BREAKPOINT		GDB_BREAKPOINT
68e1e4f5b1Sdrahn 
69e1e4f5b1Sdrahn #define T_FAULT			1
70