xref: /openbsd-src/sys/arch/arm/include/cpu.h (revision f2da64fbbbf1b03f09f390ab01267c93dfd77c4c)
1 /*	$OpenBSD: cpu.h,v 1.41 2016/04/04 09:13:44 patrick Exp $	*/
2 /*	$NetBSD: cpu.h,v 1.34 2003/06/23 11:01:08 martin Exp $	*/
3 
4 /*
5  * Copyright (c) 1994-1996 Mark Brinicombe.
6  * Copyright (c) 1994 Brini.
7  * All rights reserved.
8  *
9  * This code is derived from software written for Brini by Mark Brinicombe
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by Brini.
22  * 4. The name of the company nor the name of the author may be used to
23  *    endorse or promote products derived from this software without specific
24  *    prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
27  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  * RiscBSD kernel project
39  *
40  * cpu.h
41  *
42  * CPU specific symbols
43  *
44  * Created      : 18/09/94
45  *
46  * Based on kate/katelib/arm6.h
47  */
48 
49 #ifndef _ARM_CPU_H_
50 #define _ARM_CPU_H_
51 
52 /*
53  * User-visible definitions
54  */
55 
56 /*  CTL_MACHDEP definitions. */
57 		/*		1	   formerly int: CPU_DEBUG */
58 		/*		2	   formerly string: CPU_BOOTED_DEVICE */
59 		/*		3	   formerly string: CPU_BOOTED_KERNEL */
60 #define	CPU_CONSDEV		4	/* struct: dev_t of our console */
61 #define	CPU_POWERSAVE		5	/* int: use CPU powersave mode */
62 #define	CPU_ALLOWAPERTURE	6	/* int: allow mmap of /dev/xf86 */
63 #define CPU_APMWARN		7	/* APM battery warning percentage */
64 		/*		8	   formerly int: keyboard reset */
65 		/*		9	   formerly int: CPU_ZTSRAWMODE */
66 		/*		10	   formerly struct: CPU_ZTSSCALE */
67 #define	CPU_MAXSPEED		11	/* int: number of valid machdep ids */
68 #define CPU_LIDSUSPEND		12	/* int: closing lid causes suspend */
69 #define	CPU_MAXID		13	/* number of valid machdep ids */
70 
71 #define	CTL_MACHDEP_NAMES { \
72 	{ 0, 0 }, \
73 	{ 0, 0 }, \
74 	{ 0, 0 }, \
75 	{ 0, 0 }, \
76 	{ "console_device", CTLTYPE_STRUCT }, \
77 	{ "powersave", CTLTYPE_INT }, \
78 	{ "allowaperture", CTLTYPE_INT }, \
79 	{ "apmwarn", CTLTYPE_INT }, \
80 	{ 0, 0 }, \
81 	{ 0, 0 }, \
82 	{ 0, 0 }, \
83 	{ "maxspeed", CTLTYPE_INT }, \
84 	{ "lidsuspend", CTLTYPE_INT } \
85 }
86 
87 #ifdef _KERNEL
88 
89 /*
90  * Kernel-only definitions
91  */
92 
93 #include <arm/cpuconf.h>
94 
95 #include <machine/intr.h>
96 #ifndef _LOCORE
97 #if 0
98 #include <sys/user.h>
99 #endif
100 #include <machine/frame.h>
101 #include <machine/pcb.h>
102 #endif	/* !_LOCORE */
103 
104 #include <arm/armreg.h>
105 
106 #ifndef _LOCORE
107 /* 1 == use cpu_sleep(), 0 == don't */
108 extern int cpu_do_powersave;
109 #endif
110 
111 #ifdef _LOCORE
112 #define IRQdisable \
113 	stmfd	sp!, {r0} ; \
114 	mrs	r0, cpsr ; \
115 	orr	r0, r0, #(PSR_I) ; \
116 	msr	cpsr_c, r0 ; \
117 	ldmfd	sp!, {r0}
118 
119 #define IRQenable \
120 	stmfd	sp!, {r0} ; \
121 	mrs	r0, cpsr ; \
122 	bic	r0, r0, #(PSR_I) ; \
123 	msr	cpsr_c, r0 ; \
124 	ldmfd	sp!, {r0}
125 
126 #else
127 #define IRQdisable __set_cpsr_c(PSR_I, PSR_I);
128 #define IRQenable __set_cpsr_c(PSR_I, 0);
129 #endif	/* _LOCORE */
130 
131 #ifndef _LOCORE
132 
133 /* All the CLKF_* macros take a struct clockframe * as an argument. */
134 
135 /*
136  * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
137  * frame came from USR mode or not.
138  */
139 #define CLKF_USERMODE(frame)	((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE)
140 
141 /*
142  * CLKF_INTR: True if we took the interrupt from inside another
143  * interrupt handler.
144  */
145 #define CLKF_INTR(frame)	(curcpu()->ci_idepth > 1)
146 
147 /*
148  * CLKF_PC: Extract the program counter from a clockframe
149  */
150 #define CLKF_PC(frame)		(frame->if_pc)
151 
152 /*
153  * PROC_PC: Find out the program counter for the given process.
154  */
155 #define PROC_PC(p)	((p)->p_addr->u_pcb.pcb_tf->tf_pc)
156 #define PROC_STACK(p)	((p)->p_addr->u_pcb.pcb_tf->tf_usr_sp)
157 
158 /* The address of the vector page. */
159 extern vaddr_t vector_page;
160 void	arm32_vector_init(vaddr_t, int);
161 
162 #define	ARM_VEC_RESET			(1 << 0)
163 #define	ARM_VEC_UNDEFINED		(1 << 1)
164 #define	ARM_VEC_SWI			(1 << 2)
165 #define	ARM_VEC_PREFETCH_ABORT		(1 << 3)
166 #define	ARM_VEC_DATA_ABORT		(1 << 4)
167 #define	ARM_VEC_ADDRESS_EXCEPTION	(1 << 5)
168 #define	ARM_VEC_IRQ			(1 << 6)
169 #define	ARM_VEC_FIQ			(1 << 7)
170 
171 #define	ARM_NVEC			8
172 #define	ARM_VEC_ALL			0xffffffff
173 
174 /*
175  * Per-CPU information.  For now we assume one CPU.
176  */
177 
178 #include <sys/device.h>
179 #include <sys/sched.h>
180 struct cpu_info {
181 	struct device *ci_dev;		/* Device corresponding to this CPU */
182 	struct cpu_info *ci_next;
183 	struct schedstate_percpu ci_schedstate; /* scheduler state */
184 
185 	struct proc *ci_curproc;
186 	u_int32_t ci_cpuid;
187 	u_int32_t ci_randseed;
188 
189 	struct pcb *ci_curpcb;
190 
191 	u_int32_t ci_arm_cpuid;		/* aggregate CPU id */
192 	u_int32_t ci_arm_cputype;	/* CPU type */
193 	u_int32_t ci_arm_cpurev;	/* CPU revision */
194 	u_int32_t ci_ctrl;		/* The CPU control register */
195 
196 	uint32_t ci_cpl;
197 	uint32_t ci_ipending;
198 	uint32_t ci_idepth;
199 #ifdef DIAGNOSTIC
200 	int	ci_mutex_level;
201 #endif
202 
203 #ifdef GPROF
204 	struct gmonparam *ci_gmon;
205 #endif
206 };
207 
208 extern struct cpu_info cpu_info_primary;
209 extern struct cpu_info *cpu_info_list;
210 
211 #ifdef CPU_ARMv7
212 static inline struct cpu_info *
213 curcpu(void)
214 {
215 	struct cpu_info *__ci;
216 	__asm volatile("mrc	p15, 0, %0, c13, c0, 4" : "=r" (__ci));
217 	return (__ci);
218 }
219 #else
220 #define	curcpu()	(&cpu_info_primary)
221 #endif
222 
223 #ifndef MULTIPROCESSOR
224 #define cpu_number()	0
225 #define CPU_IS_PRIMARY(ci)	1
226 #define CPU_INFO_ITERATOR	int
227 #define CPU_INFO_FOREACH(cii, ci) \
228 	for (cii = 0, ci = curcpu(); ci != NULL; ci = NULL)
229 #define CPU_INFO_UNIT(ci)	0
230 #define MAXCPUS	1
231 #define cpu_unidle(ci)
232 #else
233 #define cpu_number()		(curcpu()->ci_cpuid)
234 #define CPU_IS_PRIMARY(ci)	((ci) == &cpu_info_primary)
235 #define CPU_INFO_ITERATOR		int
236 #define CPU_INFO_FOREACH(cii, ci)	for (cii = 0, ci = cpu_info_list; \
237 					    ci != NULL; ci = ci->ci_next)
238 
239 #define CPU_INFO_UNIT(ci)	((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0)
240 #define MAXCPUS	4
241 #define cpu_unidle(ci)
242 
243 extern struct cpu_info *cpu_info[MAXCPUS];
244 
245 void cpu_boot_secondary_processors(void);
246 #endif /* !MULTIPROCESSOR */
247 
248 #define CPU_BUSY_CYCLE()	do {} while (0)
249 
250 #define curpcb		curcpu()->ci_curpcb
251 
252 /*
253  * Scheduling glue
254  */
255 
256 extern int astpending;
257 #define setsoftast() (astpending = 1)
258 
259 /*
260  * Notify the current process (p) that it has a signal pending,
261  * process as soon as possible.
262  */
263 
264 #define signotify(p)            setsoftast()
265 
266 /*
267  * Preempt the current process if in interrupt from user mode,
268  * or after the current trap/syscall if in system mode.
269  */
270 extern int want_resched;	/* resched() was called */
271 #define	need_resched(ci)	(want_resched = 1, setsoftast())
272 #define clear_resched(ci) 	want_resched = 0
273 
274 /*
275  * Give a profiling tick to the current process when the user profiling
276  * buffer pages are invalid.  On the i386, request an ast to send us
277  * through trap(), marking the proc as needing a profiling tick.
278  */
279 #define	need_proftick(p)	setsoftast()
280 
281 /*
282  * cpu device glue (belongs in cpuvar.h)
283  */
284 
285 struct device;
286 void	cpu_attach	(struct device *);
287 int	cpu_alloc_idlepcb	(struct cpu_info *);
288 
289 /*
290  * Random cruft
291  */
292 
293 /* cpuswitch.S */
294 struct pcb;
295 void	savectx		(struct pcb *pcb);
296 
297 /* machdep.h */
298 void bootsync		(int);
299 
300 /* fault.c */
301 int badaddr_read	(void *, size_t, void *);
302 
303 /* syscall.c */
304 void swi_handler	(trapframe_t *);
305 
306 /* machine_machdep.c */
307 void board_startup(void);
308 
309 #endif	/* !_LOCORE */
310 
311 #endif /* _KERNEL */
312 
313 #endif /* !_ARM_CPU_H_ */
314 
315 /* End of cpu.h */
316