xref: /openbsd-src/sys/arch/arm/include/cpu.h (revision 46035553bfdd96e63c94e32da0210227ec2e3cf1)
1 /*	$OpenBSD: cpu.h,v 1.59 2020/05/31 06:23:57 dlg Exp $	*/
2 /*	$NetBSD: cpu.h,v 1.34 2003/06/23 11:01:08 martin Exp $	*/
3 
4 /*
5  * Copyright (c) 1994-1996 Mark Brinicombe.
6  * Copyright (c) 1994 Brini.
7  * All rights reserved.
8  *
9  * This code is derived from software written for Brini by Mark Brinicombe
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by Brini.
22  * 4. The name of the company nor the name of the author may be used to
23  *    endorse or promote products derived from this software without specific
24  *    prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
27  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  * RiscBSD kernel project
39  *
40  * cpu.h
41  *
42  * CPU specific symbols
43  *
44  * Created      : 18/09/94
45  *
46  * Based on kate/katelib/arm6.h
47  */
48 
49 #ifndef _ARM_CPU_H_
50 #define _ARM_CPU_H_
51 
52 /*
53  * User-visible definitions
54  */
55 
56 /*  CTL_MACHDEP definitions. */
57 		/*		1	   formerly int: CPU_DEBUG */
58 		/*		2	   formerly string: CPU_BOOTED_DEVICE */
59 		/*		3	   formerly string: CPU_BOOTED_KERNEL */
60 #define	CPU_CONSDEV		4	/* struct: dev_t of our console */
61 #define	CPU_POWERSAVE		5	/* int: use CPU powersave mode */
62 #define	CPU_ALLOWAPERTURE	6	/* int: allow mmap of /dev/xf86 */
63 		/*		7	   formerly int: apmwarn */
64 		/*		8	   formerly int: keyboard reset */
65 		/*		9	   formerly int: CPU_ZTSRAWMODE */
66 		/*		10	   formerly struct: CPU_ZTSSCALE */
67 #define	CPU_MAXSPEED		11	/* int: number of valid machdep ids */
68 		/*		12	   formerly int: CPU_LIDSUSPEND */
69 #define CPU_LIDACTION		13	/* action caused by lid close */
70 #define	CPU_COMPATIBLE		14	/* compatible property */
71 #define	CPU_MAXID		15	/* number of valid machdep ids */
72 
73 #define	CTL_MACHDEP_NAMES { \
74 	{ 0, 0 }, \
75 	{ 0, 0 }, \
76 	{ 0, 0 }, \
77 	{ 0, 0 }, \
78 	{ "console_device", CTLTYPE_STRUCT }, \
79 	{ "powersave", CTLTYPE_INT }, \
80 	{ "allowaperture", CTLTYPE_INT }, \
81 	{ 0, 0 }, \
82 	{ 0, 0 }, \
83 	{ 0, 0 }, \
84 	{ 0, 0 }, \
85 	{ "maxspeed", CTLTYPE_INT }, \
86 	{ 0, 0 }, \
87 	{ "lidaction", CTLTYPE_INT }, \
88 	{ "compatible", CTLTYPE_STRING }, \
89 }
90 
91 #ifdef _KERNEL
92 
93 /*
94  * Kernel-only definitions
95  */
96 
97 #include <arm/cpuconf.h>
98 
99 #include <machine/intr.h>
100 #include <machine/frame.h>
101 #include <machine/pcb.h>
102 #include <arm/armreg.h>
103 
104 /* 1 == use cpu_sleep(), 0 == don't */
105 extern int cpu_do_powersave;
106 
107 /* All the CLKF_* macros take a struct clockframe * as an argument. */
108 
109 /*
110  * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
111  * frame came from USR mode or not.
112  */
113 #define CLKF_USERMODE(frame)	((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE)
114 
115 /*
116  * CLKF_INTR: True if we took the interrupt from inside another
117  * interrupt handler.
118  */
119 #define CLKF_INTR(frame)	(curcpu()->ci_idepth > 1)
120 
121 /*
122  * CLKF_PC: Extract the program counter from a clockframe
123  */
124 #define CLKF_PC(frame)		(frame->if_pc)
125 
126 /*
127  * PROC_PC: Find out the program counter for the given process.
128  */
129 #define PROC_PC(p)	((p)->p_addr->u_pcb.pcb_tf->tf_pc)
130 #define PROC_STACK(p)	((p)->p_addr->u_pcb.pcb_tf->tf_usr_sp)
131 
132 /* The address of the vector page. */
133 extern vaddr_t vector_page;
134 void	arm32_vector_init(vaddr_t, int);
135 
136 #define	ARM_VEC_RESET			(1 << 0)
137 #define	ARM_VEC_UNDEFINED		(1 << 1)
138 #define	ARM_VEC_SWI			(1 << 2)
139 #define	ARM_VEC_PREFETCH_ABORT		(1 << 3)
140 #define	ARM_VEC_DATA_ABORT		(1 << 4)
141 #define	ARM_VEC_ADDRESS_EXCEPTION	(1 << 5)
142 #define	ARM_VEC_IRQ			(1 << 6)
143 #define	ARM_VEC_FIQ			(1 << 7)
144 
145 #define	ARM_NVEC			8
146 #define	ARM_VEC_ALL			0xffffffff
147 
148 /*
149  * Per-CPU information.  For now we assume one CPU.
150  */
151 
152 #include <sys/device.h>
153 #include <sys/sched.h>
154 #include <sys/srp.h>
155 
156 struct cpu_info {
157 	struct device		*ci_dev; /* Device corresponding to this CPU */
158 	struct cpu_info		*ci_next;
159 	struct schedstate_percpu ci_schedstate; /* scheduler state */
160 
161 	u_int32_t		ci_cpuid;
162 	uint64_t		ci_mpidr;
163 	int			ci_node;
164 	struct cpu_info		*ci_self;
165 
166 	struct proc		*ci_curproc;
167 	struct proc		*ci_fpuproc;
168 	u_int32_t		ci_randseed;
169 
170 	struct pcb		*ci_curpcb;
171 	struct pcb		*ci_idle_pcb;
172 
173 	uint32_t		ci_cpl;
174 	uint32_t		ci_ipending;
175 	uint32_t		ci_idepth;
176 #ifdef DIAGNOSTIC
177 	int			ci_mutex_level;
178 #endif
179 	int			ci_want_resched;
180 
181 	void			(*ci_flush_bp)(void);
182 
183 	struct opp_table	*ci_opp_table;
184 	volatile int		ci_opp_idx;
185 	volatile int		ci_opp_max;
186 	uint32_t		ci_cpu_supply;
187 
188 #ifdef MULTIPROCESSOR
189 	struct srp_hazard	ci_srp_hazards[SRP_HAZARD_NUM];
190 	volatile int		ci_flags;
191 	uint32_t		ci_ttbr0;
192 	vaddr_t			ci_pl1_stkend;
193 	vaddr_t			ci_irq_stkend;
194 	vaddr_t			ci_abt_stkend;
195 	vaddr_t			ci_und_stkend;
196 #endif
197 
198 #ifdef GPROF
199 	struct gmonparam *ci_gmon;
200 #endif
201 };
202 
203 #define CPUF_PRIMARY 		(1<<0)
204 #define CPUF_AP	 		(1<<1)
205 #define CPUF_IDENTIFY		(1<<2)
206 #define CPUF_IDENTIFIED		(1<<3)
207 #define CPUF_PRESENT		(1<<4)
208 #define CPUF_GO			(1<<5)
209 #define CPUF_RUNNING		(1<<6)
210 
211 static inline struct cpu_info *
212 curcpu(void)
213 {
214 	struct cpu_info *__ci;
215 	__asm volatile("mrc	p15, 0, %0, c13, c0, 4" : "=r" (__ci));
216 	return (__ci);
217 }
218 
219 extern struct cpu_info cpu_info_primary;
220 extern struct cpu_info *cpu_info_list;
221 
222 #ifndef MULTIPROCESSOR
223 #define cpu_number()	0
224 #define CPU_IS_PRIMARY(ci)	1
225 #define CPU_INFO_ITERATOR	int
226 #define CPU_INFO_FOREACH(cii, ci) \
227 	for (cii = 0, ci = curcpu(); ci != NULL; ci = NULL)
228 #define CPU_INFO_UNIT(ci)	0
229 #define MAXCPUS	1
230 #define cpu_kick(ci)
231 #define cpu_unidle(ci)
232 #else
233 #define cpu_number()		(curcpu()->ci_cpuid)
234 #define CPU_IS_PRIMARY(ci)	((ci) == &cpu_info_primary)
235 #define CPU_INFO_ITERATOR		int
236 #define CPU_INFO_FOREACH(cii, ci)	for (cii = 0, ci = cpu_info_list; \
237 					    ci != NULL; ci = ci->ci_next)
238 #define CPU_INFO_UNIT(ci)	((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0)
239 #define MAXCPUS	4
240 void cpu_kick(struct cpu_info *);
241 void cpu_unidle(struct cpu_info *ci);
242 
243 extern struct cpu_info *cpu_info[MAXCPUS];
244 
245 void cpu_boot_secondary_processors(void);
246 #endif /* !MULTIPROCESSOR */
247 
248 #define CPU_BUSY_CYCLE()	do {} while (0)
249 
250 #define curpcb		curcpu()->ci_curpcb
251 
252 unsigned int cpu_rnd_messybits(void);
253 
254 /*
255  * Scheduling glue
256  */
257 
258 extern int astpending;
259 #define setsoftast() (astpending = 1)
260 
261 /*
262  * Notify the current process (p) that it has a signal pending,
263  * process as soon as possible.
264  */
265 
266 #define signotify(p)            setsoftast()
267 
268 /*
269  * Preempt the current process if in interrupt from user mode,
270  * or after the current trap/syscall if in system mode.
271  */
272 extern int want_resched;	/* resched() was called */
273 #define	need_resched(ci)	(want_resched = 1, setsoftast())
274 #define clear_resched(ci) 	want_resched = 0
275 
276 /*
277  * Give a profiling tick to the current process when the user profiling
278  * buffer pages are invalid.  On the i386, request an ast to send us
279  * through trap(), marking the proc as needing a profiling tick.
280  */
281 #define	need_proftick(p)	setsoftast()
282 
283 /*
284  * cpu device glue (belongs in cpuvar.h)
285  */
286 
287 int	cpu_alloc_idle_pcb(struct cpu_info *);
288 
289 /*
290  * Random cruft
291  */
292 
293 /* cpuswitch.S */
294 struct pcb;
295 void	savectx		(struct pcb *pcb);
296 
297 /* machdep.h */
298 void bootsync		(int);
299 
300 /* fault.c */
301 int badaddr_read	(void *, size_t, void *);
302 
303 /* syscall.c */
304 void swi_handler	(trapframe_t *);
305 
306 /* machine_machdep.c */
307 void board_startup(void);
308 
309 static inline u_long
310 intr_disable(void)
311 {
312 	uint32_t cpsr;
313 
314 	__asm volatile ("mrs %0, cpsr" : "=r"(cpsr));
315 	__asm volatile ("msr cpsr_c, %0" :: "r"(cpsr | PSR_I));
316 
317 	return cpsr;
318 }
319 
320 static inline void
321 intr_restore(u_long cpsr)
322 {
323 	__asm volatile ("msr cpsr_c, %0" :: "r"(cpsr));
324 }
325 
326 void	cpu_startclock(void);
327 
328 #endif /* _KERNEL */
329 
330 #ifdef MULTIPROCESSOR
331 #include <sys/mplock.h>
332 #endif /* MULTIPROCESSOR */
333 
334 #endif /* !_ARM_CPU_H_ */
335