1 /* $OpenBSD: cpu.h,v 1.154 2022/11/29 21:41:39 guenther Exp $ */ 2 /* $NetBSD: cpu.h,v 1.1 2003/04/26 18:39:39 fvdl Exp $ */ 3 4 /*- 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 #ifndef _MACHINE_CPU_H_ 39 #define _MACHINE_CPU_H_ 40 41 /* 42 * Definitions unique to x86-64 cpu support. 43 */ 44 #ifdef _KERNEL 45 #include <machine/frame.h> 46 #include <machine/segments.h> /* USERMODE */ 47 #include <machine/intrdefs.h> 48 #endif /* _KERNEL */ 49 50 #include <sys/clockintr.h> 51 #include <sys/device.h> 52 #include <sys/rwlock.h> 53 #include <sys/sched.h> 54 #include <sys/sensors.h> 55 #include <sys/srp.h> 56 57 #ifdef _KERNEL 58 59 /* VMXON region (Intel) */ 60 struct vmxon_region { 61 uint32_t vr_revision; 62 }; 63 64 /* 65 * VMX for Intel CPUs 66 */ 67 struct vmx { 68 uint64_t vmx_cr0_fixed0; 69 uint64_t vmx_cr0_fixed1; 70 uint64_t vmx_cr4_fixed0; 71 uint64_t vmx_cr4_fixed1; 72 uint32_t vmx_vmxon_revision; 73 uint32_t vmx_msr_table_size; 74 uint32_t vmx_cr3_tgt_count; 75 uint64_t vmx_vm_func; 76 uint8_t vmx_has_l1_flush_msr; 77 }; 78 79 /* 80 * SVM for AMD CPUs 81 */ 82 struct svm { 83 uint32_t svm_max_asid; 84 uint8_t svm_flush_by_asid; 85 uint8_t svm_vmcb_clean; 86 uint8_t svm_decode_assist; 87 }; 88 89 union vmm_cpu_cap { 90 struct vmx vcc_vmx; 91 struct svm vcc_svm; 92 }; 93 94 /* 95 * Locks used to protect struct members in this file: 96 * I immutable after creation 97 * a atomic operations 98 * o owned (read/modified only) by this CPU 99 */ 100 struct x86_64_tss; 101 struct cpu_info { 102 /* 103 * The beginning of this structure in mapped in the userspace "u-k" 104 * page tables, so that these first couple members can be accessed 105 * from the trampoline code. The ci_PAGEALIGN member defines where 106 * the part that is *not* visible begins, so don't put anything 107 * above it that must be kept hidden from userspace! 108 */ 109 u_int64_t ci_kern_cr3; /* [o] U+K page table */ 110 u_int64_t ci_scratch; /* [o] for U<-->K transition */ 111 112 #define ci_PAGEALIGN ci_dev 113 struct device *ci_dev; /* [I] */ 114 struct cpu_info *ci_self; /* [I] */ 115 struct schedstate_percpu ci_schedstate; /* scheduler state */ 116 struct cpu_info *ci_next; /* [I] */ 117 118 struct proc *ci_curproc; /* [o] */ 119 u_int ci_cpuid; /* [I] */ 120 u_int ci_apicid; /* [I] */ 121 u_int ci_acpi_proc_id; /* [I] */ 122 u_int32_t ci_randseed; /* [o] */ 123 124 u_int64_t ci_kern_rsp; /* [o] kernel-only stack */ 125 u_int64_t ci_intr_rsp; /* [o] U<-->K trampoline stack */ 126 u_int64_t ci_user_cr3; /* [o] U-K page table */ 127 128 /* bits for mitigating Micro-architectural Data Sampling */ 129 char ci_mds_tmp[32]; /* [o] 32byte aligned */ 130 void *ci_mds_buf; /* [I] */ 131 132 struct pmap *ci_proc_pmap; /* last userspace pmap */ 133 struct pcb *ci_curpcb; /* [o] */ 134 struct pcb *ci_idle_pcb; /* [o] */ 135 136 u_int ci_pflags; /* [o] */ 137 #define CPUPF_USERSEGS 0x01 /* CPU has curproc's segs and FS.base */ 138 #define CPUPF_USERXSTATE 0x02 /* CPU has curproc's xsave state */ 139 140 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 141 u_int64_t ci_ipending; 142 int ci_ilevel; 143 int ci_idepth; 144 int ci_handled_intr_level; 145 u_int64_t ci_imask[NIPL]; 146 u_int64_t ci_iunmask[NIPL]; 147 #ifdef DIAGNOSTIC 148 int ci_mutex_level; 149 #endif 150 151 volatile u_int ci_flags; /* [a] */ 152 u_int32_t ci_ipis; /* [a] */ 153 154 u_int32_t ci_feature_flags; /* [I] */ 155 u_int32_t ci_feature_eflags; /* [I] */ 156 u_int32_t ci_feature_sefflags_ebx;/* [I] */ 157 u_int32_t ci_feature_sefflags_ecx;/* [I] */ 158 u_int32_t ci_feature_sefflags_edx;/* [I] */ 159 u_int32_t ci_feature_amdspec_ebx; /* [I] */ 160 u_int32_t ci_feature_tpmflags; /* [I] */ 161 u_int32_t ci_pnfeatset; /* [I] */ 162 u_int32_t ci_efeature_eax; /* [I] */ 163 u_int32_t ci_efeature_ecx; /* [I] */ 164 u_int32_t ci_brand[12]; /* [I] */ 165 u_int32_t ci_signature; /* [I] */ 166 u_int32_t ci_family; /* [I] */ 167 u_int32_t ci_model; /* [I] */ 168 u_int32_t ci_cflushsz; /* [I] */ 169 170 int ci_inatomic; /* [o] */ 171 172 #define __HAVE_CPU_TOPOLOGY 173 u_int32_t ci_smt_id; /* [I] */ 174 u_int32_t ci_core_id; /* [I] */ 175 u_int32_t ci_pkg_id; /* [I] */ 176 177 struct cpu_functions *ci_func; /* [I] */ 178 void (*cpu_setup)(struct cpu_info *); /* [I] */ 179 180 struct device *ci_acpicpudev; /* [I] */ 181 volatile u_int ci_mwait; /* [a] */ 182 #define MWAIT_IN_IDLE 0x1 /* don't need IPI to wake */ 183 #define MWAIT_KEEP_IDLING 0x2 /* cleared by other cpus to wake me */ 184 #define MWAIT_ONLY 0x4 /* set if all idle states use mwait */ 185 #define MWAIT_IDLING (MWAIT_IN_IDLE | MWAIT_KEEP_IDLING) 186 187 int ci_want_resched; 188 189 struct x86_64_tss *ci_tss; /* [o] */ 190 void *ci_gdt; /* [o] */ 191 192 volatile int ci_ddb_paused; 193 #define CI_DDB_RUNNING 0 194 #define CI_DDB_SHOULDSTOP 1 195 #define CI_DDB_STOPPED 2 196 #define CI_DDB_ENTERDDB 3 197 #define CI_DDB_INDDB 4 198 199 #ifdef MULTIPROCESSOR 200 struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM]; 201 #endif 202 203 struct ksensordev ci_sensordev; 204 struct ksensor ci_sensor; 205 struct ksensor ci_hz_sensor; 206 u_int64_t ci_hz_mperf; 207 u_int64_t ci_hz_aperf; 208 #if defined(GPROF) || defined(DDBPROF) 209 struct gmonparam *ci_gmon; 210 #endif 211 u_int32_t ci_vmm_flags; 212 #define CI_VMM_VMX (1 << 0) 213 #define CI_VMM_SVM (1 << 1) 214 #define CI_VMM_RVI (1 << 2) 215 #define CI_VMM_EPT (1 << 3) 216 #define CI_VMM_DIS (1 << 4) 217 union vmm_cpu_cap ci_vmm_cap; 218 paddr_t ci_vmxon_region_pa; 219 struct vmxon_region *ci_vmxon_region; 220 221 char ci_panicbuf[512]; 222 223 paddr_t ci_vmcs_pa; 224 struct rwlock ci_vmcs_lock; 225 226 struct clockintr_queue ci_queue; 227 }; 228 229 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 230 #define CPUF_AP 0x0002 /* CPU is an AP */ 231 #define CPUF_SP 0x0004 /* CPU is only processor */ 232 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 233 234 #define CPUF_IDENTIFY 0x0010 /* CPU may now identify */ 235 #define CPUF_IDENTIFIED 0x0020 /* CPU has been identified */ 236 237 #define CPUF_CONST_TSC 0x0040 /* CPU has constant TSC */ 238 #define CPUF_INVAR_TSC 0x0100 /* CPU has invariant TSC */ 239 240 #define CPUF_PRESENT 0x1000 /* CPU is present */ 241 #define CPUF_RUNNING 0x2000 /* CPU is running */ 242 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 243 #define CPUF_GO 0x8000 /* CPU should start running */ 244 #define CPUF_PARK 0x10000 /* CPU should self-park in real mode */ 245 #define CPUF_VMM 0x20000 /* CPU is executing in VMM mode */ 246 247 #define PROC_PC(p) ((p)->p_md.md_regs->tf_rip) 248 #define PROC_STACK(p) ((p)->p_md.md_regs->tf_rsp) 249 250 struct cpu_info_full; 251 extern struct cpu_info_full cpu_info_full_primary; 252 #define cpu_info_primary (*(struct cpu_info *)((char *)&cpu_info_full_primary + 4096*2 - offsetof(struct cpu_info, ci_PAGEALIGN))) 253 254 extern struct cpu_info *cpu_info_list; 255 256 #define CPU_INFO_ITERATOR int 257 #define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \ 258 ci != NULL; ci = ci->ci_next) 259 260 #define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0) 261 262 /* 263 * Preempt the current process if in interrupt from user mode, 264 * or after the current trap/syscall if in system mode. 265 */ 266 extern void need_resched(struct cpu_info *); 267 #define clear_resched(ci) (ci)->ci_want_resched = 0 268 269 #if defined(MULTIPROCESSOR) 270 271 #define MAXCPUS 64 /* bitmask */ 272 273 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 274 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 275 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 276 277 #define curcpu() ({struct cpu_info *__ci; \ 278 asm volatile("movq %%gs:%P1,%0" : "=r" (__ci) \ 279 :"n" (offsetof(struct cpu_info, ci_self))); \ 280 __ci;}) 281 #define cpu_number() (curcpu()->ci_cpuid) 282 283 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 284 #define CPU_IS_RUNNING(ci) ((ci)->ci_flags & CPUF_RUNNING) 285 286 extern struct cpu_info *cpu_info[MAXCPUS]; 287 288 void cpu_boot_secondary_processors(void); 289 290 void cpu_kick(struct cpu_info *); 291 void cpu_unidle(struct cpu_info *); 292 293 #define CPU_BUSY_CYCLE() __asm volatile("pause": : : "memory") 294 295 #else /* !MULTIPROCESSOR */ 296 297 #define MAXCPUS 1 298 299 #ifdef _KERNEL 300 #define curcpu() (&cpu_info_primary) 301 302 #define cpu_kick(ci) 303 #define cpu_unidle(ci) 304 305 #define CPU_BUSY_CYCLE() do {} while (0) 306 307 #endif 308 309 /* 310 * definitions of cpu-dependent requirements 311 * referenced in generic code 312 */ 313 #define cpu_number() 0 314 #define CPU_IS_PRIMARY(ci) 1 315 #define CPU_IS_RUNNING(ci) 1 316 317 #endif /* MULTIPROCESSOR */ 318 319 #include <machine/cpufunc.h> 320 #include <machine/psl.h> 321 322 static inline unsigned int 323 cpu_rnd_messybits(void) 324 { 325 unsigned int hi, lo; 326 327 __asm volatile("rdtsc" : "=d" (hi), "=a" (lo)); 328 329 return (hi ^ lo); 330 } 331 332 #endif /* _KERNEL */ 333 334 #ifdef MULTIPROCESSOR 335 #include <sys/mplock.h> 336 #endif 337 338 #define aston(p) ((p)->p_md.md_astpending = 1) 339 340 #define curpcb curcpu()->ci_curpcb 341 342 /* 343 * Arguments to hardclock, softclock and statclock 344 * encapsulate the previous machine state in an opaque 345 * clockframe; for now, use generic intrframe. 346 */ 347 #define clockframe intrframe 348 349 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_rflags) 350 #define CLKF_PC(frame) ((frame)->if_rip) 351 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1) 352 353 /* 354 * Give a profiling tick to the current process when the user profiling 355 * buffer pages are invalid. On the i386, request an ast to send us 356 * through usertrap(), marking the proc as needing a profiling tick. 357 */ 358 #define need_proftick(p) aston(p) 359 360 void signotify(struct proc *); 361 362 /* 363 * We need a machine-independent name for this. 364 */ 365 extern void (*delay_func)(int); 366 void delay_fini(void (*)(int)); 367 void delay_init(void (*)(int), int); 368 struct timeval; 369 370 #define DELAY(x) (*delay_func)(x) 371 #define delay(x) (*delay_func)(x) 372 373 374 #ifdef _KERNEL 375 /* cpu.c */ 376 extern int cpu_feature; 377 extern int cpu_ebxfeature; 378 extern int cpu_ecxfeature; 379 extern int cpu_perf_eax; 380 extern int cpu_perf_ebx; 381 extern int cpu_perf_edx; 382 extern int cpu_apmi_edx; 383 extern int ecpu_ecxfeature; 384 extern int cpu_id; 385 extern char cpu_vendor[]; 386 extern int cpuid_level; 387 extern int cpu_meltdown; 388 extern u_int cpu_mwait_size; 389 extern u_int cpu_mwait_states; 390 391 /* cacheinfo.c */ 392 void x86_print_cacheinfo(struct cpu_info *); 393 394 /* identcpu.c */ 395 void identifycpu(struct cpu_info *); 396 int cpu_amd64speed(int *); 397 extern int cpuspeed; 398 399 /* machdep.c */ 400 void dumpconf(void); 401 void cpu_reset(void); 402 void x86_64_proc0_tss_ldt_init(void); 403 void cpu_proc_fork(struct proc *, struct proc *); 404 int amd64_pa_used(paddr_t); 405 extern void (*cpu_idle_cycle_fcn)(void); 406 407 struct region_descriptor; 408 void lgdt(struct region_descriptor *); 409 410 struct pcb; 411 void savectx(struct pcb *); 412 void switch_exit(struct proc *, void (*)(struct proc *)); 413 void proc_trampoline(void); 414 415 /* clock.c */ 416 extern void (*initclock_func)(void); 417 void startclocks(void); 418 void rtcinit(void); 419 void rtcstart(void); 420 void rtcstop(void); 421 void i8254_delay(int); 422 void i8254_initclocks(void); 423 void i8254_startclock(void); 424 void i8254_inittimecounter(void); 425 void i8254_inittimecounter_simple(void); 426 427 /* i8259.c */ 428 void i8259_default_setup(void); 429 430 void cpu_init_msrs(struct cpu_info *); 431 void cpu_fix_msrs(struct cpu_info *); 432 void cpu_tsx_disable(struct cpu_info *); 433 434 /* dkcsum.c */ 435 void dkcsumattach(void); 436 437 /* bus_machdep.c */ 438 void x86_bus_space_init(void); 439 void x86_bus_space_mallocok(void); 440 441 /* powernow-k8.c */ 442 void k8_powernow_init(struct cpu_info *); 443 void k8_powernow_setperf(int); 444 445 /* k1x-pstate.c */ 446 void k1x_init(struct cpu_info *); 447 void k1x_setperf(int); 448 449 void est_init(struct cpu_info *); 450 void est_setperf(int); 451 452 #ifdef MULTIPROCESSOR 453 /* mp_setperf.c */ 454 void mp_setperf_init(void); 455 #endif 456 457 #endif /* _KERNEL */ 458 459 /* 460 * CTL_MACHDEP definitions. 461 */ 462 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 463 #define CPU_BIOS 2 /* BIOS variables */ 464 #define CPU_BLK2CHR 3 /* convert blk maj into chr one */ 465 #define CPU_CHR2BLK 4 /* convert chr maj into blk one */ 466 #define CPU_ALLOWAPERTURE 5 /* allow mmap of /dev/xf86 */ 467 #define CPU_CPUVENDOR 6 /* cpuid vendor string */ 468 #define CPU_CPUID 7 /* cpuid */ 469 #define CPU_CPUFEATURE 8 /* cpuid features */ 470 #define CPU_KBDRESET 10 /* keyboard reset under pcvt */ 471 #define CPU_XCRYPT 12 /* supports VIA xcrypt in userland */ 472 #define CPU_LIDACTION 14 /* action caused by lid close */ 473 #define CPU_FORCEUKBD 15 /* Force ukbd(4) as console keyboard */ 474 #define CPU_TSCFREQ 16 /* TSC frequency */ 475 #define CPU_INVARIANTTSC 17 /* has invariant TSC */ 476 #define CPU_PWRACTION 18 /* action caused by power button */ 477 #define CPU_MAXID 19 /* number of valid machdep ids */ 478 479 #define CTL_MACHDEP_NAMES { \ 480 { 0, 0 }, \ 481 { "console_device", CTLTYPE_STRUCT }, \ 482 { "bios", CTLTYPE_INT }, \ 483 { "blk2chr", CTLTYPE_STRUCT }, \ 484 { "chr2blk", CTLTYPE_STRUCT }, \ 485 { "allowaperture", CTLTYPE_INT }, \ 486 { "cpuvendor", CTLTYPE_STRING }, \ 487 { "cpuid", CTLTYPE_INT }, \ 488 { "cpufeature", CTLTYPE_INT }, \ 489 { 0, 0 }, \ 490 { "kbdreset", CTLTYPE_INT }, \ 491 { 0, 0 }, \ 492 { "xcrypt", CTLTYPE_INT }, \ 493 { 0, 0 }, \ 494 { "lidaction", CTLTYPE_INT }, \ 495 { "forceukbd", CTLTYPE_INT }, \ 496 { "tscfreq", CTLTYPE_QUAD }, \ 497 { "invarianttsc", CTLTYPE_INT }, \ 498 { "pwraction", CTLTYPE_INT }, \ 499 } 500 501 #endif /* !_MACHINE_CPU_H_ */ 502